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drm_dp_helper.h File Reference
#include <linux/types.h>
#include <linux/i2c.h>

Go to the source code of this file.

Data Structures

struct  i2c_algo_dp_aux_data
 

Macros

#define AUX_NATIVE_WRITE   0x8
 
#define AUX_NATIVE_READ   0x9
 
#define AUX_I2C_WRITE   0x0
 
#define AUX_I2C_READ   0x1
 
#define AUX_I2C_STATUS   0x2
 
#define AUX_I2C_MOT   0x4
 
#define AUX_NATIVE_REPLY_ACK   (0x0 << 4)
 
#define AUX_NATIVE_REPLY_NACK   (0x1 << 4)
 
#define AUX_NATIVE_REPLY_DEFER   (0x2 << 4)
 
#define AUX_NATIVE_REPLY_MASK   (0x3 << 4)
 
#define AUX_I2C_REPLY_ACK   (0x0 << 6)
 
#define AUX_I2C_REPLY_NACK   (0x1 << 6)
 
#define AUX_I2C_REPLY_DEFER   (0x2 << 6)
 
#define AUX_I2C_REPLY_MASK   (0x3 << 6)
 
#define DP_DPCD_REV   0x000
 
#define DP_MAX_LINK_RATE   0x001
 
#define DP_MAX_LANE_COUNT   0x002
 
#define DP_MAX_LANE_COUNT_MASK   0x1f
 
#define DP_TPS3_SUPPORTED   (1 << 6) /* 1.2 */
 
#define DP_ENHANCED_FRAME_CAP   (1 << 7)
 
#define DP_MAX_DOWNSPREAD   0x003
 
#define DP_NO_AUX_HANDSHAKE_LINK_TRAINING   (1 << 6)
 
#define DP_NORP   0x004
 
#define DP_DOWNSTREAMPORT_PRESENT   0x005
 
#define DP_DWN_STRM_PORT_PRESENT   (1 << 0)
 
#define DP_DWN_STRM_PORT_TYPE_MASK   0x06
 
#define DP_FORMAT_CONVERSION   (1 << 3)
 
#define DP_DETAILED_CAP_INFO_AVAILABLE   (1 << 4) /* DPI */
 
#define DP_MAIN_LINK_CHANNEL_CODING   0x006
 
#define DP_DOWN_STREAM_PORT_COUNT   0x007
 
#define DP_PORT_COUNT_MASK   0x0f
 
#define DP_MSA_TIMING_PAR_IGNORED   (1 << 6) /* eDP */
 
#define DP_OUI_SUPPORT   (1 << 7)
 
#define DP_I2C_SPEED_CAP   0x00c /* DPI */
 
#define DP_I2C_SPEED_1K   0x01
 
#define DP_I2C_SPEED_5K   0x02
 
#define DP_I2C_SPEED_10K   0x04
 
#define DP_I2C_SPEED_100K   0x08
 
#define DP_I2C_SPEED_400K   0x10
 
#define DP_I2C_SPEED_1M   0x20
 
#define DP_EDP_CONFIGURATION_CAP   0x00d /* XXX 1.2? */
 
#define DP_TRAINING_AUX_RD_INTERVAL   0x00e /* XXX 1.2? */
 
#define DP_MSTM_CAP   0x021 /* 1.2 */
 
#define DP_MST_CAP   (1 << 0)
 
#define DP_PSR_SUPPORT   0x070 /* XXX 1.2? */
 
#define DP_PSR_IS_SUPPORTED   1
 
#define DP_PSR_CAPS   0x071 /* XXX 1.2? */
 
#define DP_PSR_NO_TRAIN_ON_EXIT   1
 
#define DP_PSR_SETUP_TIME_330   (0 << 1)
 
#define DP_PSR_SETUP_TIME_275   (1 << 1)
 
#define DP_PSR_SETUP_TIME_220   (2 << 1)
 
#define DP_PSR_SETUP_TIME_165   (3 << 1)
 
#define DP_PSR_SETUP_TIME_110   (4 << 1)
 
#define DP_PSR_SETUP_TIME_55   (5 << 1)
 
#define DP_PSR_SETUP_TIME_0   (6 << 1)
 
#define DP_PSR_SETUP_TIME_MASK   (7 << 1)
 
#define DP_PSR_SETUP_TIME_SHIFT   1
 
#define DP_DOWNSTREAM_PORT_0   0x80
 
#define DP_DS_PORT_TYPE_MASK   (7 << 0)
 
#define DP_DS_PORT_TYPE_DP   0
 
#define DP_DS_PORT_TYPE_VGA   1
 
#define DP_DS_PORT_TYPE_DVI   2
 
#define DP_DS_PORT_TYPE_HDMI   3
 
#define DP_DS_PORT_TYPE_NON_EDID   4
 
#define DP_DS_PORT_HPD   (1 << 3)
 
#define DP_DS_VGA_MAX_BPC_MASK   (3 << 0)
 
#define DP_DS_VGA_8BPC   0
 
#define DP_DS_VGA_10BPC   1
 
#define DP_DS_VGA_12BPC   2
 
#define DP_DS_VGA_16BPC   3
 
#define DP_LINK_BW_SET   0x100
 
#define DP_LINK_BW_1_62   0x06
 
#define DP_LINK_BW_2_7   0x0a
 
#define DP_LINK_BW_5_4   0x14 /* 1.2 */
 
#define DP_LANE_COUNT_SET   0x101
 
#define DP_LANE_COUNT_MASK   0x0f
 
#define DP_LANE_COUNT_ENHANCED_FRAME_EN   (1 << 7)
 
#define DP_TRAINING_PATTERN_SET   0x102
 
#define DP_TRAINING_PATTERN_DISABLE   0
 
#define DP_TRAINING_PATTERN_1   1
 
#define DP_TRAINING_PATTERN_2   2
 
#define DP_TRAINING_PATTERN_3   3 /* 1.2 */
 
#define DP_TRAINING_PATTERN_MASK   0x3
 
#define DP_LINK_QUAL_PATTERN_DISABLE   (0 << 2)
 
#define DP_LINK_QUAL_PATTERN_D10_2   (1 << 2)
 
#define DP_LINK_QUAL_PATTERN_ERROR_RATE   (2 << 2)
 
#define DP_LINK_QUAL_PATTERN_PRBS7   (3 << 2)
 
#define DP_LINK_QUAL_PATTERN_MASK   (3 << 2)
 
#define DP_RECOVERED_CLOCK_OUT_EN   (1 << 4)
 
#define DP_LINK_SCRAMBLING_DISABLE   (1 << 5)
 
#define DP_SYMBOL_ERROR_COUNT_BOTH   (0 << 6)
 
#define DP_SYMBOL_ERROR_COUNT_DISPARITY   (1 << 6)
 
#define DP_SYMBOL_ERROR_COUNT_SYMBOL   (2 << 6)
 
#define DP_SYMBOL_ERROR_COUNT_MASK   (3 << 6)
 
#define DP_TRAINING_LANE0_SET   0x103
 
#define DP_TRAINING_LANE1_SET   0x104
 
#define DP_TRAINING_LANE2_SET   0x105
 
#define DP_TRAINING_LANE3_SET   0x106
 
#define DP_TRAIN_VOLTAGE_SWING_MASK   0x3
 
#define DP_TRAIN_VOLTAGE_SWING_SHIFT   0
 
#define DP_TRAIN_MAX_SWING_REACHED   (1 << 2)
 
#define DP_TRAIN_VOLTAGE_SWING_400   (0 << 0)
 
#define DP_TRAIN_VOLTAGE_SWING_600   (1 << 0)
 
#define DP_TRAIN_VOLTAGE_SWING_800   (2 << 0)
 
#define DP_TRAIN_VOLTAGE_SWING_1200   (3 << 0)
 
#define DP_TRAIN_PRE_EMPHASIS_MASK   (3 << 3)
 
#define DP_TRAIN_PRE_EMPHASIS_0   (0 << 3)
 
#define DP_TRAIN_PRE_EMPHASIS_3_5   (1 << 3)
 
#define DP_TRAIN_PRE_EMPHASIS_6   (2 << 3)
 
#define DP_TRAIN_PRE_EMPHASIS_9_5   (3 << 3)
 
#define DP_TRAIN_PRE_EMPHASIS_SHIFT   3
 
#define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED   (1 << 5)
 
#define DP_DOWNSPREAD_CTRL   0x107
 
#define DP_SPREAD_AMP_0_5   (1 << 4)
 
#define DP_MSA_TIMING_PAR_IGNORE_EN   (1 << 7) /* eDP */
 
#define DP_MAIN_LINK_CHANNEL_CODING_SET   0x108
 
#define DP_SET_ANSI_8B10B   (1 << 0)
 
#define DP_I2C_SPEED_CONTROL_STATUS   0x109 /* DPI */
 
#define DP_EDP_CONFIGURATION_SET   0x10a /* XXX 1.2? */
 
#define DP_MSTM_CTRL   0x111 /* 1.2 */
 
#define DP_MST_EN   (1 << 0)
 
#define DP_UP_REQ_EN   (1 << 1)
 
#define DP_UPSTREAM_IS_SRC   (1 << 2)
 
#define DP_PSR_EN_CFG   0x170 /* XXX 1.2? */
 
#define DP_PSR_ENABLE   (1 << 0)
 
#define DP_PSR_MAIN_LINK_ACTIVE   (1 << 1)
 
#define DP_PSR_CRC_VERIFICATION   (1 << 2)
 
#define DP_PSR_FRAME_CAPTURE   (1 << 3)
 
#define DP_SINK_COUNT   0x200
 
#define DP_GET_SINK_COUNT(x)   ((((x) & 0x80) >> 1) | ((x) & 0x3f))
 
#define DP_SINK_CP_READY   (1 << 6)
 
#define DP_DEVICE_SERVICE_IRQ_VECTOR   0x201
 
#define DP_REMOTE_CONTROL_COMMAND_PENDING   (1 << 0)
 
#define DP_AUTOMATED_TEST_REQUEST   (1 << 1)
 
#define DP_CP_IRQ   (1 << 2)
 
#define DP_SINK_SPECIFIC_IRQ   (1 << 6)
 
#define DP_LANE0_1_STATUS   0x202
 
#define DP_LANE2_3_STATUS   0x203
 
#define DP_LANE_CR_DONE   (1 << 0)
 
#define DP_LANE_CHANNEL_EQ_DONE   (1 << 1)
 
#define DP_LANE_SYMBOL_LOCKED   (1 << 2)
 
#define DP_CHANNEL_EQ_BITS
 
#define DP_LANE_ALIGN_STATUS_UPDATED   0x204
 
#define DP_INTERLANE_ALIGN_DONE   (1 << 0)
 
#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)
 
#define DP_LINK_STATUS_UPDATED   (1 << 7)
 
#define DP_SINK_STATUS   0x205
 
#define DP_RECEIVE_PORT_0_STATUS   (1 << 0)
 
#define DP_RECEIVE_PORT_1_STATUS   (1 << 1)
 
#define DP_ADJUST_REQUEST_LANE0_1   0x206
 
#define DP_ADJUST_REQUEST_LANE2_3   0x207
 
#define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK   0x03
 
#define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT   0
 
#define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK   0x0c
 
#define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT   2
 
#define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK   0x30
 
#define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT   4
 
#define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
 
#define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT   6
 
#define DP_TEST_REQUEST   0x218
 
#define DP_TEST_LINK_TRAINING   (1 << 0)
 
#define DP_TEST_LINK_PATTERN   (1 << 1)
 
#define DP_TEST_LINK_EDID_READ   (1 << 2)
 
#define DP_TEST_LINK_PHY_TEST_PATTERN   (1 << 3) /* DPCD >= 1.1 */
 
#define DP_TEST_LINK_RATE   0x219
 
#define DP_LINK_RATE_162   (0x6)
 
#define DP_LINK_RATE_27   (0xa)
 
#define DP_TEST_LANE_COUNT   0x220
 
#define DP_TEST_PATTERN   0x221
 
#define DP_TEST_RESPONSE   0x260
 
#define DP_TEST_ACK   (1 << 0)
 
#define DP_TEST_NAK   (1 << 1)
 
#define DP_TEST_EDID_CHECKSUM_WRITE   (1 << 2)
 
#define DP_SOURCE_OUI   0x300
 
#define DP_SINK_OUI   0x400
 
#define DP_BRANCH_OUI   0x500
 
#define DP_SET_POWER   0x600
 
#define DP_SET_POWER_D0   0x1
 
#define DP_SET_POWER_D3   0x2
 
#define DP_PSR_ERROR_STATUS   0x2006 /* XXX 1.2? */
 
#define DP_PSR_LINK_CRC_ERROR   (1 << 0)
 
#define DP_PSR_RFB_STORAGE_ERROR   (1 << 1)
 
#define DP_PSR_ESI   0x2007 /* XXX 1.2? */
 
#define DP_PSR_CAPS_CHANGE   (1 << 0)
 
#define DP_PSR_STATUS   0x2008 /* XXX 1.2? */
 
#define DP_PSR_SINK_INACTIVE   0
 
#define DP_PSR_SINK_ACTIVE_SRC_SYNCED   1
 
#define DP_PSR_SINK_ACTIVE_RFB   2
 
#define DP_PSR_SINK_ACTIVE_SINK_SYNCED   3
 
#define DP_PSR_SINK_ACTIVE_RESYNC   4
 
#define DP_PSR_SINK_INTERNAL_ERROR   7
 
#define DP_PSR_SINK_STATE_MASK   0x07
 
#define MODE_I2C_START   1
 
#define MODE_I2C_WRITE   2
 
#define MODE_I2C_READ   4
 
#define MODE_I2C_STOP   8
 

Functions

int i2c_dp_aux_add_bus (struct i2c_adapter *adapter)
 

Macro Definition Documentation

#define AUX_I2C_MOT   0x4

Definition at line 48 of file drm_dp_helper.h.

#define AUX_I2C_READ   0x1

Definition at line 46 of file drm_dp_helper.h.

#define AUX_I2C_REPLY_ACK   (0x0 << 6)

Definition at line 55 of file drm_dp_helper.h.

#define AUX_I2C_REPLY_DEFER   (0x2 << 6)

Definition at line 57 of file drm_dp_helper.h.

#define AUX_I2C_REPLY_MASK   (0x3 << 6)

Definition at line 58 of file drm_dp_helper.h.

#define AUX_I2C_REPLY_NACK   (0x1 << 6)

Definition at line 56 of file drm_dp_helper.h.

#define AUX_I2C_STATUS   0x2

Definition at line 47 of file drm_dp_helper.h.

#define AUX_I2C_WRITE   0x0

Definition at line 45 of file drm_dp_helper.h.

#define AUX_NATIVE_READ   0x9

Definition at line 44 of file drm_dp_helper.h.

#define AUX_NATIVE_REPLY_ACK   (0x0 << 4)

Definition at line 50 of file drm_dp_helper.h.

#define AUX_NATIVE_REPLY_DEFER   (0x2 << 4)

Definition at line 52 of file drm_dp_helper.h.

#define AUX_NATIVE_REPLY_MASK   (0x3 << 4)

Definition at line 53 of file drm_dp_helper.h.

#define AUX_NATIVE_REPLY_NACK   (0x1 << 4)

Definition at line 51 of file drm_dp_helper.h.

#define AUX_NATIVE_WRITE   0x8

Definition at line 43 of file drm_dp_helper.h.

#define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK   0x0c

Definition at line 259 of file drm_dp_helper.h.

#define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT   2

Definition at line 260 of file drm_dp_helper.h.

#define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0

Definition at line 263 of file drm_dp_helper.h.

#define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT   6

Definition at line 264 of file drm_dp_helper.h.

#define DP_ADJUST_REQUEST_LANE0_1   0x206

Definition at line 255 of file drm_dp_helper.h.

#define DP_ADJUST_REQUEST_LANE2_3   0x207

Definition at line 256 of file drm_dp_helper.h.

#define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK   0x03

Definition at line 257 of file drm_dp_helper.h.

#define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT   0

Definition at line 258 of file drm_dp_helper.h.

#define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK   0x30

Definition at line 261 of file drm_dp_helper.h.

#define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT   4

Definition at line 262 of file drm_dp_helper.h.

#define DP_AUTOMATED_TEST_REQUEST   (1 << 1)

Definition at line 230 of file drm_dp_helper.h.

#define DP_BRANCH_OUI   0x500

Definition at line 287 of file drm_dp_helper.h.

#define DP_CHANNEL_EQ_BITS
Value:
DP_LANE_CHANNEL_EQ_DONE | \
DP_LANE_SYMBOL_LOCKED)

Definition at line 240 of file drm_dp_helper.h.

#define DP_CP_IRQ   (1 << 2)

Definition at line 231 of file drm_dp_helper.h.

#define DP_DETAILED_CAP_INFO_AVAILABLE   (1 << 4) /* DPI */

Definition at line 84 of file drm_dp_helper.h.

#define DP_DEVICE_SERVICE_IRQ_VECTOR   0x201

Definition at line 228 of file drm_dp_helper.h.

#define DP_DOWN_STREAM_PORT_COUNT   0x007

Definition at line 88 of file drm_dp_helper.h.

#define DP_DOWNSPREAD_CTRL   0x107

Definition at line 200 of file drm_dp_helper.h.

#define DP_DOWNSTREAM_PORT_0   0x80

Definition at line 131 of file drm_dp_helper.h.

#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)

Definition at line 247 of file drm_dp_helper.h.

#define DP_DOWNSTREAMPORT_PRESENT   0x005

Definition at line 76 of file drm_dp_helper.h.

#define DP_DPCD_REV   0x000

Definition at line 62 of file drm_dp_helper.h.

#define DP_DS_PORT_HPD   (1 << 3)

Definition at line 138 of file drm_dp_helper.h.

#define DP_DS_PORT_TYPE_DP   0

Definition at line 133 of file drm_dp_helper.h.

#define DP_DS_PORT_TYPE_DVI   2

Definition at line 135 of file drm_dp_helper.h.

#define DP_DS_PORT_TYPE_HDMI   3

Definition at line 136 of file drm_dp_helper.h.

#define DP_DS_PORT_TYPE_MASK   (7 << 0)

Definition at line 132 of file drm_dp_helper.h.

#define DP_DS_PORT_TYPE_NON_EDID   4

Definition at line 137 of file drm_dp_helper.h.

#define DP_DS_PORT_TYPE_VGA   1

Definition at line 134 of file drm_dp_helper.h.

#define DP_DS_VGA_10BPC   1

Definition at line 143 of file drm_dp_helper.h.

#define DP_DS_VGA_12BPC   2

Definition at line 144 of file drm_dp_helper.h.

#define DP_DS_VGA_16BPC   3

Definition at line 145 of file drm_dp_helper.h.

#define DP_DS_VGA_8BPC   0

Definition at line 142 of file drm_dp_helper.h.

#define DP_DS_VGA_MAX_BPC_MASK   (3 << 0)

Definition at line 141 of file drm_dp_helper.h.

#define DP_DWN_STRM_PORT_PRESENT   (1 << 0)

Definition at line 77 of file drm_dp_helper.h.

#define DP_DWN_STRM_PORT_TYPE_MASK   0x06

Definition at line 78 of file drm_dp_helper.h.

#define DP_EDP_CONFIGURATION_CAP   0x00d /* XXX 1.2? */

Definition at line 101 of file drm_dp_helper.h.

#define DP_EDP_CONFIGURATION_SET   0x10a /* XXX 1.2? */

Definition at line 210 of file drm_dp_helper.h.

#define DP_ENHANCED_FRAME_CAP   (1 << 7)

Definition at line 69 of file drm_dp_helper.h.

#define DP_FORMAT_CONVERSION   (1 << 3)

Definition at line 83 of file drm_dp_helper.h.

#define DP_GET_SINK_COUNT (   x)    ((((x) & 0x80) >> 1) | ((x) & 0x3f))

Definition at line 225 of file drm_dp_helper.h.

#define DP_I2C_SPEED_100K   0x08

Definition at line 97 of file drm_dp_helper.h.

#define DP_I2C_SPEED_10K   0x04

Definition at line 96 of file drm_dp_helper.h.

#define DP_I2C_SPEED_1K   0x01

Definition at line 94 of file drm_dp_helper.h.

#define DP_I2C_SPEED_1M   0x20

Definition at line 99 of file drm_dp_helper.h.

#define DP_I2C_SPEED_400K   0x10

Definition at line 98 of file drm_dp_helper.h.

#define DP_I2C_SPEED_5K   0x02

Definition at line 95 of file drm_dp_helper.h.

#define DP_I2C_SPEED_CAP   0x00c /* DPI */

Definition at line 93 of file drm_dp_helper.h.

#define DP_I2C_SPEED_CONTROL_STATUS   0x109 /* DPI */

Definition at line 207 of file drm_dp_helper.h.

#define DP_INTERLANE_ALIGN_DONE   (1 << 0)

Definition at line 246 of file drm_dp_helper.h.

#define DP_LANE0_1_STATUS   0x202

Definition at line 234 of file drm_dp_helper.h.

#define DP_LANE2_3_STATUS   0x203

Definition at line 235 of file drm_dp_helper.h.

#define DP_LANE_ALIGN_STATUS_UPDATED   0x204

Definition at line 244 of file drm_dp_helper.h.

#define DP_LANE_CHANNEL_EQ_DONE   (1 << 1)

Definition at line 237 of file drm_dp_helper.h.

#define DP_LANE_COUNT_ENHANCED_FRAME_EN   (1 << 7)

Definition at line 155 of file drm_dp_helper.h.

#define DP_LANE_COUNT_MASK   0x0f

Definition at line 154 of file drm_dp_helper.h.

#define DP_LANE_COUNT_SET   0x101

Definition at line 153 of file drm_dp_helper.h.

#define DP_LANE_CR_DONE   (1 << 0)

Definition at line 236 of file drm_dp_helper.h.

#define DP_LANE_SYMBOL_LOCKED   (1 << 2)

Definition at line 238 of file drm_dp_helper.h.

#define DP_LINK_BW_1_62   0x06

Definition at line 149 of file drm_dp_helper.h.

#define DP_LINK_BW_2_7   0x0a

Definition at line 150 of file drm_dp_helper.h.

#define DP_LINK_BW_5_4   0x14 /* 1.2 */

Definition at line 151 of file drm_dp_helper.h.

#define DP_LINK_BW_SET   0x100

Definition at line 148 of file drm_dp_helper.h.

#define DP_LINK_QUAL_PATTERN_D10_2   (1 << 2)

Definition at line 165 of file drm_dp_helper.h.

#define DP_LINK_QUAL_PATTERN_DISABLE   (0 << 2)

Definition at line 164 of file drm_dp_helper.h.

#define DP_LINK_QUAL_PATTERN_ERROR_RATE   (2 << 2)

Definition at line 166 of file drm_dp_helper.h.

#define DP_LINK_QUAL_PATTERN_MASK   (3 << 2)

Definition at line 168 of file drm_dp_helper.h.

#define DP_LINK_QUAL_PATTERN_PRBS7   (3 << 2)

Definition at line 167 of file drm_dp_helper.h.

#define DP_LINK_RATE_162   (0x6)

Definition at line 273 of file drm_dp_helper.h.

#define DP_LINK_RATE_27   (0xa)

Definition at line 274 of file drm_dp_helper.h.

#define DP_LINK_SCRAMBLING_DISABLE   (1 << 5)

Definition at line 171 of file drm_dp_helper.h.

#define DP_LINK_STATUS_UPDATED   (1 << 7)

Definition at line 248 of file drm_dp_helper.h.

#define DP_MAIN_LINK_CHANNEL_CODING   0x006

Definition at line 86 of file drm_dp_helper.h.

#define DP_MAIN_LINK_CHANNEL_CODING_SET   0x108

Definition at line 204 of file drm_dp_helper.h.

#define DP_MAX_DOWNSPREAD   0x003

Definition at line 71 of file drm_dp_helper.h.

#define DP_MAX_LANE_COUNT   0x002

Definition at line 66 of file drm_dp_helper.h.

#define DP_MAX_LANE_COUNT_MASK   0x1f

Definition at line 67 of file drm_dp_helper.h.

#define DP_MAX_LINK_RATE   0x001

Definition at line 64 of file drm_dp_helper.h.

#define DP_MSA_TIMING_PAR_IGNORE_EN   (1 << 7) /* eDP */

Definition at line 202 of file drm_dp_helper.h.

#define DP_MSA_TIMING_PAR_IGNORED   (1 << 6) /* eDP */

Definition at line 90 of file drm_dp_helper.h.

#define DP_MST_CAP   (1 << 0)

Definition at line 106 of file drm_dp_helper.h.

#define DP_MST_EN   (1 << 0)

Definition at line 213 of file drm_dp_helper.h.

#define DP_MSTM_CAP   0x021 /* 1.2 */

Definition at line 105 of file drm_dp_helper.h.

#define DP_MSTM_CTRL   0x111 /* 1.2 */

Definition at line 212 of file drm_dp_helper.h.

#define DP_NO_AUX_HANDSHAKE_LINK_TRAINING   (1 << 6)

Definition at line 72 of file drm_dp_helper.h.

#define DP_NORP   0x004

Definition at line 74 of file drm_dp_helper.h.

#define DP_OUI_SUPPORT   (1 << 7)

Definition at line 91 of file drm_dp_helper.h.

#define DP_PORT_COUNT_MASK   0x0f

Definition at line 89 of file drm_dp_helper.h.

#define DP_PSR_CAPS   0x071 /* XXX 1.2? */

Definition at line 110 of file drm_dp_helper.h.

#define DP_PSR_CAPS_CHANGE   (1 << 0)

Definition at line 298 of file drm_dp_helper.h.

#define DP_PSR_CRC_VERIFICATION   (1 << 2)

Definition at line 220 of file drm_dp_helper.h.

#define DP_PSR_EN_CFG   0x170 /* XXX 1.2? */

Definition at line 217 of file drm_dp_helper.h.

#define DP_PSR_ENABLE   (1 << 0)

Definition at line 218 of file drm_dp_helper.h.

#define DP_PSR_ERROR_STATUS   0x2006 /* XXX 1.2? */

Definition at line 293 of file drm_dp_helper.h.

#define DP_PSR_ESI   0x2007 /* XXX 1.2? */

Definition at line 297 of file drm_dp_helper.h.

#define DP_PSR_FRAME_CAPTURE   (1 << 3)

Definition at line 221 of file drm_dp_helper.h.

#define DP_PSR_IS_SUPPORTED   1

Definition at line 109 of file drm_dp_helper.h.

#define DP_PSR_LINK_CRC_ERROR   (1 << 0)

Definition at line 294 of file drm_dp_helper.h.

#define DP_PSR_MAIN_LINK_ACTIVE   (1 << 1)

Definition at line 219 of file drm_dp_helper.h.

#define DP_PSR_NO_TRAIN_ON_EXIT   1

Definition at line 111 of file drm_dp_helper.h.

#define DP_PSR_RFB_STORAGE_ERROR   (1 << 1)

Definition at line 295 of file drm_dp_helper.h.

#define DP_PSR_SETUP_TIME_0   (6 << 1)

Definition at line 118 of file drm_dp_helper.h.

#define DP_PSR_SETUP_TIME_110   (4 << 1)

Definition at line 116 of file drm_dp_helper.h.

#define DP_PSR_SETUP_TIME_165   (3 << 1)

Definition at line 115 of file drm_dp_helper.h.

#define DP_PSR_SETUP_TIME_220   (2 << 1)

Definition at line 114 of file drm_dp_helper.h.

#define DP_PSR_SETUP_TIME_275   (1 << 1)

Definition at line 113 of file drm_dp_helper.h.

#define DP_PSR_SETUP_TIME_330   (0 << 1)

Definition at line 112 of file drm_dp_helper.h.

#define DP_PSR_SETUP_TIME_55   (5 << 1)

Definition at line 117 of file drm_dp_helper.h.

#define DP_PSR_SETUP_TIME_MASK   (7 << 1)

Definition at line 119 of file drm_dp_helper.h.

#define DP_PSR_SETUP_TIME_SHIFT   1

Definition at line 120 of file drm_dp_helper.h.

#define DP_PSR_SINK_ACTIVE_RESYNC   4

Definition at line 305 of file drm_dp_helper.h.

#define DP_PSR_SINK_ACTIVE_RFB   2

Definition at line 303 of file drm_dp_helper.h.

#define DP_PSR_SINK_ACTIVE_SINK_SYNCED   3

Definition at line 304 of file drm_dp_helper.h.

#define DP_PSR_SINK_ACTIVE_SRC_SYNCED   1

Definition at line 302 of file drm_dp_helper.h.

#define DP_PSR_SINK_INACTIVE   0

Definition at line 301 of file drm_dp_helper.h.

#define DP_PSR_SINK_INTERNAL_ERROR   7

Definition at line 306 of file drm_dp_helper.h.

#define DP_PSR_SINK_STATE_MASK   0x07

Definition at line 307 of file drm_dp_helper.h.

#define DP_PSR_STATUS   0x2008 /* XXX 1.2? */

Definition at line 300 of file drm_dp_helper.h.

#define DP_PSR_SUPPORT   0x070 /* XXX 1.2? */

Definition at line 108 of file drm_dp_helper.h.

#define DP_RECEIVE_PORT_0_STATUS   (1 << 0)

Definition at line 252 of file drm_dp_helper.h.

#define DP_RECEIVE_PORT_1_STATUS   (1 << 1)

Definition at line 253 of file drm_dp_helper.h.

#define DP_RECOVERED_CLOCK_OUT_EN   (1 << 4)

Definition at line 170 of file drm_dp_helper.h.

#define DP_REMOTE_CONTROL_COMMAND_PENDING   (1 << 0)

Definition at line 229 of file drm_dp_helper.h.

#define DP_SET_ANSI_8B10B   (1 << 0)

Definition at line 205 of file drm_dp_helper.h.

#define DP_SET_POWER   0x600

Definition at line 289 of file drm_dp_helper.h.

#define DP_SET_POWER_D0   0x1

Definition at line 290 of file drm_dp_helper.h.

#define DP_SET_POWER_D3   0x2

Definition at line 291 of file drm_dp_helper.h.

#define DP_SINK_COUNT   0x200

Definition at line 223 of file drm_dp_helper.h.

#define DP_SINK_CP_READY   (1 << 6)

Definition at line 226 of file drm_dp_helper.h.

#define DP_SINK_OUI   0x400

Definition at line 286 of file drm_dp_helper.h.

#define DP_SINK_SPECIFIC_IRQ   (1 << 6)

Definition at line 232 of file drm_dp_helper.h.

#define DP_SINK_STATUS   0x205

Definition at line 250 of file drm_dp_helper.h.

#define DP_SOURCE_OUI   0x300

Definition at line 285 of file drm_dp_helper.h.

#define DP_SPREAD_AMP_0_5   (1 << 4)

Definition at line 201 of file drm_dp_helper.h.

#define DP_SYMBOL_ERROR_COUNT_BOTH   (0 << 6)

Definition at line 173 of file drm_dp_helper.h.

#define DP_SYMBOL_ERROR_COUNT_DISPARITY   (1 << 6)

Definition at line 174 of file drm_dp_helper.h.

#define DP_SYMBOL_ERROR_COUNT_MASK   (3 << 6)

Definition at line 176 of file drm_dp_helper.h.

#define DP_SYMBOL_ERROR_COUNT_SYMBOL   (2 << 6)

Definition at line 175 of file drm_dp_helper.h.

#define DP_TEST_ACK   (1 << 0)

Definition at line 281 of file drm_dp_helper.h.

#define DP_TEST_EDID_CHECKSUM_WRITE   (1 << 2)

Definition at line 283 of file drm_dp_helper.h.

#define DP_TEST_LANE_COUNT   0x220

Definition at line 276 of file drm_dp_helper.h.

#define DP_TEST_LINK_EDID_READ   (1 << 2)

Definition at line 269 of file drm_dp_helper.h.

#define DP_TEST_LINK_PATTERN   (1 << 1)

Definition at line 268 of file drm_dp_helper.h.

#define DP_TEST_LINK_PHY_TEST_PATTERN   (1 << 3) /* DPCD >= 1.1 */

Definition at line 270 of file drm_dp_helper.h.

#define DP_TEST_LINK_RATE   0x219

Definition at line 272 of file drm_dp_helper.h.

#define DP_TEST_LINK_TRAINING   (1 << 0)

Definition at line 267 of file drm_dp_helper.h.

#define DP_TEST_NAK   (1 << 1)

Definition at line 282 of file drm_dp_helper.h.

#define DP_TEST_PATTERN   0x221

Definition at line 278 of file drm_dp_helper.h.

#define DP_TEST_REQUEST   0x218

Definition at line 266 of file drm_dp_helper.h.

#define DP_TEST_RESPONSE   0x260

Definition at line 280 of file drm_dp_helper.h.

#define DP_TPS3_SUPPORTED   (1 << 6) /* 1.2 */

Definition at line 68 of file drm_dp_helper.h.

#define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED   (1 << 5)

Definition at line 198 of file drm_dp_helper.h.

#define DP_TRAIN_MAX_SWING_REACHED   (1 << 2)

Definition at line 185 of file drm_dp_helper.h.

#define DP_TRAIN_PRE_EMPHASIS_0   (0 << 3)

Definition at line 192 of file drm_dp_helper.h.

#define DP_TRAIN_PRE_EMPHASIS_3_5   (1 << 3)

Definition at line 193 of file drm_dp_helper.h.

#define DP_TRAIN_PRE_EMPHASIS_6   (2 << 3)

Definition at line 194 of file drm_dp_helper.h.

#define DP_TRAIN_PRE_EMPHASIS_9_5   (3 << 3)

Definition at line 195 of file drm_dp_helper.h.

#define DP_TRAIN_PRE_EMPHASIS_MASK   (3 << 3)

Definition at line 191 of file drm_dp_helper.h.

#define DP_TRAIN_PRE_EMPHASIS_SHIFT   3

Definition at line 197 of file drm_dp_helper.h.

#define DP_TRAIN_VOLTAGE_SWING_1200   (3 << 0)

Definition at line 189 of file drm_dp_helper.h.

#define DP_TRAIN_VOLTAGE_SWING_400   (0 << 0)

Definition at line 186 of file drm_dp_helper.h.

#define DP_TRAIN_VOLTAGE_SWING_600   (1 << 0)

Definition at line 187 of file drm_dp_helper.h.

#define DP_TRAIN_VOLTAGE_SWING_800   (2 << 0)

Definition at line 188 of file drm_dp_helper.h.

#define DP_TRAIN_VOLTAGE_SWING_MASK   0x3

Definition at line 183 of file drm_dp_helper.h.

#define DP_TRAIN_VOLTAGE_SWING_SHIFT   0

Definition at line 184 of file drm_dp_helper.h.

#define DP_TRAINING_AUX_RD_INTERVAL   0x00e /* XXX 1.2? */

Definition at line 102 of file drm_dp_helper.h.

#define DP_TRAINING_LANE0_SET   0x103

Definition at line 178 of file drm_dp_helper.h.

#define DP_TRAINING_LANE1_SET   0x104

Definition at line 179 of file drm_dp_helper.h.

#define DP_TRAINING_LANE2_SET   0x105

Definition at line 180 of file drm_dp_helper.h.

#define DP_TRAINING_LANE3_SET   0x106

Definition at line 181 of file drm_dp_helper.h.

#define DP_TRAINING_PATTERN_1   1

Definition at line 159 of file drm_dp_helper.h.

#define DP_TRAINING_PATTERN_2   2

Definition at line 160 of file drm_dp_helper.h.

#define DP_TRAINING_PATTERN_3   3 /* 1.2 */

Definition at line 161 of file drm_dp_helper.h.

#define DP_TRAINING_PATTERN_DISABLE   0

Definition at line 158 of file drm_dp_helper.h.

#define DP_TRAINING_PATTERN_MASK   0x3

Definition at line 162 of file drm_dp_helper.h.

#define DP_TRAINING_PATTERN_SET   0x102

Definition at line 157 of file drm_dp_helper.h.

#define DP_UP_REQ_EN   (1 << 1)

Definition at line 214 of file drm_dp_helper.h.

#define DP_UPSTREAM_IS_SRC   (1 << 2)

Definition at line 215 of file drm_dp_helper.h.

#define MODE_I2C_READ   4

Definition at line 311 of file drm_dp_helper.h.

#define MODE_I2C_START   1

Definition at line 309 of file drm_dp_helper.h.

#define MODE_I2C_STOP   8

Definition at line 312 of file drm_dp_helper.h.

#define MODE_I2C_WRITE   2

Definition at line 310 of file drm_dp_helper.h.

Function Documentation

int i2c_dp_aux_add_bus ( struct i2c_adapter adapter)

Definition at line 198 of file drm_dp_i2c_helper.c.