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Data Structures | Macros | Enumerations
drxk_hard.h File Reference
#include "drxk_map.h"

Go to the source code of this file.

Data Structures

struct  DRXKCfgDvbtEchoThres_t
 
struct  SCfgAgc
 
struct  SCfgPreSaw
 
struct  DRXKOfdmScCmd_t
 
struct  drxk_state
 

Macros

#define DRXK_VERSION_MAJOR   0
 
#define DRXK_VERSION_MINOR   9
 
#define DRXK_VERSION_PATCH   4300
 
#define HI_I2C_DELAY   42
 
#define HI_I2C_BRIDGE_DELAY   350
 
#define DRXK_MAX_RETRIES   100
 
#define DRIVER_4400   1
 
#define DRXX_JTAGID   0x039210D9
 
#define DRXX_J_JTAGID   0x239310D9
 
#define DRXX_K_JTAGID   0x039210D9
 
#define DRX_UNKNOWN   254
 
#define DRX_AUTO   255
 
#define DRX_SCU_READY   0
 
#define DRXK_MAX_WAITTIME   (200)
 
#define SCU_RESULT_OK   0
 
#define SCU_RESULT_SIZE   -4
 
#define SCU_RESULT_INVPAR   -3
 
#define SCU_RESULT_UNKSTD   -2
 
#define SCU_RESULT_UNKCMD   -1
 
#define DRXK_OFDM_TR_SHUTDOWN_TIMEOUT   (200)
 
#define DRXK_8VSB_MPEG_BIT_RATE   19392658UL /*bps*/
 
#define DRXK_DVBT_MPEG_BIT_RATE   32000000UL /*bps*/
 
#define DRXK_QAM16_MPEG_BIT_RATE   27000000UL /*bps*/
 
#define DRXK_QAM32_MPEG_BIT_RATE   33000000UL /*bps*/
 
#define DRXK_QAM64_MPEG_BIT_RATE   40000000UL /*bps*/
 
#define DRXK_QAM128_MPEG_BIT_RATE   46000000UL /*bps*/
 
#define DRXK_QAM256_MPEG_BIT_RATE   52000000UL /*bps*/
 
#define DRXK_MAX_MPEG_BIT_RATE   52000000UL /*bps*/
 
#define IQM_CF_OUT_ENA_OFDM__M   0x4
 
#define IQM_FS_ADJ_SEL_B_QAM   0x1
 
#define IQM_FS_ADJ_SEL_B_OFF   0x0
 
#define IQM_FS_ADJ_SEL_B_VSB   0x2
 
#define IQM_RC_ADJ_SEL_B_OFF   0x0
 
#define IQM_RC_ADJ_SEL_B_QAM   0x1
 
#define IQM_RC_ADJ_SEL_B_VSB   0x2
 
#define DRXK_POWER_DOWN_OFDM   DRX_POWER_MODE_1
 
#define DRXK_POWER_DOWN_CORE   DRX_POWER_MODE_9
 
#define DRXK_POWER_DOWN_PLL   DRX_POWER_MODE_10
 
#define NEVER_LOCK   0
 
#define NOT_LOCKED   1
 
#define DEMOD_LOCK   2
 
#define FEC_LOCK   3
 
#define MPEG_LOCK   4
 

Enumerations

enum  OperationMode {
  OM_Default, OM_DVBT_Diversity_Front, OM_DVBT_Diversity_End, OM_NONE,
  OM_QAM_ITU_A, OM_QAM_ITU_B, OM_QAM_ITU_C, OM_DVBT
}
 
enum  DRXPowerMode {
  DRX_POWER_UP = 0, DRX_POWER_MODE_1, DRX_POWER_MODE_2, DRX_POWER_MODE_3,
  DRX_POWER_MODE_4, DRX_POWER_MODE_5, DRX_POWER_MODE_6, DRX_POWER_MODE_7,
  DRX_POWER_MODE_8, DRX_POWER_MODE_9, DRX_POWER_MODE_10, DRX_POWER_MODE_11,
  DRX_POWER_MODE_12, DRX_POWER_MODE_13, DRX_POWER_MODE_14, DRX_POWER_MODE_15,
  DRX_POWER_MODE_16, DRX_POWER_DOWN = 255
}
 
enum  AGC_CTRL_MODE {
  AGC_CTRL_AUTO = 0, AGC_CTRL_USER, AGC_CTRL_OFF, DRXK_AGC_CTRL_AUTO = 0,
  DRXK_AGC_CTRL_USER, DRXK_AGC_CTRL_OFF
}
 
enum  EDrxkState {
  DRXK_UNINITIALIZED = 0, DRXK_STOPPED, DRXK_DTV_STARTED, DRXK_ATV_STARTED,
  DRXK_POWERED_DOWN, DRXK_NO_DEV
}
 
enum  EDrxkCoefArrayIndex {
  DRXK_COEF_IDX_MN = 0, DRXK_COEF_IDX_FM, DRXK_COEF_IDX_L, DRXK_COEF_IDX_LP,
  DRXK_COEF_IDX_BG, DRXK_COEF_IDX_DK, DRXK_COEF_IDX_I, DRXK_COEF_IDX_MAX
}
 
enum  EDrxkSifAttenuation { DRXK_SIF_ATTENUATION_0DB, DRXK_SIF_ATTENUATION_3DB, DRXK_SIF_ATTENUATION_6DB, DRXK_SIF_ATTENUATION_9DB }
 
enum  EDrxkConstellation {
  DRX_CONSTELLATION_BPSK = 0, DRX_CONSTELLATION_QPSK, DRX_CONSTELLATION_PSK8, DRX_CONSTELLATION_QAM16,
  DRX_CONSTELLATION_QAM32, DRX_CONSTELLATION_QAM64, DRX_CONSTELLATION_QAM128, DRX_CONSTELLATION_QAM256,
  DRX_CONSTELLATION_QAM512, DRX_CONSTELLATION_QAM1024, DRX_CONSTELLATION_UNKNOWN = DRX_UNKNOWN, DRX_CONSTELLATION_AUTO = DRX_AUTO
}
 
enum  EDrxkInterleaveMode { DRXK_QAM_I12_J17 = 16, DRXK_QAM_I_UNKNOWN = DRX_UNKNOWN }
 
enum  { DRXK_SPIN_A1 = 0, DRXK_SPIN_A2, DRXK_SPIN_A3, DRXK_SPIN_UNKNOWN }
 
enum  DRXKCfgDvbtSqiSpeed { DRXK_DVBT_SQI_SPEED_FAST = 0, DRXK_DVBT_SQI_SPEED_MEDIUM, DRXK_DVBT_SQI_SPEED_SLOW, DRXK_DVBT_SQI_SPEED_UNKNOWN = DRX_UNKNOWN }
 
enum  DRXFftmode_t {
  DRX_FFTMODE_2K = 0, DRX_FFTMODE_4K, DRX_FFTMODE_8K, DRX_FFTMODE_UNKNOWN = DRX_UNKNOWN,
  DRX_FFTMODE_AUTO = DRX_AUTO
}
 
enum  DRXMPEGStrWidth_t { DRX_MPEG_STR_WIDTH_1, DRX_MPEG_STR_WIDTH_8 }
 
enum  DRXQamLockRange_t { DRX_QAM_LOCKRANGE_NORMAL, DRX_QAM_LOCKRANGE_EXTENDED }
 

Macro Definition Documentation

#define DEMOD_LOCK   2

Definition at line 361 of file drxk_hard.h.

#define DRIVER_4400   1

Definition at line 11 of file drxk_hard.h.

#define DRX_AUTO   255

Definition at line 18 of file drxk_hard.h.

#define DRX_SCU_READY   0

Definition at line 20 of file drxk_hard.h.

#define DRX_UNKNOWN   254

Definition at line 17 of file drxk_hard.h.

#define DRXK_8VSB_MPEG_BIT_RATE   19392658UL /*bps*/

Definition at line 32 of file drxk_hard.h.

#define DRXK_DVBT_MPEG_BIT_RATE   32000000UL /*bps*/

Definition at line 33 of file drxk_hard.h.

#define DRXK_MAX_MPEG_BIT_RATE   52000000UL /*bps*/

Definition at line 39 of file drxk_hard.h.

#define DRXK_MAX_RETRIES   100

Definition at line 9 of file drxk_hard.h.

#define DRXK_MAX_WAITTIME   (200)

Definition at line 21 of file drxk_hard.h.

#define DRXK_OFDM_TR_SHUTDOWN_TIMEOUT   (200)

Definition at line 29 of file drxk_hard.h.

#define DRXK_POWER_DOWN_CORE   DRX_POWER_MODE_9

/brief Intermediate power mode for DRXK, power down core (sysclk)

Definition at line 87 of file drxk_hard.h.

#define DRXK_POWER_DOWN_OFDM   DRX_POWER_MODE_1

/brief Intermediate power mode for DRXK, power down OFDM clock domain

Definition at line 82 of file drxk_hard.h.

#define DRXK_POWER_DOWN_PLL   DRX_POWER_MODE_10

/brief Intermediate power mode for DRXK, power down pll (only osc runs)

Definition at line 92 of file drxk_hard.h.

#define DRXK_QAM128_MPEG_BIT_RATE   46000000UL /*bps*/

Definition at line 37 of file drxk_hard.h.

#define DRXK_QAM16_MPEG_BIT_RATE   27000000UL /*bps*/

Definition at line 34 of file drxk_hard.h.

#define DRXK_QAM256_MPEG_BIT_RATE   52000000UL /*bps*/

Definition at line 38 of file drxk_hard.h.

#define DRXK_QAM32_MPEG_BIT_RATE   33000000UL /*bps*/

Definition at line 35 of file drxk_hard.h.

#define DRXK_QAM64_MPEG_BIT_RATE   40000000UL /*bps*/

Definition at line 36 of file drxk_hard.h.

#define DRXK_VERSION_MAJOR   0

Definition at line 3 of file drxk_hard.h.

#define DRXK_VERSION_MINOR   9

Definition at line 4 of file drxk_hard.h.

#define DRXK_VERSION_PATCH   4300

Definition at line 5 of file drxk_hard.h.

#define DRXX_J_JTAGID   0x239310D9

Definition at line 14 of file drxk_hard.h.

#define DRXX_JTAGID   0x039210D9

Definition at line 13 of file drxk_hard.h.

#define DRXX_K_JTAGID   0x039210D9

Definition at line 15 of file drxk_hard.h.

#define FEC_LOCK   3

Definition at line 362 of file drxk_hard.h.

#define HI_I2C_BRIDGE_DELAY   350

Definition at line 8 of file drxk_hard.h.

#define HI_I2C_DELAY   42

Definition at line 7 of file drxk_hard.h.

#define IQM_CF_OUT_ENA_OFDM__M   0x4

Definition at line 41 of file drxk_hard.h.

#define IQM_FS_ADJ_SEL_B_OFF   0x0

Definition at line 43 of file drxk_hard.h.

#define IQM_FS_ADJ_SEL_B_QAM   0x1

Definition at line 42 of file drxk_hard.h.

#define IQM_FS_ADJ_SEL_B_VSB   0x2

Definition at line 44 of file drxk_hard.h.

#define IQM_RC_ADJ_SEL_B_OFF   0x0

Definition at line 45 of file drxk_hard.h.

#define IQM_RC_ADJ_SEL_B_QAM   0x1

Definition at line 46 of file drxk_hard.h.

#define IQM_RC_ADJ_SEL_B_VSB   0x2

Definition at line 47 of file drxk_hard.h.

#define MPEG_LOCK   4

Definition at line 363 of file drxk_hard.h.

#define NEVER_LOCK   0

Definition at line 359 of file drxk_hard.h.

#define NOT_LOCKED   1

Definition at line 360 of file drxk_hard.h.

#define SCU_RESULT_INVPAR   -3

Definition at line 24 of file drxk_hard.h.

#define SCU_RESULT_OK   0

Definition at line 22 of file drxk_hard.h.

#define SCU_RESULT_SIZE   -4

Definition at line 23 of file drxk_hard.h.

#define SCU_RESULT_UNKCMD   -1

Definition at line 26 of file drxk_hard.h.

#define SCU_RESULT_UNKSTD   -2

Definition at line 25 of file drxk_hard.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
DRXK_SPIN_A1 
DRXK_SPIN_A2 
DRXK_SPIN_A3 
DRXK_SPIN_UNKNOWN 

Definition at line 140 of file drxk_hard.h.

Enumerator:
AGC_CTRL_AUTO 
AGC_CTRL_USER 
AGC_CTRL_OFF 
DRXK_AGC_CTRL_AUTO 
DRXK_AGC_CTRL_USER 
DRXK_AGC_CTRL_OFF 

Definition at line 96 of file drxk_hard.h.

Enumerator:
DRX_FFTMODE_2K 
DRX_FFTMODE_4K 
DRX_FFTMODE_8K 
DRX_FFTMODE_UNKNOWN 
DRX_FFTMODE_AUTO 

Definition at line 154 of file drxk_hard.h.

Enumerator:
DRXK_DVBT_SQI_SPEED_FAST 
DRXK_DVBT_SQI_SPEED_MEDIUM 
DRXK_DVBT_SQI_SPEED_SLOW 
DRXK_DVBT_SQI_SPEED_UNKNOWN 

Definition at line 147 of file drxk_hard.h.

Enumerator:
DRX_MPEG_STR_WIDTH_1 
DRX_MPEG_STR_WIDTH_8 

Definition at line 162 of file drxk_hard.h.

Enumerator:
DRX_POWER_UP 
DRX_POWER_MODE_1 
DRX_POWER_MODE_2 
DRX_POWER_MODE_3 
DRX_POWER_MODE_4 
DRX_POWER_MODE_5 
DRX_POWER_MODE_6 
DRX_POWER_MODE_7 
DRX_POWER_MODE_8 
DRX_POWER_MODE_9 
DRX_POWER_MODE_10 
DRX_POWER_MODE_11 
DRX_POWER_MODE_12 
DRX_POWER_MODE_13 
DRX_POWER_MODE_14 
DRX_POWER_MODE_15 
DRX_POWER_MODE_16 
DRX_POWER_DOWN 

Definition at line 57 of file drxk_hard.h.

Enumerator:
DRX_QAM_LOCKRANGE_NORMAL 
DRX_QAM_LOCKRANGE_EXTENDED 

Definition at line 167 of file drxk_hard.h.

Enumerator:
DRXK_COEF_IDX_MN 
DRXK_COEF_IDX_FM 
DRXK_COEF_IDX_L 
DRXK_COEF_IDX_LP 
DRXK_COEF_IDX_BG 
DRXK_COEF_IDX_DK 
DRXK_COEF_IDX_I 
DRXK_COEF_IDX_MAX 

Definition at line 106 of file drxk_hard.h.

Enumerator:
DRX_CONSTELLATION_BPSK 
DRX_CONSTELLATION_QPSK 
DRX_CONSTELLATION_PSK8 
DRX_CONSTELLATION_QAM16 
DRX_CONSTELLATION_QAM32 
DRX_CONSTELLATION_QAM64 
DRX_CONSTELLATION_QAM128 
DRX_CONSTELLATION_QAM256 
DRX_CONSTELLATION_QAM512 
DRX_CONSTELLATION_QAM1024 
DRX_CONSTELLATION_UNKNOWN 
DRX_CONSTELLATION_AUTO 

Definition at line 122 of file drxk_hard.h.

Enumerator:
DRXK_QAM_I12_J17 
DRXK_QAM_I_UNKNOWN 

Definition at line 136 of file drxk_hard.h.

Enumerator:
DRXK_SIF_ATTENUATION_0DB 
DRXK_SIF_ATTENUATION_3DB 
DRXK_SIF_ATTENUATION_6DB 
DRXK_SIF_ATTENUATION_9DB 

Definition at line 116 of file drxk_hard.h.

enum EDrxkState
Enumerator:
DRXK_UNINITIALIZED 
DRXK_STOPPED 
DRXK_DTV_STARTED 
DRXK_ATV_STARTED 
DRXK_POWERED_DOWN 
DRXK_NO_DEV 

Definition at line 97 of file drxk_hard.h.

Enumerator:
OM_Default 
OM_DVBT_Diversity_Front 
OM_DVBT_Diversity_End 
OM_NONE 
OM_QAM_ITU_A 
OM_QAM_ITU_B 
OM_QAM_ITU_C 
OM_DVBT 

Definition at line 49 of file drxk_hard.h.