Go to the source code of this file.
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enum | OperationMode {
OM_Default,
OM_DVBT_Diversity_Front,
OM_DVBT_Diversity_End,
OM_NONE,
OM_QAM_ITU_A,
OM_QAM_ITU_B,
OM_QAM_ITU_C,
OM_DVBT
} |
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enum | DRXPowerMode {
DRX_POWER_UP = 0,
DRX_POWER_MODE_1,
DRX_POWER_MODE_2,
DRX_POWER_MODE_3,
DRX_POWER_MODE_4,
DRX_POWER_MODE_5,
DRX_POWER_MODE_6,
DRX_POWER_MODE_7,
DRX_POWER_MODE_8,
DRX_POWER_MODE_9,
DRX_POWER_MODE_10,
DRX_POWER_MODE_11,
DRX_POWER_MODE_12,
DRX_POWER_MODE_13,
DRX_POWER_MODE_14,
DRX_POWER_MODE_15,
DRX_POWER_MODE_16,
DRX_POWER_DOWN = 255
} |
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enum | AGC_CTRL_MODE {
AGC_CTRL_AUTO = 0,
AGC_CTRL_USER,
AGC_CTRL_OFF,
DRXK_AGC_CTRL_AUTO = 0,
DRXK_AGC_CTRL_USER,
DRXK_AGC_CTRL_OFF
} |
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enum | EDrxkState {
DRXK_UNINITIALIZED = 0,
DRXK_STOPPED,
DRXK_DTV_STARTED,
DRXK_ATV_STARTED,
DRXK_POWERED_DOWN,
DRXK_NO_DEV
} |
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enum | EDrxkCoefArrayIndex {
DRXK_COEF_IDX_MN = 0,
DRXK_COEF_IDX_FM,
DRXK_COEF_IDX_L,
DRXK_COEF_IDX_LP,
DRXK_COEF_IDX_BG,
DRXK_COEF_IDX_DK,
DRXK_COEF_IDX_I,
DRXK_COEF_IDX_MAX
} |
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enum | EDrxkSifAttenuation { DRXK_SIF_ATTENUATION_0DB,
DRXK_SIF_ATTENUATION_3DB,
DRXK_SIF_ATTENUATION_6DB,
DRXK_SIF_ATTENUATION_9DB
} |
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enum | EDrxkConstellation {
DRX_CONSTELLATION_BPSK = 0,
DRX_CONSTELLATION_QPSK,
DRX_CONSTELLATION_PSK8,
DRX_CONSTELLATION_QAM16,
DRX_CONSTELLATION_QAM32,
DRX_CONSTELLATION_QAM64,
DRX_CONSTELLATION_QAM128,
DRX_CONSTELLATION_QAM256,
DRX_CONSTELLATION_QAM512,
DRX_CONSTELLATION_QAM1024,
DRX_CONSTELLATION_UNKNOWN = DRX_UNKNOWN,
DRX_CONSTELLATION_AUTO = DRX_AUTO
} |
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enum | EDrxkInterleaveMode { DRXK_QAM_I12_J17 = 16,
DRXK_QAM_I_UNKNOWN = DRX_UNKNOWN
} |
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enum | { DRXK_SPIN_A1 = 0,
DRXK_SPIN_A2,
DRXK_SPIN_A3,
DRXK_SPIN_UNKNOWN
} |
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enum | DRXKCfgDvbtSqiSpeed { DRXK_DVBT_SQI_SPEED_FAST = 0,
DRXK_DVBT_SQI_SPEED_MEDIUM,
DRXK_DVBT_SQI_SPEED_SLOW,
DRXK_DVBT_SQI_SPEED_UNKNOWN = DRX_UNKNOWN
} |
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enum | DRXFftmode_t {
DRX_FFTMODE_2K = 0,
DRX_FFTMODE_4K,
DRX_FFTMODE_8K,
DRX_FFTMODE_UNKNOWN = DRX_UNKNOWN,
DRX_FFTMODE_AUTO = DRX_AUTO
} |
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enum | DRXMPEGStrWidth_t { DRX_MPEG_STR_WIDTH_1,
DRX_MPEG_STR_WIDTH_8
} |
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enum | DRXQamLockRange_t { DRX_QAM_LOCKRANGE_NORMAL,
DRX_QAM_LOCKRANGE_EXTENDED
} |
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#define DRXK_8VSB_MPEG_BIT_RATE 19392658UL /*bps*/ |
#define DRXK_DVBT_MPEG_BIT_RATE 32000000UL /*bps*/ |
#define DRXK_MAX_MPEG_BIT_RATE 52000000UL /*bps*/ |
#define DRXK_MAX_RETRIES 100 |
#define DRXK_MAX_WAITTIME (200) |
#define DRXK_OFDM_TR_SHUTDOWN_TIMEOUT (200) |
/brief Intermediate power mode for DRXK, power down core (sysclk)
Definition at line 87 of file drxk_hard.h.
/brief Intermediate power mode for DRXK, power down OFDM clock domain
Definition at line 82 of file drxk_hard.h.
/brief Intermediate power mode for DRXK, power down pll (only osc runs)
Definition at line 92 of file drxk_hard.h.
#define DRXK_QAM128_MPEG_BIT_RATE 46000000UL /*bps*/ |
#define DRXK_QAM16_MPEG_BIT_RATE 27000000UL /*bps*/ |
#define DRXK_QAM256_MPEG_BIT_RATE 52000000UL /*bps*/ |
#define DRXK_QAM32_MPEG_BIT_RATE 33000000UL /*bps*/ |
#define DRXK_QAM64_MPEG_BIT_RATE 40000000UL /*bps*/ |
#define DRXK_VERSION_MAJOR 0 |
#define DRXK_VERSION_MINOR 9 |
#define DRXK_VERSION_PATCH 4300 |
#define DRXX_J_JTAGID 0x239310D9 |
#define DRXX_JTAGID 0x039210D9 |
#define DRXX_K_JTAGID 0x039210D9 |
#define HI_I2C_BRIDGE_DELAY 350 |
#define IQM_CF_OUT_ENA_OFDM__M 0x4 |
#define IQM_FS_ADJ_SEL_B_OFF 0x0 |
#define IQM_FS_ADJ_SEL_B_QAM 0x1 |
#define IQM_FS_ADJ_SEL_B_VSB 0x2 |
#define IQM_RC_ADJ_SEL_B_OFF 0x0 |
#define IQM_RC_ADJ_SEL_B_QAM 0x1 |
#define IQM_RC_ADJ_SEL_B_VSB 0x2 |
#define SCU_RESULT_INVPAR -3 |
#define SCU_RESULT_SIZE -4 |
#define SCU_RESULT_UNKCMD -1 |
#define SCU_RESULT_UNKSTD -2 |
- Enumerator:
DRXK_SPIN_A1 |
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DRXK_SPIN_A2 |
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DRXK_SPIN_A3 |
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DRXK_SPIN_UNKNOWN |
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Definition at line 140 of file drxk_hard.h.
- Enumerator:
AGC_CTRL_AUTO |
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AGC_CTRL_USER |
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AGC_CTRL_OFF |
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DRXK_AGC_CTRL_AUTO |
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DRXK_AGC_CTRL_USER |
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DRXK_AGC_CTRL_OFF |
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Definition at line 96 of file drxk_hard.h.
- Enumerator:
DRX_FFTMODE_2K |
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DRX_FFTMODE_4K |
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DRX_FFTMODE_8K |
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DRX_FFTMODE_UNKNOWN |
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DRX_FFTMODE_AUTO |
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Definition at line 154 of file drxk_hard.h.
- Enumerator:
DRXK_DVBT_SQI_SPEED_FAST |
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DRXK_DVBT_SQI_SPEED_MEDIUM |
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DRXK_DVBT_SQI_SPEED_SLOW |
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DRXK_DVBT_SQI_SPEED_UNKNOWN |
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Definition at line 147 of file drxk_hard.h.
- Enumerator:
DRX_MPEG_STR_WIDTH_1 |
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DRX_MPEG_STR_WIDTH_8 |
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Definition at line 162 of file drxk_hard.h.
- Enumerator:
DRX_POWER_UP |
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DRX_POWER_MODE_1 |
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DRX_POWER_MODE_2 |
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DRX_POWER_MODE_3 |
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DRX_POWER_MODE_4 |
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DRX_POWER_MODE_5 |
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DRX_POWER_MODE_6 |
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DRX_POWER_MODE_7 |
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DRX_POWER_MODE_8 |
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DRX_POWER_MODE_9 |
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DRX_POWER_MODE_10 |
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DRX_POWER_MODE_11 |
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DRX_POWER_MODE_12 |
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DRX_POWER_MODE_13 |
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DRX_POWER_MODE_14 |
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DRX_POWER_MODE_15 |
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DRX_POWER_MODE_16 |
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DRX_POWER_DOWN |
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Definition at line 57 of file drxk_hard.h.
- Enumerator:
DRX_QAM_LOCKRANGE_NORMAL |
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DRX_QAM_LOCKRANGE_EXTENDED |
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Definition at line 167 of file drxk_hard.h.
- Enumerator:
DRXK_COEF_IDX_MN |
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DRXK_COEF_IDX_FM |
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DRXK_COEF_IDX_L |
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DRXK_COEF_IDX_LP |
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DRXK_COEF_IDX_BG |
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DRXK_COEF_IDX_DK |
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DRXK_COEF_IDX_I |
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DRXK_COEF_IDX_MAX |
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Definition at line 106 of file drxk_hard.h.
- Enumerator:
DRX_CONSTELLATION_BPSK |
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DRX_CONSTELLATION_QPSK |
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DRX_CONSTELLATION_PSK8 |
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DRX_CONSTELLATION_QAM16 |
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DRX_CONSTELLATION_QAM32 |
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DRX_CONSTELLATION_QAM64 |
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DRX_CONSTELLATION_QAM128 |
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DRX_CONSTELLATION_QAM256 |
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DRX_CONSTELLATION_QAM512 |
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DRX_CONSTELLATION_QAM1024 |
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DRX_CONSTELLATION_UNKNOWN |
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DRX_CONSTELLATION_AUTO |
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Definition at line 122 of file drxk_hard.h.
- Enumerator:
DRXK_QAM_I12_J17 |
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DRXK_QAM_I_UNKNOWN |
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Definition at line 136 of file drxk_hard.h.
- Enumerator:
DRXK_SIF_ATTENUATION_0DB |
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DRXK_SIF_ATTENUATION_3DB |
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DRXK_SIF_ATTENUATION_6DB |
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DRXK_SIF_ATTENUATION_9DB |
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Definition at line 116 of file drxk_hard.h.
- Enumerator:
DRXK_UNINITIALIZED |
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DRXK_STOPPED |
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DRXK_DTV_STARTED |
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DRXK_ATV_STARTED |
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DRXK_POWERED_DOWN |
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DRXK_NO_DEV |
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Definition at line 97 of file drxk_hard.h.
- Enumerator:
OM_Default |
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OM_DVBT_Diversity_Front |
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OM_DVBT_Diversity_End |
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OM_NONE |
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OM_QAM_ITU_A |
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OM_QAM_ITU_B |
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OM_QAM_ITU_C |
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OM_DVBT |
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Definition at line 49 of file drxk_hard.h.