Data Structures
union	e1000_adv_rx_desc

union	e1000_adv_tx_desc

struct	e1000_adv_tx_context_desc

Macros
#define	ID_LED_DEFAULT_82575_SERDES

#define	E1000_RAR_ENTRIES_82575 16

#define	E1000_RAR_ENTRIES_82576 24

#define	E1000_RAR_ENTRIES_82580 24

#define	E1000_RAR_ENTRIES_I350 32

#define	E1000_SW_SYNCH_MB 0x00000100

#define	E1000_STAT_DEV_RST_SET 0x00100000

#define	E1000_CTRL_DEV_RST 0x20000000

#define	E1000_SRRCTL_BSIZEPKT_SHIFT 10 /* Shift _right_ */

#define	E1000_SRRCTL_BSIZEHDRSIZE_SHIFT 2 /* Shift _left_ */

#define	E1000_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000

#define	E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS 0x0A000000

#define	E1000_SRRCTL_DROP_EN 0x80000000

#define	E1000_SRRCTL_TIMESTAMP 0x40000000

#define	E1000_MRQC_ENABLE_RSS_4Q 0x00000002

#define	E1000_MRQC_ENABLE_VMDQ 0x00000003

#define	E1000_MRQC_RSS_FIELD_IPV4_UDP 0x00400000

#define	E1000_MRQC_ENABLE_VMDQ_RSS_2Q 0x00000005

#define	E1000_MRQC_RSS_FIELD_IPV6_UDP 0x00800000

#define	E1000_MRQC_RSS_FIELD_IPV6_UDP_EX 0x01000000

#define	E1000_EICR_TX_QUEUE

#define	E1000_EICR_RX_QUEUE

#define	E1000_IMIREXT_SIZE_BP 0x00001000 /* Packet size bypass */

#define	E1000_IMIREXT_CTRL_BP 0x00080000 /* Bypass check of ctrl bits */

#define	E1000_RXDADV_HDRBUFLEN_MASK 0x7FE0

#define	E1000_RXDADV_HDRBUFLEN_SHIFT 5

#define	E1000_RXDADV_STAT_TS 0x10000 /* Pkt was time stamped */

#define	E1000_RXDADV_STAT_TSIP 0x08000 /* timestamp in packet */

#define	E1000_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp packet */

#define	E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */

#define	E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */

#define	E1000_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */

#define	E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */

#define	E1000_ADVTXD_DCMD_RS 0x08000000 /* Report Status */

#define	E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */

#define	E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */

#define	E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */

#define	E1000_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */

#define	E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */

#define	E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */

#define	E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */

#define	E1000_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 packet TYPE of SCTP */

#define	E1000_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */

#define	E1000_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */

#define	E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Tx Queue */

#define	E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Rx Queue */

#define	E1000_DCA_CTRL_DCA_MODE_DISABLE 0x01 /* DCA Disable */

#define	E1000_DCA_CTRL_DCA_MODE_CB2 0x02 /* DCA Mode CB2 */

#define	E1000_DCA_RXCTRL_CPUID_MASK 0x0000001F /* Rx CPUID Mask */

#define	E1000_DCA_RXCTRL_DESC_DCA_EN (1 << 5) /* DCA Rx Desc enable */

#define	E1000_DCA_RXCTRL_HEAD_DCA_EN (1 << 6) /* DCA Rx Desc header enable */

#define	E1000_DCA_RXCTRL_DATA_DCA_EN (1 << 7) /* DCA Rx Desc payload enable */

#define	E1000_DCA_TXCTRL_CPUID_MASK 0x0000001F /* Tx CPUID Mask */

#define	E1000_DCA_TXCTRL_DESC_DCA_EN (1 << 5) /* DCA Tx Desc enable */

#define	E1000_DCA_TXCTRL_TX_WB_RO_EN (1 << 11) /* Tx Desc writeback RO bit */

#define	E1000_DCA_TXCTRL_CPUID_MASK_82576 0xFF000000 /* Tx CPUID Mask */

#define	E1000_DCA_RXCTRL_CPUID_MASK_82576 0xFF000000 /* Rx CPUID Mask */

#define	E1000_DCA_TXCTRL_CPUID_SHIFT 24 /* Tx CPUID now in the last byte */

#define	E1000_DCA_RXCTRL_CPUID_SHIFT 24 /* Rx CPUID now in the last byte */

#define	E1000_ETQF_FILTER_ENABLE (1 << 26)

#define	E1000_ETQF_1588 (1 << 30)

#define	E1000_FTQF_VF_BP 0x00008000

#define	E1000_FTQF_1588_TIME_STAMP 0x08000000

#define	E1000_FTQF_MASK 0xF0000000

#define	E1000_FTQF_MASK_PROTO_BP 0x10000000

#define	E1000_FTQF_MASK_SOURCE_PORT_BP 0x80000000

#define	E1000_NVM_APME_82575 0x0400

#define	MAX_NUM_VFS 8

#define	E1000_DTXSWC_MAC_SPOOF_MASK 0x000000FF /* Per VF MAC spoof control */

#define	E1000_DTXSWC_VLAN_SPOOF_MASK 0x0000FF00 /* Per VF VLAN spoof control */

#define	E1000_DTXSWC_LLE_MASK 0x00FF0000 /* Per VF Local LB enables */

#define	E1000_DTXSWC_VLAN_SPOOF_SHIFT 8

#define	E1000_DTXSWC_VMDQ_LOOPBACK_EN (1 << 31) /* global VF LB enable */

#define	E1000_VT_CTL_DEFAULT_POOL_SHIFT 7

#define	E1000_VT_CTL_DEFAULT_POOL_MASK (0x7 << E1000_VT_CTL_DEFAULT_POOL_SHIFT)

#define	E1000_VT_CTL_IGNORE_MAC (1 << 28)

#define	E1000_VT_CTL_DISABLE_DEF_POOL (1 << 29)

#define	E1000_VT_CTL_VM_REPL_EN (1 << 30)

#define	E1000_VMOLR_RLPML_MASK 0x00003FFF /* Long Packet Maximum Length mask */

#define	E1000_VMOLR_LPE 0x00010000 /* Accept Long packet */

#define	E1000_VMOLR_RSSE 0x00020000 /* Enable RSS */

#define	E1000_VMOLR_AUPE 0x01000000 /* Accept untagged packets */

#define	E1000_VMOLR_ROMPE 0x02000000 /* Accept overflow multicast */

#define	E1000_VMOLR_ROPE 0x04000000 /* Accept overflow unicast */

#define	E1000_VMOLR_BAM 0x08000000 /* Accept Broadcast packets */

#define	E1000_VMOLR_MPME 0x10000000 /* Multicast promiscuous mode */

#define	E1000_VMOLR_STRVLAN 0x40000000 /* Vlan stripping enable */

#define	E1000_VMOLR_STRCRC 0x80000000 /* CRC stripping enable */

#define	E1000_VLVF_ARRAY_SIZE 32

#define	E1000_VLVF_VLANID_MASK 0x00000FFF

#define	E1000_VLVF_POOLSEL_SHIFT 12

#define	E1000_VLVF_POOLSEL_MASK (0xFF << E1000_VLVF_POOLSEL_SHIFT)

#define	E1000_VLVF_LVLAN 0x00100000

#define	E1000_VLVF_VLANID_ENABLE 0x80000000

#define	E1000_VMVIR_VLANA_DEFAULT 0x40000000 /* Always use default VLAN */

#define	E1000_VMVIR_VLANA_NEVER 0x80000000 /* Never insert VLAN tag */

#define	E1000_IOVCTL 0x05BBC

#define	E1000_IOVCTL_REUSE_VFQ 0x00000001

#define	E1000_RPLOLR_STRVLAN 0x40000000

#define	E1000_RPLOLR_STRCRC 0x80000000

#define	E1000_DTXCTL_8023LL 0x0004

#define	E1000_DTXCTL_VLAN_ADDED 0x0008

#define	E1000_DTXCTL_OOS_ENABLE 0x0010

#define	E1000_DTXCTL_MDP_EN 0x0020

#define	E1000_DTXCTL_SPOOF_INT 0x0040

#define	E1000_EEPROM_PCS_AUTONEG_DISABLE_BIT (1 << 14)

#define	ALL_QUEUES 0xFFFF

#define	E1000_RXPBS_SIZE_MASK_82576 0x0000007F

Macro Definition Documentation

#define ALL_QUEUES 0xFFFF

Definition at line 251 of file e1000_82575.h.

#define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */

Definition at line 137 of file e1000_82575.h.

#define E1000_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */

Definition at line 134 of file e1000_82575.h.

#define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */

Definition at line 135 of file e1000_82575.h.

#define E1000_ADVTXD_DCMD_RS 0x08000000 /* Report Status */

Definition at line 136 of file e1000_82575.h.

#define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */

Definition at line 139 of file e1000_82575.h.

#define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */

Definition at line 138 of file e1000_82575.h.

#define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */

Definition at line 132 of file e1000_82575.h.

#define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */

Definition at line 133 of file e1000_82575.h.

#define E1000_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */

Definition at line 155 of file e1000_82575.h.

#define E1000_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp packet */

Definition at line 131 of file e1000_82575.h.

#define E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */

Definition at line 150 of file e1000_82575.h.

#define E1000_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */

Definition at line 156 of file e1000_82575.h.

#define E1000_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */

Definition at line 140 of file e1000_82575.h.

#define E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */

Definition at line 151 of file e1000_82575.h.

#define E1000_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 packet TYPE of SCTP */

Definition at line 153 of file e1000_82575.h.

#define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */

Definition at line 152 of file e1000_82575.h.

#define E1000_CTRL_DEV_RST 0x20000000

Definition at line 48 of file e1000_82575.h.

#define E1000_DCA_CTRL_DCA_MODE_CB2 0x02 /* DCA Mode CB2 */

Definition at line 169 of file e1000_82575.h.

#define E1000_DCA_CTRL_DCA_MODE_DISABLE 0x01 /* DCA Disable */

Definition at line 168 of file e1000_82575.h.

#define E1000_DCA_RXCTRL_CPUID_MASK 0x0000001F /* Rx CPUID Mask */

Definition at line 171 of file e1000_82575.h.

#define E1000_DCA_RXCTRL_CPUID_MASK_82576 0xFF000000 /* Rx CPUID Mask */

Definition at line 182 of file e1000_82575.h.

#define E1000_DCA_RXCTRL_CPUID_SHIFT 24 /* Rx CPUID now in the last byte */

Definition at line 184 of file e1000_82575.h.

#define E1000_DCA_RXCTRL_DATA_DCA_EN (1 << 7) /* DCA Rx Desc payload enable */

Definition at line 174 of file e1000_82575.h.

#define E1000_DCA_RXCTRL_DESC_DCA_EN (1 << 5) /* DCA Rx Desc enable */

Definition at line 172 of file e1000_82575.h.

#define E1000_DCA_RXCTRL_HEAD_DCA_EN (1 << 6) /* DCA Rx Desc header enable */

Definition at line 173 of file e1000_82575.h.

#define E1000_DCA_TXCTRL_CPUID_MASK 0x0000001F /* Tx CPUID Mask */

Definition at line 176 of file e1000_82575.h.

#define E1000_DCA_TXCTRL_CPUID_MASK_82576 0xFF000000 /* Tx CPUID Mask */

Definition at line 181 of file e1000_82575.h.

#define E1000_DCA_TXCTRL_CPUID_SHIFT 24 /* Tx CPUID now in the last byte */

Definition at line 183 of file e1000_82575.h.

#define E1000_DCA_TXCTRL_DESC_DCA_EN (1 << 5) /* DCA Tx Desc enable */

Definition at line 177 of file e1000_82575.h.

#define E1000_DCA_TXCTRL_TX_WB_RO_EN (1 << 11) /* Tx Desc writeback RO bit */

Definition at line 178 of file e1000_82575.h.

#define E1000_DTXCTL_8023LL 0x0004

Definition at line 243 of file e1000_82575.h.

#define E1000_DTXCTL_MDP_EN 0x0020

Definition at line 246 of file e1000_82575.h.

#define E1000_DTXCTL_OOS_ENABLE 0x0010

Definition at line 245 of file e1000_82575.h.

#define E1000_DTXCTL_SPOOF_INT 0x0040

Definition at line 247 of file e1000_82575.h.

#define E1000_DTXCTL_VLAN_ADDED 0x0008

Definition at line 244 of file e1000_82575.h.

#define E1000_DTXSWC_LLE_MASK 0x00FF0000 /* Per VF Local LB enables */

Definition at line 202 of file e1000_82575.h.

#define E1000_DTXSWC_MAC_SPOOF_MASK 0x000000FF /* Per VF MAC spoof control */

Definition at line 200 of file e1000_82575.h.

#define E1000_DTXSWC_VLAN_SPOOF_MASK 0x0000FF00 /* Per VF VLAN spoof control */

Definition at line 201 of file e1000_82575.h.

#define E1000_DTXSWC_VLAN_SPOOF_SHIFT 8

Definition at line 203 of file e1000_82575.h.

#define E1000_DTXSWC_VMDQ_LOOPBACK_EN (1 << 31) /* global VF LB enable */

Definition at line 204 of file e1000_82575.h.

#define E1000_EEPROM_PCS_AUTONEG_DISABLE_BIT (1 << 14)

Definition at line 249 of file e1000_82575.h.

#define E1000_EICR_RX_QUEUE

Value:

( \
    E1000_EICR_RX_QUEUE0 |    \
    E1000_EICR_RX_QUEUE1 |    \
    E1000_EICR_RX_QUEUE2 |    \
    E1000_EICR_RX_QUEUE3)

Definition at line 72 of file e1000_82575.h.

#define E1000_EICR_TX_QUEUE

Value:

( \
    E1000_EICR_TX_QUEUE0 |    \
    E1000_EICR_TX_QUEUE1 |    \
    E1000_EICR_TX_QUEUE2 |    \
    E1000_EICR_TX_QUEUE3)

Definition at line 66 of file e1000_82575.h.

#define E1000_ETQF_1588 (1 << 30)

Definition at line 188 of file e1000_82575.h.

#define E1000_ETQF_FILTER_ENABLE (1 << 26)

Definition at line 187 of file e1000_82575.h.

#define E1000_FTQF_1588_TIME_STAMP 0x08000000

Definition at line 192 of file e1000_82575.h.

#define E1000_FTQF_MASK 0xF0000000

Definition at line 193 of file e1000_82575.h.

#define E1000_FTQF_MASK_PROTO_BP 0x10000000

Definition at line 194 of file e1000_82575.h.

#define E1000_FTQF_MASK_SOURCE_PORT_BP 0x80000000

Definition at line 195 of file e1000_82575.h.

#define E1000_FTQF_VF_BP 0x00008000

Definition at line 191 of file e1000_82575.h.

#define E1000_IMIREXT_CTRL_BP 0x00080000 /* Bypass check of ctrl bits */

Definition at line 80 of file e1000_82575.h.

#define E1000_IMIREXT_SIZE_BP 0x00001000 /* Packet size bypass */

Definition at line 79 of file e1000_82575.h.

#define E1000_IOVCTL 0x05BBC

Definition at line 237 of file e1000_82575.h.

#define E1000_IOVCTL_REUSE_VFQ 0x00000001

Definition at line 238 of file e1000_82575.h.

#define E1000_MRQC_ENABLE_RSS_4Q 0x00000002

Definition at line 59 of file e1000_82575.h.

#define E1000_MRQC_ENABLE_VMDQ 0x00000003

Definition at line 60 of file e1000_82575.h.

#define E1000_MRQC_ENABLE_VMDQ_RSS_2Q 0x00000005

Definition at line 62 of file e1000_82575.h.

#define E1000_MRQC_RSS_FIELD_IPV4_UDP 0x00400000

Definition at line 61 of file e1000_82575.h.

#define E1000_MRQC_RSS_FIELD_IPV6_UDP 0x00800000

Definition at line 63 of file e1000_82575.h.

#define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX 0x01000000

Definition at line 64 of file e1000_82575.h.

#define E1000_NVM_APME_82575 0x0400

Definition at line 197 of file e1000_82575.h.

#define E1000_RAR_ENTRIES_82575 16

Definition at line 41 of file e1000_82575.h.

#define E1000_RAR_ENTRIES_82576 24

Definition at line 42 of file e1000_82575.h.

#define E1000_RAR_ENTRIES_82580 24

Definition at line 43 of file e1000_82575.h.

#define E1000_RAR_ENTRIES_I350 32

Definition at line 44 of file e1000_82575.h.

#define E1000_RPLOLR_STRCRC 0x80000000

Definition at line 241 of file e1000_82575.h.

#define E1000_RPLOLR_STRVLAN 0x40000000

Definition at line 240 of file e1000_82575.h.

#define E1000_RXDADV_HDRBUFLEN_MASK 0x7FE0

Definition at line 111 of file e1000_82575.h.

#define E1000_RXDADV_HDRBUFLEN_SHIFT 5

Definition at line 112 of file e1000_82575.h.

#define E1000_RXDADV_STAT_TS 0x10000 /* Pkt was time stamped */

Definition at line 113 of file e1000_82575.h.

#define E1000_RXDADV_STAT_TSIP 0x08000 /* timestamp in packet */

Definition at line 114 of file e1000_82575.h.

#define E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Rx Queue */

Definition at line 165 of file e1000_82575.h.

#define E1000_RXPBS_SIZE_MASK_82576 0x0000007F

Definition at line 254 of file e1000_82575.h.

#define E1000_SRRCTL_BSIZEHDRSIZE_SHIFT 2 /* Shift _left_ */

Definition at line 52 of file e1000_82575.h.

#define E1000_SRRCTL_BSIZEPKT_SHIFT 10 /* Shift _right_ */

Definition at line 51 of file e1000_82575.h.

#define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000

Definition at line 53 of file e1000_82575.h.

#define E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS 0x0A000000

Definition at line 54 of file e1000_82575.h.

#define E1000_SRRCTL_DROP_EN 0x80000000

Definition at line 55 of file e1000_82575.h.

#define E1000_SRRCTL_TIMESTAMP 0x40000000

Definition at line 56 of file e1000_82575.h.

#define E1000_STAT_DEV_RST_SET 0x00100000

Definition at line 47 of file e1000_82575.h.

#define E1000_SW_SYNCH_MB 0x00000100

Definition at line 46 of file e1000_82575.h.

#define E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Tx Queue */

Definition at line 161 of file e1000_82575.h.

#define E1000_VLVF_ARRAY_SIZE 32

Definition at line 227 of file e1000_82575.h.

#define E1000_VLVF_LVLAN 0x00100000

Definition at line 231 of file e1000_82575.h.

#define E1000_VLVF_POOLSEL_MASK (0xFF << E1000_VLVF_POOLSEL_SHIFT)

Definition at line 230 of file e1000_82575.h.

#define E1000_VLVF_POOLSEL_SHIFT 12

Definition at line 229 of file e1000_82575.h.

#define E1000_VLVF_VLANID_ENABLE 0x80000000

Definition at line 232 of file e1000_82575.h.

#define E1000_VLVF_VLANID_MASK 0x00000FFF

Definition at line 228 of file e1000_82575.h.

#define E1000_VMOLR_AUPE 0x01000000 /* Accept untagged packets */

Definition at line 219 of file e1000_82575.h.

#define E1000_VMOLR_BAM 0x08000000 /* Accept Broadcast packets */

Definition at line 222 of file e1000_82575.h.

#define E1000_VMOLR_LPE 0x00010000 /* Accept Long packet */

Definition at line 217 of file e1000_82575.h.

#define E1000_VMOLR_MPME 0x10000000 /* Multicast promiscuous mode */

Definition at line 223 of file e1000_82575.h.

#define E1000_VMOLR_RLPML_MASK 0x00003FFF /* Long Packet Maximum Length mask */

Definition at line 216 of file e1000_82575.h.

#define E1000_VMOLR_ROMPE 0x02000000 /* Accept overflow multicast */

Definition at line 220 of file e1000_82575.h.

#define E1000_VMOLR_ROPE 0x04000000 /* Accept overflow unicast */

Definition at line 221 of file e1000_82575.h.

#define E1000_VMOLR_RSSE 0x00020000 /* Enable RSS */

Definition at line 218 of file e1000_82575.h.

#define E1000_VMOLR_STRCRC 0x80000000 /* CRC stripping enable */

Definition at line 225 of file e1000_82575.h.

#define E1000_VMOLR_STRVLAN 0x40000000 /* Vlan stripping enable */

Definition at line 224 of file e1000_82575.h.

#define E1000_VMVIR_VLANA_DEFAULT 0x40000000 /* Always use default VLAN */

Definition at line 234 of file e1000_82575.h.

#define E1000_VMVIR_VLANA_NEVER 0x80000000 /* Never insert VLAN tag */

Definition at line 235 of file e1000_82575.h.

#define E1000_VT_CTL_DEFAULT_POOL_MASK (0x7 << E1000_VT_CTL_DEFAULT_POOL_SHIFT)

Definition at line 208 of file e1000_82575.h.

#define E1000_VT_CTL_DEFAULT_POOL_SHIFT 7

Definition at line 207 of file e1000_82575.h.

#define E1000_VT_CTL_DISABLE_DEF_POOL (1 << 29)

Definition at line 212 of file e1000_82575.h.

#define E1000_VT_CTL_IGNORE_MAC (1 << 28)

Definition at line 211 of file e1000_82575.h.

#define E1000_VT_CTL_VM_REPL_EN (1 << 30)

Definition at line 213 of file e1000_82575.h.

#define ID_LED_DEFAULT_82575_SERDES

Value:

((ID_LED_DEF1_DEF2 << 12) | \
                                     (ID_LED_DEF1_DEF2 <<  8) | \
                                     (ID_LED_DEF1_DEF2 <<  4) | \
                                     (ID_LED_OFF1_ON2))

Definition at line 36 of file e1000_82575.h.

#define MAX_NUM_VFS 8

Definition at line 198 of file e1000_82575.h.

Function Documentation

void igb_power_down_phy_copper_82575 ( struct e1000_hw * hw )

igb_power_down_phy_copper_82575 - Remove link during PHY power down : pointer to the HW structure

In the case of a PHY power down to save power, or to turn off link during a driver unload, or wake on lan is not enabled, remove the link.

Definition at line 1533 of file e1000_82575.c.

void igb_power_up_serdes_link_82575 ( struct e1000_hw * hw )

igb_power_up_serdes_link_82575 - Power up the serdes link after shutdown : pointer to the HW structure

Definition at line 1041 of file e1000_82575.c.

void igb_rx_fifo_flush_82575 ( struct e1000_hw * hw )

igb_rx_fifo_flush_82575 - Clean rx fifo after RX enable : pointer to the HW structure

After rx enable if managability is enabled then there is likely some bad data at the start of the fifo and possibly in the DMA fifo. This function clears the fifos and flushes any packets that came in as rx was being enabled.

Definition at line 1612 of file e1000_82575.c.

u16 igb_rxpbs_adjust_82580 ( u32 data )

igb_rxpbs_adjust_82580 - adjust RXPBS value to reflect actual RX PBA size : data received by reading RXPBS register

The 82580 uses a table based approach for packet buffer allocation sizes. This function converts the retrieved value into the correct table value 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x0 36 72 144 1 2 4 8 16 0x8 35 70 140 rsv rsv rsv rsv rsv

Definition at line 2003 of file e1000_82575.c.

s32 igb_set_eee_i350 ( struct e1000_hw * hw )

igb_set_eee_i350 - Enable/disable EEE support : pointer to the HW structure

Enable/disable EEE based on setting in dev_spec structure.

Definition at line 2223 of file e1000_82575.c.

void igb_shutdown_serdes_link_82575 ( struct e1000_hw * hw )

igb_shutdown_serdes_link_82575 - Remove link during power down : pointer to the HW structure

In the case of fiber serdes, shut down optics and PCS on driver unload when management pass thru is not enabled.

Definition at line 1127 of file e1000_82575.c.

void igb_vmdq_set_anti_spoofing_pf	(	struct e1000_hw *	hw,
		bool	enable,
		int	pf
	)

igb_vmdq_set_anti_spoofing_pf - enable or disable anti-spoofing : pointer to the hardware struct : state to enter, either enabled or disabled : Physical Function pool - do not set anti-spoofing for the PF

enables/disables L2 switch anti-spoofing functionality.

Definition at line 1735 of file e1000_82575.c.

void igb_vmdq_set_loopback_pf	(	struct e1000_hw *	hw,
		bool	enable
	)

igb_vmdq_set_loopback_pf - enable or disable vmdq loopback : pointer to the hardware struct : state to enter, either enabled or disabled

enables/disables L2 switch loopback functionality.

Definition at line 1767 of file e1000_82575.c.

void igb_vmdq_set_replication_pf	(	struct e1000_hw *	hw,
		bool	enable
	)

igb_vmdq_set_replication_pf - enable or disable vmdq replication : pointer to the hardware struct : state to enter, either enabled or disabled

enables/disables replication of packets across multiple pools.

Definition at line 1803 of file e1000_82575.c.

Functions
void	igb_shutdown_serdes_link_82575 (struct e1000_hw *hw)

void	igb_power_up_serdes_link_82575 (struct e1000_hw *hw)

void	igb_power_down_phy_copper_82575 (struct e1000_hw *hw)

void	igb_rx_fifo_flush_82575 (struct e1000_hw *hw)

void	igb_vmdq_set_anti_spoofing_pf (struct e1000_hw *, bool, int)

void	igb_vmdq_set_loopback_pf (struct e1000_hw *, bool)

void	igb_vmdq_set_replication_pf (struct e1000_hw *, bool)

u16	igb_rxpbs_adjust_82580 (u32 data)

s32	igb_set_eee_i350 (struct e1000_hw *)

Data Structures

Macros

Functions

Macro Definition Documentation

Function Documentation