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Data Structures | Macros | Typedefs
eata_generic.h File Reference

Go to the source code of this file.

Data Structures

struct  reg_bit
 
struct  reg_abit
 
struct  eata_register
 
struct  get_conf
 
struct  eata_sg_list
 
struct  eata_ccb
 
struct  eata_sp
 
struct  hstd
 
struct  drive_geom_emul
 
struct  geom_emul
 

Macros

#define R_LIMIT   0x20000
 
#define MAXISA   4
 
#define MAXEISA   16
 
#define MAXPCI   16
 
#define MAXIRQ   16
 
#define MAXTARGET   16
 
#define MAXCHANNEL   3
 
#define IS_ISA   'I'
 
#define IS_EISA   'E'
 
#define IS_PCI   'P'
 
#define BROKEN_INQUIRY   1
 
#define BUSMASTER   0xff
 
#define PIO   0xfe
 
#define EATA_SIGNATURE   0x45415441 /* BIG ENDIAN coded "EATA" sig. */
 
#define DPT_ID1   0x12
 
#define DPT_ID2   0x14
 
#define ATT_ID1   0x06
 
#define ATT_ID2   0x94
 
#define ATT_ID3   0x0
 
#define NEC_ID1   0x38
 
#define NEC_ID2   0xa3
 
#define NEC_ID3   0x82
 
#define EATA_CP_SIZE   44
 
#define MAX_PCI_DEVICES   32 /* Maximum # Of Devices Per Bus */
 
#define MAX_METHOD_2   16 /* Max Devices For Method 2 */
 
#define MAX_PCI_BUS   16 /* Maximum # Of Busses Allowed */
 
#define SG_SIZE   64
 
#define SG_SIZE_BIG   252 /* max. 8096 elements, 64k */
 
#define UPPER_DEVICE_QUEUE_LIMIT
 
#define TYPE_DISK_QUEUE   16
 
#define TYPE_TAPE_QUEUE   4
 
#define TYPE_ROM_QUEUE   4
 
#define TYPE_OTHER_QUEUE   2
 
#define FREE   0
 
#define OK   0
 
#define NO_TIMEOUT   0
 
#define USED   1
 
#define TIMEOUT   2
 
#define RESET   4
 
#define LOCKED   8
 
#define ABORTED   16
 
#define READ   0
 
#define WRITE   1
 
#define OTHER   2
 
#define HD(cmd)   ((hostdata *)&(cmd->device->host->hostdata))
 
#define CD(cmd)   ((struct eata_ccb *)(cmd->host_scribble))
 
#define SD(host)   ((hostdata *)&(host->hostdata))
 
#define PCI_REG_DPTconfig   0x40
 
#define PCI_REG_PumpModeAddress   0x44
 
#define PCI_REG_PumpModeData   0x48
 
#define PCI_REG_ConfigParam1   0x50
 
#define PCI_REG_ConfigParam2   0x54
 
#define EATA_CMD_PIO_SETUPTEST   0xc6
 
#define EATA_CMD_PIO_READ_CONFIG   0xf0
 
#define EATA_CMD_PIO_SET_CONFIG   0xf1
 
#define EATA_CMD_PIO_SEND_CP   0xf2
 
#define EATA_CMD_PIO_RECEIVE_SP   0xf3
 
#define EATA_CMD_PIO_TRUNC   0xf4
 
#define EATA_CMD_RESET   0xf9
 
#define EATA_CMD_IMMEDIATE   0xfa
 
#define EATA_CMD_DMA_READ_CONFIG   0xfd
 
#define EATA_CMD_DMA_SET_CONFIG   0xfe
 
#define EATA_CMD_DMA_SEND_CP   0xff
 
#define ECS_EMULATE_SENSE   0xd4
 
#define EATA_GENERIC_ABORT   0x00
 
#define EATA_SPECIFIC_RESET   0x01
 
#define EATA_BUS_RESET   0x02
 
#define EATA_SPECIFIC_ABORT   0x03
 
#define EATA_QUIET_INTR   0x04
 
#define EATA_COLD_BOOT_HBA   0x06 /* Only as a last resort */
 
#define EATA_FORCE_IO   0x07
 
#define HA_CTRLREG   0x206 /* control register for HBA */
 
#define HA_CTRL_DISINT   0x02 /* CTRLREG: disable interrupts */
 
#define HA_CTRL_RESCPU   0x04 /* CTRLREG: reset processor */
 
#define HA_CTRL_8HEADS
 
#define HA_WCOMMAND   0x07 /* command register offset */
 
#define HA_WIFC   0x06 /* immediate command offset */
 
#define HA_WCODE   0x05
 
#define HA_WCODE2   0x04
 
#define HA_WDMAADDR   0x02 /* DMA address LSB offset */
 
#define HA_RAUXSTAT   0x08 /* aux status register offset*/
 
#define HA_RSTATUS   0x07 /* status register offset */
 
#define HA_RDATA   0x00 /* data register (16bit) */
 
#define HA_WDATA   0x00 /* data register (16bit) */
 
#define HA_ABUSY   0x01 /* aux busy bit */
 
#define HA_AIRQ   0x02 /* aux IRQ pending bit */
 
#define HA_SERROR   0x01 /* pr. command ended in error*/
 
#define HA_SMORE   0x02 /* more data soon to come */
 
#define HA_SCORR   0x04 /* data corrected */
 
#define HA_SDRQ   0x08 /* data request active */
 
#define HA_SSC   0x10 /* seek complete */
 
#define HA_SFAULT   0x20 /* write fault */
 
#define HA_SREADY   0x40 /* drive ready */
 
#define HA_SBUSY   0x80 /* drive busy */
 
#define HA_SDRDY   HA_SSC+HA_SREADY+HA_SDRQ
 
#define HA_NO_ERROR   0x00 /* No Error */
 
#define HA_ERR_SEL_TO   0x01 /* Selection Timeout */
 
#define HA_ERR_CMD_TO   0x02 /* Command Timeout */
 
#define HA_BUS_RESET   0x03 /* SCSI Bus Reset Received */
 
#define HA_INIT_POWERUP   0x04 /* Initial Controller Power-up */
 
#define HA_UNX_BUSPHASE   0x05 /* Unexpected Bus Phase */
 
#define HA_UNX_BUS_FREE   0x06 /* Unexpected Bus Free */
 
#define HA_BUS_PARITY   0x07 /* Bus Parity Error */
 
#define HA_SCSI_HUNG   0x08 /* SCSI Hung */
 
#define HA_UNX_MSGRJCT   0x09 /* Unexpected Message Rejected */
 
#define HA_RESET_STUCK   0x0a /* SCSI Bus Reset Stuck */
 
#define HA_RSENSE_FAIL   0x0b /* Auto Request-Sense Failed */
 
#define HA_PARITY_ERR   0x0c /* Controller Ram Parity Error */
 
#define HA_CP_ABORT_NA   0x0d /* Abort Message sent to non-active cmd */
 
#define HA_CP_ABORTED   0x0e /* Abort Message sent to active cmd */
 
#define HA_CP_RESET_NA   0x0f /* Reset Message sent to non-active cmd */
 
#define HA_CP_RESET   0x10 /* Reset Message sent to active cmd */
 
#define HA_ECC_ERR   0x11 /* Controller Ram ECC Error */
 
#define HA_PCI_PARITY   0x12 /* PCI Parity Error */
 
#define HA_PCI_MABORT   0x13 /* PCI Master Abort */
 
#define HA_PCI_TABORT   0x14 /* PCI Target Abort */
 
#define HA_PCI_STABORT   0x15 /* PCI Signaled Target Abort */
 

Typedefs

typedef struct hstd hostdata
 

Macro Definition Documentation

#define ABORTED   16

Definition at line 76 of file eata_generic.h.

#define ATT_ID1   0x06

Definition at line 44 of file eata_generic.h.

#define ATT_ID2   0x94

Definition at line 45 of file eata_generic.h.

#define ATT_ID3   0x0

Definition at line 46 of file eata_generic.h.

#define BROKEN_INQUIRY   1

Definition at line 34 of file eata_generic.h.

#define BUSMASTER   0xff

Definition at line 36 of file eata_generic.h.

#define CD (   cmd)    ((struct eata_ccb *)(cmd->host_scribble))

Definition at line 83 of file eata_generic.h.

#define DPT_ID1   0x12

Definition at line 41 of file eata_generic.h.

#define DPT_ID2   0x14

Definition at line 42 of file eata_generic.h.

#define EATA_BUS_RESET   0x02

Definition at line 114 of file eata_generic.h.

#define EATA_CMD_DMA_READ_CONFIG   0xfd

Definition at line 106 of file eata_generic.h.

#define EATA_CMD_DMA_SEND_CP   0xff

Definition at line 108 of file eata_generic.h.

#define EATA_CMD_DMA_SET_CONFIG   0xfe

Definition at line 107 of file eata_generic.h.

#define EATA_CMD_IMMEDIATE   0xfa

Definition at line 104 of file eata_generic.h.

#define EATA_CMD_PIO_READ_CONFIG   0xf0

Definition at line 97 of file eata_generic.h.

#define EATA_CMD_PIO_RECEIVE_SP   0xf3

Definition at line 100 of file eata_generic.h.

#define EATA_CMD_PIO_SEND_CP   0xf2

Definition at line 99 of file eata_generic.h.

#define EATA_CMD_PIO_SET_CONFIG   0xf1

Definition at line 98 of file eata_generic.h.

#define EATA_CMD_PIO_SETUPTEST   0xc6

Definition at line 96 of file eata_generic.h.

#define EATA_CMD_PIO_TRUNC   0xf4

Definition at line 101 of file eata_generic.h.

#define EATA_CMD_RESET   0xf9

Definition at line 103 of file eata_generic.h.

#define EATA_COLD_BOOT_HBA   0x06 /* Only as a last resort */

Definition at line 117 of file eata_generic.h.

#define EATA_CP_SIZE   44

Definition at line 53 of file eata_generic.h.

#define EATA_FORCE_IO   0x07

Definition at line 118 of file eata_generic.h.

#define EATA_GENERIC_ABORT   0x00

Definition at line 112 of file eata_generic.h.

#define EATA_QUIET_INTR   0x04

Definition at line 116 of file eata_generic.h.

#define EATA_SIGNATURE   0x45415441 /* BIG ENDIAN coded "EATA" sig. */

Definition at line 39 of file eata_generic.h.

#define EATA_SPECIFIC_ABORT   0x03

Definition at line 115 of file eata_generic.h.

#define EATA_SPECIFIC_RESET   0x01

Definition at line 113 of file eata_generic.h.

#define ECS_EMULATE_SENSE   0xd4

Definition at line 110 of file eata_generic.h.

#define FREE   0

Definition at line 69 of file eata_generic.h.

#define HA_ABUSY   0x01 /* aux busy bit */

Definition at line 135 of file eata_generic.h.

#define HA_AIRQ   0x02 /* aux IRQ pending bit */

Definition at line 136 of file eata_generic.h.

#define HA_BUS_PARITY   0x07 /* Bus Parity Error */

Definition at line 158 of file eata_generic.h.

#define HA_BUS_RESET   0x03 /* SCSI Bus Reset Received */

Definition at line 154 of file eata_generic.h.

#define HA_CP_ABORT_NA   0x0d /* Abort Message sent to non-active cmd */

Definition at line 164 of file eata_generic.h.

#define HA_CP_ABORTED   0x0e /* Abort Message sent to active cmd */

Definition at line 165 of file eata_generic.h.

#define HA_CP_RESET   0x10 /* Reset Message sent to active cmd */

Definition at line 167 of file eata_generic.h.

#define HA_CP_RESET_NA   0x0f /* Reset Message sent to non-active cmd */

Definition at line 166 of file eata_generic.h.

#define HA_CTRL_8HEADS
Value:
0x08 /* CTRLREG: set for drives with*
* >=8 heads (WD1003 rudimentary :-) */

Definition at line 123 of file eata_generic.h.

#define HA_CTRL_DISINT   0x02 /* CTRLREG: disable interrupts */

Definition at line 121 of file eata_generic.h.

#define HA_CTRL_RESCPU   0x04 /* CTRLREG: reset processor */

Definition at line 122 of file eata_generic.h.

#define HA_CTRLREG   0x206 /* control register for HBA */

Definition at line 120 of file eata_generic.h.

#define HA_ECC_ERR   0x11 /* Controller Ram ECC Error */

Definition at line 168 of file eata_generic.h.

#define HA_ERR_CMD_TO   0x02 /* Command Timeout */

Definition at line 153 of file eata_generic.h.

#define HA_ERR_SEL_TO   0x01 /* Selection Timeout */

Definition at line 152 of file eata_generic.h.

#define HA_INIT_POWERUP   0x04 /* Initial Controller Power-up */

Definition at line 155 of file eata_generic.h.

#define HA_NO_ERROR   0x00 /* No Error */

Definition at line 151 of file eata_generic.h.

#define HA_PARITY_ERR   0x0c /* Controller Ram Parity Error */

Definition at line 163 of file eata_generic.h.

#define HA_PCI_MABORT   0x13 /* PCI Master Abort */

Definition at line 170 of file eata_generic.h.

#define HA_PCI_PARITY   0x12 /* PCI Parity Error */

Definition at line 169 of file eata_generic.h.

#define HA_PCI_STABORT   0x15 /* PCI Signaled Target Abort */

Definition at line 172 of file eata_generic.h.

#define HA_PCI_TABORT   0x14 /* PCI Target Abort */

Definition at line 171 of file eata_generic.h.

#define HA_RAUXSTAT   0x08 /* aux status register offset*/

Definition at line 130 of file eata_generic.h.

#define HA_RDATA   0x00 /* data register (16bit) */

Definition at line 132 of file eata_generic.h.

#define HA_RESET_STUCK   0x0a /* SCSI Bus Reset Stuck */

Definition at line 161 of file eata_generic.h.

#define HA_RSENSE_FAIL   0x0b /* Auto Request-Sense Failed */

Definition at line 162 of file eata_generic.h.

#define HA_RSTATUS   0x07 /* status register offset */

Definition at line 131 of file eata_generic.h.

#define HA_SBUSY   0x80 /* drive busy */

Definition at line 144 of file eata_generic.h.

#define HA_SCORR   0x04 /* data corrected */

Definition at line 139 of file eata_generic.h.

#define HA_SCSI_HUNG   0x08 /* SCSI Hung */

Definition at line 159 of file eata_generic.h.

#define HA_SDRDY   HA_SSC+HA_SREADY+HA_SDRQ

Definition at line 145 of file eata_generic.h.

#define HA_SDRQ   0x08 /* data request active */

Definition at line 140 of file eata_generic.h.

#define HA_SERROR   0x01 /* pr. command ended in error*/

Definition at line 137 of file eata_generic.h.

#define HA_SFAULT   0x20 /* write fault */

Definition at line 142 of file eata_generic.h.

#define HA_SMORE   0x02 /* more data soon to come */

Definition at line 138 of file eata_generic.h.

#define HA_SREADY   0x40 /* drive ready */

Definition at line 143 of file eata_generic.h.

#define HA_SSC   0x10 /* seek complete */

Definition at line 141 of file eata_generic.h.

#define HA_UNX_BUS_FREE   0x06 /* Unexpected Bus Free */

Definition at line 157 of file eata_generic.h.

#define HA_UNX_BUSPHASE   0x05 /* Unexpected Bus Phase */

Definition at line 156 of file eata_generic.h.

#define HA_UNX_MSGRJCT   0x09 /* Unexpected Message Rejected */

Definition at line 160 of file eata_generic.h.

#define HA_WCODE   0x05

Definition at line 127 of file eata_generic.h.

#define HA_WCODE2   0x04

Definition at line 128 of file eata_generic.h.

#define HA_WCOMMAND   0x07 /* command register offset */

Definition at line 125 of file eata_generic.h.

#define HA_WDATA   0x00 /* data register (16bit) */

Definition at line 133 of file eata_generic.h.

#define HA_WDMAADDR   0x02 /* DMA address LSB offset */

Definition at line 129 of file eata_generic.h.

#define HA_WIFC   0x06 /* immediate command offset */

Definition at line 126 of file eata_generic.h.

#define HD (   cmd)    ((hostdata *)&(cmd->device->host->hostdata))

Definition at line 82 of file eata_generic.h.

#define IS_EISA   'E'

Definition at line 31 of file eata_generic.h.

#define IS_ISA   'I'

Definition at line 30 of file eata_generic.h.

#define IS_PCI   'P'

Definition at line 32 of file eata_generic.h.

#define LOCKED   8

Definition at line 75 of file eata_generic.h.

#define MAX_METHOD_2   16 /* Max Devices For Method 2 */

Definition at line 56 of file eata_generic.h.

#define MAX_PCI_BUS   16 /* Maximum # Of Busses Allowed */

Definition at line 57 of file eata_generic.h.

#define MAX_PCI_DEVICES   32 /* Maximum # Of Devices Per Bus */

Definition at line 55 of file eata_generic.h.

#define MAXCHANNEL   3

Definition at line 28 of file eata_generic.h.

#define MAXEISA   16

Definition at line 24 of file eata_generic.h.

#define MAXIRQ   16

Definition at line 26 of file eata_generic.h.

#define MAXISA   4

Definition at line 23 of file eata_generic.h.

#define MAXPCI   16

Definition at line 25 of file eata_generic.h.

#define MAXTARGET   16

Definition at line 27 of file eata_generic.h.

#define NEC_ID1   0x38

Definition at line 48 of file eata_generic.h.

#define NEC_ID2   0xa3

Definition at line 49 of file eata_generic.h.

#define NEC_ID3   0x82

Definition at line 50 of file eata_generic.h.

#define NO_TIMEOUT   0

Definition at line 71 of file eata_generic.h.

#define OK   0

Definition at line 70 of file eata_generic.h.

#define OTHER   2

Definition at line 80 of file eata_generic.h.

#define PCI_REG_ConfigParam1   0x50

Definition at line 92 of file eata_generic.h.

#define PCI_REG_ConfigParam2   0x54

Definition at line 93 of file eata_generic.h.

#define PCI_REG_DPTconfig   0x40

Definition at line 89 of file eata_generic.h.

#define PCI_REG_PumpModeAddress   0x44

Definition at line 90 of file eata_generic.h.

#define PCI_REG_PumpModeData   0x48

Definition at line 91 of file eata_generic.h.

#define PIO   0xfe

Definition at line 37 of file eata_generic.h.

#define R_LIMIT   0x20000

Definition at line 21 of file eata_generic.h.

#define READ   0

Definition at line 78 of file eata_generic.h.

#define RESET   4

Definition at line 74 of file eata_generic.h.

#define SD (   host)    ((hostdata *)&(host->hostdata))

Definition at line 84 of file eata_generic.h.

#define SG_SIZE   64

Definition at line 59 of file eata_generic.h.

#define SG_SIZE_BIG   252 /* max. 8096 elements, 64k */

Definition at line 60 of file eata_generic.h.

#define TIMEOUT   2

Definition at line 73 of file eata_generic.h.

#define TYPE_DISK_QUEUE   16

Definition at line 64 of file eata_generic.h.

#define TYPE_OTHER_QUEUE   2

Definition at line 67 of file eata_generic.h.

#define TYPE_ROM_QUEUE   4

Definition at line 66 of file eata_generic.h.

#define TYPE_TAPE_QUEUE   4

Definition at line 65 of file eata_generic.h.

#define UPPER_DEVICE_QUEUE_LIMIT
Value:
64 /* The limit we have to set for the
* device queue to keep the broken
* midlevel SCSI code from producing
* bogus timeouts
*/

Definition at line 62 of file eata_generic.h.

#define USED   1

Definition at line 72 of file eata_generic.h.

#define WRITE   1

Definition at line 79 of file eata_generic.h.

Typedef Documentation

Definition at line 309 of file scsi_device.h.