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ene_ir.c
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1 /*
2  * driver for ENE KB3926 B/C/D/E/F CIR (pnp id: ENE0XXX)
3  *
4  * Copyright (C) 2010 Maxim Levitsky <[email protected]>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of the
9  * License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
19  * USA
20  *
21  * Special thanks to:
22  * Sami R. <[email protected]> for lot of help in debugging and therefore
23  * bringing to life support for transmission & learning mode.
24  *
25  * Charlie Andrews <[email protected]> for lots of help in
26  * bringing up the support of new firmware buffer that is popular
27  * on latest notebooks
28  *
29  * ENE for partial device documentation
30  *
31  */
32 
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pnp.h>
38 #include <linux/io.h>
39 #include <linux/interrupt.h>
40 #include <linux/sched.h>
41 #include <linux/slab.h>
42 #include <media/rc-core.h>
43 #include "ene_ir.h"
44 
45 static int sample_period;
46 static bool learning_mode_force;
47 static int debug;
48 static bool txsim;
49 
50 static void ene_set_reg_addr(struct ene_device *dev, u16 reg)
51 {
52  outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
53  outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
54 }
55 
56 /* read a hardware register */
57 static u8 ene_read_reg(struct ene_device *dev, u16 reg)
58 {
59  u8 retval;
60  ene_set_reg_addr(dev, reg);
61  retval = inb(dev->hw_io + ENE_IO);
62  dbg_regs("reg %04x == %02x", reg, retval);
63  return retval;
64 }
65 
66 /* write a hardware register */
67 static void ene_write_reg(struct ene_device *dev, u16 reg, u8 value)
68 {
69  dbg_regs("reg %04x <- %02x", reg, value);
70  ene_set_reg_addr(dev, reg);
71  outb(value, dev->hw_io + ENE_IO);
72 }
73 
74 /* Set bits in hardware register */
75 static void ene_set_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
76 {
77  dbg_regs("reg %04x |= %02x", reg, mask);
78  ene_set_reg_addr(dev, reg);
79  outb(inb(dev->hw_io + ENE_IO) | mask, dev->hw_io + ENE_IO);
80 }
81 
82 /* Clear bits in hardware register */
83 static void ene_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask)
84 {
85  dbg_regs("reg %04x &= ~%02x ", reg, mask);
86  ene_set_reg_addr(dev, reg);
87  outb(inb(dev->hw_io + ENE_IO) & ~mask, dev->hw_io + ENE_IO);
88 }
89 
90 /* A helper to set/clear a bit in register according to boolean variable */
91 static void ene_set_clear_reg_mask(struct ene_device *dev, u16 reg, u8 mask,
92  bool set)
93 {
94  if (set)
95  ene_set_reg_mask(dev, reg, mask);
96  else
97  ene_clear_reg_mask(dev, reg, mask);
98 }
99 
100 /* detect hardware features */
101 static int ene_hw_detect(struct ene_device *dev)
102 {
103  u8 chip_major, chip_minor;
104  u8 hw_revision, old_ver;
105  u8 fw_reg2, fw_reg1;
106 
107  ene_clear_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
108  chip_major = ene_read_reg(dev, ENE_ECVER_MAJOR);
109  chip_minor = ene_read_reg(dev, ENE_ECVER_MINOR);
110  ene_set_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD);
111 
112  hw_revision = ene_read_reg(dev, ENE_ECHV);
113  old_ver = ene_read_reg(dev, ENE_HW_VER_OLD);
114 
115  dev->pll_freq = (ene_read_reg(dev, ENE_PLLFRH) << 4) +
116  (ene_read_reg(dev, ENE_PLLFRL) >> 4);
117 
118  if (sample_period != ENE_DEFAULT_SAMPLE_PERIOD)
119  dev->rx_period_adjust =
120  dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 2 : 4;
121 
122  if (hw_revision == 0xFF) {
123  pr_warn("device seems to be disabled\n");
124  pr_warn("send a mail to [email protected]\n");
125  pr_warn("please attach output of acpidump and dmidecode\n");
126  return -ENODEV;
127  }
128 
129  pr_notice("chip is 0x%02x%02x - kbver = 0x%02x, rev = 0x%02x\n",
130  chip_major, chip_minor, old_ver, hw_revision);
131 
132  pr_notice("PLL freq = %d\n", dev->pll_freq);
133 
134  if (chip_major == 0x33) {
135  pr_warn("chips 0x33xx aren't supported\n");
136  return -ENODEV;
137  }
138 
139  if (chip_major == 0x39 && chip_minor == 0x26 && hw_revision == 0xC0) {
140  dev->hw_revision = ENE_HW_C;
141  pr_notice("KB3926C detected\n");
142  } else if (old_ver == 0x24 && hw_revision == 0xC0) {
143  dev->hw_revision = ENE_HW_B;
144  pr_notice("KB3926B detected\n");
145  } else {
146  dev->hw_revision = ENE_HW_D;
147  pr_notice("KB3926D or higher detected\n");
148  }
149 
150  /* detect features hardware supports */
151  if (dev->hw_revision < ENE_HW_C)
152  return 0;
153 
154  fw_reg1 = ene_read_reg(dev, ENE_FW1);
155  fw_reg2 = ene_read_reg(dev, ENE_FW2);
156 
157  pr_notice("Firmware regs: %02x %02x\n", fw_reg1, fw_reg2);
158 
159  dev->hw_use_gpio_0a = !!(fw_reg2 & ENE_FW2_GP0A);
160  dev->hw_learning_and_tx_capable = !!(fw_reg2 & ENE_FW2_LEARNING);
161  dev->hw_extra_buffer = !!(fw_reg1 & ENE_FW1_HAS_EXTRA_BUF);
162 
163  if (dev->hw_learning_and_tx_capable)
164  dev->hw_fan_input = !!(fw_reg2 & ENE_FW2_FAN_INPUT);
165 
166  pr_notice("Hardware features:\n");
167 
168  if (dev->hw_learning_and_tx_capable) {
169  pr_notice("* Supports transmitting & learning mode\n");
170  pr_notice(" This feature is rare and therefore,\n");
171  pr_notice(" you are welcome to test it,\n");
172  pr_notice(" and/or contact the author via:\n");
173  pr_notice(" [email protected]\n");
174  pr_notice(" or [email protected]\n");
175 
176  pr_notice("* Uses GPIO %s for IR raw input\n",
177  dev->hw_use_gpio_0a ? "40" : "0A");
178 
179  if (dev->hw_fan_input)
180  pr_notice("* Uses unused fan feedback input as source of demodulated IR data\n");
181  }
182 
183  if (!dev->hw_fan_input)
184  pr_notice("* Uses GPIO %s for IR demodulated input\n",
185  dev->hw_use_gpio_0a ? "0A" : "40");
186 
187  if (dev->hw_extra_buffer)
188  pr_notice("* Uses new style input buffer\n");
189  return 0;
190 }
191 
192 /* Read properities of hw sample buffer */
193 static void ene_rx_setup_hw_buffer(struct ene_device *dev)
194 {
195  u16 tmp;
196 
197  ene_rx_read_hw_pointer(dev);
198  dev->r_pointer = dev->w_pointer;
199 
200  if (!dev->hw_extra_buffer) {
201  dev->buffer_len = ENE_FW_PACKET_SIZE * 2;
202  return;
203  }
204 
205  tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER);
206  tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER+1) << 8;
207  dev->extra_buf1_address = tmp;
208 
209  dev->extra_buf1_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 2);
210 
211  tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 3);
212  tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 4) << 8;
213  dev->extra_buf2_address = tmp;
214 
215  dev->extra_buf2_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 5);
216 
217  dev->buffer_len = dev->extra_buf1_len + dev->extra_buf2_len + 8;
218 
219  pr_notice("Hardware uses 2 extended buffers:\n");
220  pr_notice(" 0x%04x - len : %d\n",
221  dev->extra_buf1_address, dev->extra_buf1_len);
222  pr_notice(" 0x%04x - len : %d\n",
223  dev->extra_buf2_address, dev->extra_buf2_len);
224 
225  pr_notice("Total buffer len = %d\n", dev->buffer_len);
226 
227  if (dev->buffer_len > 64 || dev->buffer_len < 16)
228  goto error;
229 
230  if (dev->extra_buf1_address > 0xFBFC ||
231  dev->extra_buf1_address < 0xEC00)
232  goto error;
233 
234  if (dev->extra_buf2_address > 0xFBFC ||
235  dev->extra_buf2_address < 0xEC00)
236  goto error;
237 
238  if (dev->r_pointer > dev->buffer_len)
239  goto error;
240 
241  ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
242  return;
243 error:
244  pr_warn("Error validating extra buffers, device probably won't work\n");
245  dev->hw_extra_buffer = false;
246  ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
247 }
248 
249 
250 /* Restore the pointers to extra buffers - to make module reload work*/
251 static void ene_rx_restore_hw_buffer(struct ene_device *dev)
252 {
253  if (!dev->hw_extra_buffer)
254  return;
255 
256  ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 0,
257  dev->extra_buf1_address & 0xFF);
258  ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 1,
259  dev->extra_buf1_address >> 8);
260  ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 2, dev->extra_buf1_len);
261 
262  ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 3,
263  dev->extra_buf2_address & 0xFF);
264  ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 4,
265  dev->extra_buf2_address >> 8);
266  ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 5,
267  dev->extra_buf2_len);
268  ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND);
269 }
270 
271 /* Read hardware write pointer */
272 static void ene_rx_read_hw_pointer(struct ene_device *dev)
273 {
274  if (dev->hw_extra_buffer)
275  dev->w_pointer = ene_read_reg(dev, ENE_FW_RX_POINTER);
276  else
277  dev->w_pointer = ene_read_reg(dev, ENE_FW2)
278  & ENE_FW2_BUF_WPTR ? 0 : ENE_FW_PACKET_SIZE;
279 
280  dbg_verbose("RB: HW write pointer: %02x, driver read pointer: %02x",
281  dev->w_pointer, dev->r_pointer);
282 }
283 
284 /* Gets address of next sample from HW ring buffer */
285 static int ene_rx_get_sample_reg(struct ene_device *dev)
286 {
287  int r_pointer;
288 
289  if (dev->r_pointer == dev->w_pointer) {
290  dbg_verbose("RB: hit end, try update w_pointer");
291  ene_rx_read_hw_pointer(dev);
292  }
293 
294  if (dev->r_pointer == dev->w_pointer) {
295  dbg_verbose("RB: end of data at %d", dev->r_pointer);
296  return 0;
297  }
298 
299  dbg_verbose("RB: reading at offset %d", dev->r_pointer);
300  r_pointer = dev->r_pointer;
301 
302  dev->r_pointer++;
303  if (dev->r_pointer == dev->buffer_len)
304  dev->r_pointer = 0;
305 
306  dbg_verbose("RB: next read will be from offset %d", dev->r_pointer);
307 
308  if (r_pointer < 8) {
309  dbg_verbose("RB: read at main buffer at %d", r_pointer);
310  return ENE_FW_SAMPLE_BUFFER + r_pointer;
311  }
312 
313  r_pointer -= 8;
314 
315  if (r_pointer < dev->extra_buf1_len) {
316  dbg_verbose("RB: read at 1st extra buffer at %d", r_pointer);
317  return dev->extra_buf1_address + r_pointer;
318  }
319 
320  r_pointer -= dev->extra_buf1_len;
321 
322  if (r_pointer < dev->extra_buf2_len) {
323  dbg_verbose("RB: read at 2nd extra buffer at %d", r_pointer);
324  return dev->extra_buf2_address + r_pointer;
325  }
326 
327  dbg("attempt to read beyond ring buffer end");
328  return 0;
329 }
330 
331 /* Sense current received carrier */
332 void ene_rx_sense_carrier(struct ene_device *dev)
333 {
334  DEFINE_IR_RAW_EVENT(ev);
335 
336  int carrier, duty_cycle;
337  int period = ene_read_reg(dev, ENE_CIRCAR_PRD);
338  int hperiod = ene_read_reg(dev, ENE_CIRCAR_HPRD);
339 
340  if (!(period & ENE_CIRCAR_PRD_VALID))
341  return;
342 
343  period &= ~ENE_CIRCAR_PRD_VALID;
344 
345  if (!period)
346  return;
347 
348  dbg("RX: hardware carrier period = %02x", period);
349  dbg("RX: hardware carrier pulse period = %02x", hperiod);
350 
351  carrier = 2000000 / period;
352  duty_cycle = (hperiod * 100) / period;
353  dbg("RX: sensed carrier = %d Hz, duty cycle %d%%",
354  carrier, duty_cycle);
355  if (dev->carrier_detect_enabled) {
356  ev.carrier_report = true;
357  ev.carrier = carrier;
358  ev.duty_cycle = duty_cycle;
359  ir_raw_event_store(dev->rdev, &ev);
360  }
361 }
362 
363 /* this enables/disables the CIR RX engine */
364 static void ene_rx_enable_cir_engine(struct ene_device *dev, bool enable)
365 {
366  ene_set_clear_reg_mask(dev, ENE_CIRCFG,
367  ENE_CIRCFG_RX_EN | ENE_CIRCFG_RX_IRQ, enable);
368 }
369 
370 /* this selects input for CIR engine. Ether GPIO 0A or GPIO40*/
371 static void ene_rx_select_input(struct ene_device *dev, bool gpio_0a)
372 {
373  ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_GPIO0A, gpio_0a);
374 }
375 
376 /*
377  * this enables alternative input via fan tachometer sensor and bypasses
378  * the hw CIR engine
379  */
380 static void ene_rx_enable_fan_input(struct ene_device *dev, bool enable)
381 {
382  if (!dev->hw_fan_input)
383  return;
384 
385  if (!enable)
386  ene_write_reg(dev, ENE_FAN_AS_IN1, 0);
387  else {
388  ene_write_reg(dev, ENE_FAN_AS_IN1, ENE_FAN_AS_IN1_EN);
389  ene_write_reg(dev, ENE_FAN_AS_IN2, ENE_FAN_AS_IN2_EN);
390  }
391 }
392 
393 /* setup the receiver for RX*/
394 static void ene_rx_setup(struct ene_device *dev)
395 {
396  bool learning_mode = dev->learning_mode_enabled ||
397  dev->carrier_detect_enabled;
398  int sample_period_adjust = 0;
399 
400  dbg("RX: setup receiver, learning mode = %d", learning_mode);
401 
402 
403  /* This selects RLC input and clears CFG2 settings */
404  ene_write_reg(dev, ENE_CIRCFG2, 0x00);
405 
406  /* set sample period*/
407  if (sample_period == ENE_DEFAULT_SAMPLE_PERIOD)
408  sample_period_adjust =
409  dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 1 : 2;
410 
411  ene_write_reg(dev, ENE_CIRRLC_CFG,
412  (sample_period + sample_period_adjust) |
413  ENE_CIRRLC_CFG_OVERFLOW);
414  /* revB doesn't support inputs */
415  if (dev->hw_revision < ENE_HW_C)
416  goto select_timeout;
417 
418  if (learning_mode) {
419 
420  WARN_ON(!dev->hw_learning_and_tx_capable);
421 
422  /* Enable the opposite of the normal input
423  That means that if GPIO40 is normally used, use GPIO0A
424  and vice versa.
425  This input will carry non demodulated
426  signal, and we will tell the hw to demodulate it itself */
427  ene_rx_select_input(dev, !dev->hw_use_gpio_0a);
428  dev->rx_fan_input_inuse = false;
429 
430  /* Enable carrier demodulation */
431  ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
432 
433  /* Enable carrier detection */
434  ene_write_reg(dev, ENE_CIRCAR_PULS, 0x63);
435  ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT,
436  dev->carrier_detect_enabled || debug);
437  } else {
438  if (dev->hw_fan_input)
439  dev->rx_fan_input_inuse = true;
440  else
441  ene_rx_select_input(dev, dev->hw_use_gpio_0a);
442 
443  /* Disable carrier detection & demodulation */
444  ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD);
445  ene_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT);
446  }
447 
448 select_timeout:
449  if (dev->rx_fan_input_inuse) {
450  dev->rdev->rx_resolution = US_TO_NS(ENE_FW_SAMPLE_PERIOD_FAN);
451 
452  /* Fan input doesn't support timeouts, it just ends the
453  input with a maximum sample */
454  dev->rdev->min_timeout = dev->rdev->max_timeout =
455  US_TO_NS(ENE_FW_SMPL_BUF_FAN_MSK *
456  ENE_FW_SAMPLE_PERIOD_FAN);
457  } else {
458  dev->rdev->rx_resolution = US_TO_NS(sample_period);
459 
460  /* Theoreticly timeout is unlimited, but we cap it
461  * because it was seen that on one device, it
462  * would stop sending spaces after around 250 msec.
463  * Besides, this is close to 2^32 anyway and timeout is u32.
464  */
465  dev->rdev->min_timeout = US_TO_NS(127 * sample_period);
466  dev->rdev->max_timeout = US_TO_NS(200000);
467  }
468 
469  if (dev->hw_learning_and_tx_capable)
470  dev->rdev->tx_resolution = US_TO_NS(sample_period);
471 
472  if (dev->rdev->timeout > dev->rdev->max_timeout)
473  dev->rdev->timeout = dev->rdev->max_timeout;
474  if (dev->rdev->timeout < dev->rdev->min_timeout)
475  dev->rdev->timeout = dev->rdev->min_timeout;
476 }
477 
478 /* Enable the device for receive */
479 static void ene_rx_enable(struct ene_device *dev)
480 {
481  u8 reg_value;
482 
483  /* Enable system interrupt */
484  if (dev->hw_revision < ENE_HW_C) {
485  ene_write_reg(dev, ENEB_IRQ, dev->irq << 1);
486  ene_write_reg(dev, ENEB_IRQ_UNK1, 0x01);
487  } else {
488  reg_value = ene_read_reg(dev, ENE_IRQ) & 0xF0;
489  reg_value |= ENE_IRQ_UNK_EN;
490  reg_value &= ~ENE_IRQ_STATUS;
491  reg_value |= (dev->irq & ENE_IRQ_MASK);
492  ene_write_reg(dev, ENE_IRQ, reg_value);
493  }
494 
495  /* Enable inputs */
496  ene_rx_enable_fan_input(dev, dev->rx_fan_input_inuse);
497  ene_rx_enable_cir_engine(dev, !dev->rx_fan_input_inuse);
498 
499  /* ack any pending irqs - just in case */
500  ene_irq_status(dev);
501 
502  /* enable firmware bits */
503  ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
504 
505  /* enter idle mode */
506  ir_raw_event_set_idle(dev->rdev, true);
507  dev->rx_enabled = true;
508 }
509 
510 /* Disable the device receiver */
511 static void ene_rx_disable(struct ene_device *dev)
512 {
513  /* disable inputs */
514  ene_rx_enable_cir_engine(dev, false);
515  ene_rx_enable_fan_input(dev, false);
516 
517  /* disable hardware IRQ and firmware flag */
518  ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE | ENE_FW1_IRQ);
519 
520  ir_raw_event_set_idle(dev->rdev, true);
521  dev->rx_enabled = false;
522 }
523 
524 /* This resets the receiver. Useful to stop stream of spaces at end of
525  * transmission
526  */
527 static void ene_rx_reset(struct ene_device *dev)
528 {
529  ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
530  ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN);
531 }
532 
533 /* Set up the TX carrier frequency and duty cycle */
534 static void ene_tx_set_carrier(struct ene_device *dev)
535 {
536  u8 tx_puls_width;
537  unsigned long flags;
538 
539  spin_lock_irqsave(&dev->hw_lock, flags);
540 
541  ene_set_clear_reg_mask(dev, ENE_CIRCFG,
542  ENE_CIRCFG_TX_CARR, dev->tx_period > 0);
543 
544  if (!dev->tx_period)
545  goto unlock;
546 
547  BUG_ON(dev->tx_duty_cycle >= 100 || dev->tx_duty_cycle <= 0);
548 
549  tx_puls_width = dev->tx_period / (100 / dev->tx_duty_cycle);
550 
551  if (!tx_puls_width)
552  tx_puls_width = 1;
553 
554  dbg("TX: pulse distance = %d * 500 ns", dev->tx_period);
555  dbg("TX: pulse width = %d * 500 ns", tx_puls_width);
556 
557  ene_write_reg(dev, ENE_CIRMOD_PRD, dev->tx_period | ENE_CIRMOD_PRD_POL);
558  ene_write_reg(dev, ENE_CIRMOD_HPRD, tx_puls_width);
559 unlock:
560  spin_unlock_irqrestore(&dev->hw_lock, flags);
561 }
562 
563 /* Enable/disable transmitters */
564 static void ene_tx_set_transmitters(struct ene_device *dev)
565 {
566  unsigned long flags;
567 
568  spin_lock_irqsave(&dev->hw_lock, flags);
569  ene_set_clear_reg_mask(dev, ENE_GPIOFS8, ENE_GPIOFS8_GPIO41,
570  !!(dev->transmitter_mask & 0x01));
571  ene_set_clear_reg_mask(dev, ENE_GPIOFS1, ENE_GPIOFS1_GPIO0D,
572  !!(dev->transmitter_mask & 0x02));
573  spin_unlock_irqrestore(&dev->hw_lock, flags);
574 }
575 
576 /* prepare transmission */
577 static void ene_tx_enable(struct ene_device *dev)
578 {
579  u8 conf1 = ene_read_reg(dev, ENE_CIRCFG);
580  u8 fwreg2 = ene_read_reg(dev, ENE_FW2);
581 
582  dev->saved_conf1 = conf1;
583 
584  /* Show information about currently connected transmitter jacks */
585  if (fwreg2 & ENE_FW2_EMMITER1_CONN)
586  dbg("TX: Transmitter #1 is connected");
587 
588  if (fwreg2 & ENE_FW2_EMMITER2_CONN)
589  dbg("TX: Transmitter #2 is connected");
590 
591  if (!(fwreg2 & (ENE_FW2_EMMITER1_CONN | ENE_FW2_EMMITER2_CONN)))
592  pr_warn("TX: transmitter cable isn't connected!\n");
593 
594  /* disable receive on revc */
595  if (dev->hw_revision == ENE_HW_C)
596  conf1 &= ~ENE_CIRCFG_RX_EN;
597 
598  /* Enable TX engine */
599  conf1 |= ENE_CIRCFG_TX_EN | ENE_CIRCFG_TX_IRQ;
600  ene_write_reg(dev, ENE_CIRCFG, conf1);
601 }
602 
603 /* end transmission */
604 static void ene_tx_disable(struct ene_device *dev)
605 {
606  ene_write_reg(dev, ENE_CIRCFG, dev->saved_conf1);
607  dev->tx_buffer = NULL;
608 }
609 
610 
611 /* TX one sample - must be called with dev->hw_lock*/
612 static void ene_tx_sample(struct ene_device *dev)
613 {
614  u8 raw_tx;
615  u32 sample;
616  bool pulse = dev->tx_sample_pulse;
617 
618  if (!dev->tx_buffer) {
619  pr_warn("TX: BUG: attempt to transmit NULL buffer\n");
620  return;
621  }
622 
623  /* Grab next TX sample */
624  if (!dev->tx_sample) {
625 
626  if (dev->tx_pos == dev->tx_len) {
627  if (!dev->tx_done) {
628  dbg("TX: no more data to send");
629  dev->tx_done = true;
630  goto exit;
631  } else {
632  dbg("TX: last sample sent by hardware");
633  ene_tx_disable(dev);
634  complete(&dev->tx_complete);
635  return;
636  }
637  }
638 
639  sample = dev->tx_buffer[dev->tx_pos++];
640  dev->tx_sample_pulse = !dev->tx_sample_pulse;
641 
642  dev->tx_sample = DIV_ROUND_CLOSEST(sample, sample_period);
643 
644  if (!dev->tx_sample)
645  dev->tx_sample = 1;
646  }
647 
648  raw_tx = min(dev->tx_sample , (unsigned int)ENE_CIRRLC_OUT_MASK);
649  dev->tx_sample -= raw_tx;
650 
651  dbg("TX: sample %8d (%s)", raw_tx * sample_period,
652  pulse ? "pulse" : "space");
653  if (pulse)
654  raw_tx |= ENE_CIRRLC_OUT_PULSE;
655 
656  ene_write_reg(dev,
657  dev->tx_reg ? ENE_CIRRLC_OUT1 : ENE_CIRRLC_OUT0, raw_tx);
658 
659  dev->tx_reg = !dev->tx_reg;
660 exit:
661  /* simulate TX done interrupt */
662  if (txsim)
663  mod_timer(&dev->tx_sim_timer, jiffies + HZ / 500);
664 }
665 
666 /* timer to simulate tx done interrupt */
667 static void ene_tx_irqsim(unsigned long data)
668 {
669  struct ene_device *dev = (struct ene_device *)data;
670  unsigned long flags;
671 
672  spin_lock_irqsave(&dev->hw_lock, flags);
673  ene_tx_sample(dev);
674  spin_unlock_irqrestore(&dev->hw_lock, flags);
675 }
676 
677 
678 /* read irq status and ack it */
679 static int ene_irq_status(struct ene_device *dev)
680 {
681  u8 irq_status;
682  u8 fw_flags1, fw_flags2;
683  int retval = 0;
684 
685  fw_flags2 = ene_read_reg(dev, ENE_FW2);
686 
687  if (dev->hw_revision < ENE_HW_C) {
688  irq_status = ene_read_reg(dev, ENEB_IRQ_STATUS);
689 
690  if (!(irq_status & ENEB_IRQ_STATUS_IR))
691  return 0;
692 
693  ene_clear_reg_mask(dev, ENEB_IRQ_STATUS, ENEB_IRQ_STATUS_IR);
694  return ENE_IRQ_RX;
695  }
696 
697  irq_status = ene_read_reg(dev, ENE_IRQ);
698  if (!(irq_status & ENE_IRQ_STATUS))
699  return 0;
700 
701  /* original driver does that twice - a workaround ? */
702  ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
703  ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS);
704 
705  /* check RX interrupt */
706  if (fw_flags2 & ENE_FW2_RXIRQ) {
707  retval |= ENE_IRQ_RX;
708  ene_write_reg(dev, ENE_FW2, fw_flags2 & ~ENE_FW2_RXIRQ);
709  }
710 
711  /* check TX interrupt */
712  fw_flags1 = ene_read_reg(dev, ENE_FW1);
713  if (fw_flags1 & ENE_FW1_TXIRQ) {
714  ene_write_reg(dev, ENE_FW1, fw_flags1 & ~ENE_FW1_TXIRQ);
715  retval |= ENE_IRQ_TX;
716  }
717 
718  return retval;
719 }
720 
721 /* interrupt handler */
722 static irqreturn_t ene_isr(int irq, void *data)
723 {
724  u16 hw_value, reg;
725  int hw_sample, irq_status;
726  bool pulse;
727  unsigned long flags;
728  irqreturn_t retval = IRQ_NONE;
729  struct ene_device *dev = (struct ene_device *)data;
730  DEFINE_IR_RAW_EVENT(ev);
731 
732  spin_lock_irqsave(&dev->hw_lock, flags);
733 
734  dbg_verbose("ISR called");
735  ene_rx_read_hw_pointer(dev);
736  irq_status = ene_irq_status(dev);
737 
738  if (!irq_status)
739  goto unlock;
740 
741  retval = IRQ_HANDLED;
742 
743  if (irq_status & ENE_IRQ_TX) {
744  dbg_verbose("TX interrupt");
745  if (!dev->hw_learning_and_tx_capable) {
746  dbg("TX interrupt on unsupported device!");
747  goto unlock;
748  }
749  ene_tx_sample(dev);
750  }
751 
752  if (!(irq_status & ENE_IRQ_RX))
753  goto unlock;
754 
755  dbg_verbose("RX interrupt");
756 
757  if (dev->hw_learning_and_tx_capable)
758  ene_rx_sense_carrier(dev);
759 
760  /* On hardware that don't support extra buffer we need to trust
761  the interrupt and not track the read pointer */
762  if (!dev->hw_extra_buffer)
763  dev->r_pointer = dev->w_pointer == 0 ? ENE_FW_PACKET_SIZE : 0;
764 
765  while (1) {
766 
767  reg = ene_rx_get_sample_reg(dev);
768 
769  dbg_verbose("next sample to read at: %04x", reg);
770  if (!reg)
771  break;
772 
773  hw_value = ene_read_reg(dev, reg);
774 
775  if (dev->rx_fan_input_inuse) {
776 
777  int offset = ENE_FW_SMPL_BUF_FAN - ENE_FW_SAMPLE_BUFFER;
778 
779  /* read high part of the sample */
780  hw_value |= ene_read_reg(dev, reg + offset) << 8;
781  pulse = hw_value & ENE_FW_SMPL_BUF_FAN_PLS;
782 
783  /* clear space bit, and other unused bits */
784  hw_value &= ENE_FW_SMPL_BUF_FAN_MSK;
785  hw_sample = hw_value * ENE_FW_SAMPLE_PERIOD_FAN;
786 
787  } else {
788  pulse = !(hw_value & ENE_FW_SAMPLE_SPACE);
789  hw_value &= ~ENE_FW_SAMPLE_SPACE;
790  hw_sample = hw_value * sample_period;
791 
792  if (dev->rx_period_adjust) {
793  hw_sample *= 100;
794  hw_sample /= (100 + dev->rx_period_adjust);
795  }
796  }
797 
798  if (!dev->hw_extra_buffer && !hw_sample) {
799  dev->r_pointer = dev->w_pointer;
800  continue;
801  }
802 
803  dbg("RX: %d (%s)", hw_sample, pulse ? "pulse" : "space");
804 
805  ev.duration = US_TO_NS(hw_sample);
806  ev.pulse = pulse;
807  ir_raw_event_store_with_filter(dev->rdev, &ev);
808  }
809 
810  ir_raw_event_handle(dev->rdev);
811 unlock:
812  spin_unlock_irqrestore(&dev->hw_lock, flags);
813  return retval;
814 }
815 
816 /* Initialize default settings */
817 static void ene_setup_default_settings(struct ene_device *dev)
818 {
819  dev->tx_period = 32;
820  dev->tx_duty_cycle = 50; /*%*/
821  dev->transmitter_mask = 0x03;
822  dev->learning_mode_enabled = learning_mode_force;
823 
824  /* Set reasonable default timeout */
825  dev->rdev->timeout = US_TO_NS(150000);
826 }
827 
828 /* Upload all hardware settings at once. Used at load and resume time */
829 static void ene_setup_hw_settings(struct ene_device *dev)
830 {
831  if (dev->hw_learning_and_tx_capable) {
832  ene_tx_set_carrier(dev);
833  ene_tx_set_transmitters(dev);
834  }
835 
836  ene_rx_setup(dev);
837 }
838 
839 /* outside interface: called on first open*/
840 static int ene_open(struct rc_dev *rdev)
841 {
842  struct ene_device *dev = rdev->priv;
843  unsigned long flags;
844 
845  spin_lock_irqsave(&dev->hw_lock, flags);
846  ene_rx_enable(dev);
847  spin_unlock_irqrestore(&dev->hw_lock, flags);
848  return 0;
849 }
850 
851 /* outside interface: called on device close*/
852 static void ene_close(struct rc_dev *rdev)
853 {
854  struct ene_device *dev = rdev->priv;
855  unsigned long flags;
856  spin_lock_irqsave(&dev->hw_lock, flags);
857 
858  ene_rx_disable(dev);
859  spin_unlock_irqrestore(&dev->hw_lock, flags);
860 }
861 
862 /* outside interface: set transmitter mask */
863 static int ene_set_tx_mask(struct rc_dev *rdev, u32 tx_mask)
864 {
865  struct ene_device *dev = rdev->priv;
866  dbg("TX: attempt to set transmitter mask %02x", tx_mask);
867 
868  /* invalid txmask */
869  if (!tx_mask || tx_mask & ~0x03) {
870  dbg("TX: invalid mask");
871  /* return count of transmitters */
872  return 2;
873  }
874 
875  dev->transmitter_mask = tx_mask;
876  ene_tx_set_transmitters(dev);
877  return 0;
878 }
879 
880 /* outside interface : set tx carrier */
881 static int ene_set_tx_carrier(struct rc_dev *rdev, u32 carrier)
882 {
883  struct ene_device *dev = rdev->priv;
884  u32 period;
885 
886  dbg("TX: attempt to set tx carrier to %d kHz", carrier);
887  if (carrier == 0)
888  return -EINVAL;
889 
890  period = 2000000 / carrier;
891  if (period && (period > ENE_CIRMOD_PRD_MAX ||
892  period < ENE_CIRMOD_PRD_MIN)) {
893 
894  dbg("TX: out of range %d-%d kHz carrier",
895  2000 / ENE_CIRMOD_PRD_MIN, 2000 / ENE_CIRMOD_PRD_MAX);
896  return -1;
897  }
898 
899  dev->tx_period = period;
900  ene_tx_set_carrier(dev);
901  return 0;
902 }
903 
904 /*outside interface : set tx duty cycle */
905 static int ene_set_tx_duty_cycle(struct rc_dev *rdev, u32 duty_cycle)
906 {
907  struct ene_device *dev = rdev->priv;
908  dbg("TX: setting duty cycle to %d%%", duty_cycle);
909  dev->tx_duty_cycle = duty_cycle;
910  ene_tx_set_carrier(dev);
911  return 0;
912 }
913 
914 /* outside interface: enable learning mode */
915 static int ene_set_learning_mode(struct rc_dev *rdev, int enable)
916 {
917  struct ene_device *dev = rdev->priv;
918  unsigned long flags;
919  if (enable == dev->learning_mode_enabled)
920  return 0;
921 
922  spin_lock_irqsave(&dev->hw_lock, flags);
923  dev->learning_mode_enabled = enable;
924  ene_rx_disable(dev);
925  ene_rx_setup(dev);
926  ene_rx_enable(dev);
927  spin_unlock_irqrestore(&dev->hw_lock, flags);
928  return 0;
929 }
930 
931 static int ene_set_carrier_report(struct rc_dev *rdev, int enable)
932 {
933  struct ene_device *dev = rdev->priv;
934  unsigned long flags;
935 
936  if (enable == dev->carrier_detect_enabled)
937  return 0;
938 
939  spin_lock_irqsave(&dev->hw_lock, flags);
940  dev->carrier_detect_enabled = enable;
941  ene_rx_disable(dev);
942  ene_rx_setup(dev);
943  ene_rx_enable(dev);
944  spin_unlock_irqrestore(&dev->hw_lock, flags);
945  return 0;
946 }
947 
948 /* outside interface: enable or disable idle mode */
949 static void ene_set_idle(struct rc_dev *rdev, bool idle)
950 {
951  struct ene_device *dev = rdev->priv;
952 
953  if (idle) {
954  ene_rx_reset(dev);
955  dbg("RX: end of data");
956  }
957 }
958 
959 /* outside interface: transmit */
960 static int ene_transmit(struct rc_dev *rdev, unsigned *buf, unsigned n)
961 {
962  struct ene_device *dev = rdev->priv;
963  unsigned long flags;
964 
965  dev->tx_buffer = buf;
966  dev->tx_len = n;
967  dev->tx_pos = 0;
968  dev->tx_reg = 0;
969  dev->tx_done = 0;
970  dev->tx_sample = 0;
971  dev->tx_sample_pulse = 0;
972 
973  dbg("TX: %d samples", dev->tx_len);
974 
975  spin_lock_irqsave(&dev->hw_lock, flags);
976 
977  ene_tx_enable(dev);
978 
979  /* Transmit first two samples */
980  ene_tx_sample(dev);
981  ene_tx_sample(dev);
982 
983  spin_unlock_irqrestore(&dev->hw_lock, flags);
984 
985  if (wait_for_completion_timeout(&dev->tx_complete, 2 * HZ) == 0) {
986  dbg("TX: timeout");
987  spin_lock_irqsave(&dev->hw_lock, flags);
988  ene_tx_disable(dev);
989  spin_unlock_irqrestore(&dev->hw_lock, flags);
990  } else
991  dbg("TX: done");
992  return n;
993 }
994 
995 /* probe entry */
996 static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)
997 {
998  int error = -ENOMEM;
999  struct rc_dev *rdev;
1000  struct ene_device *dev;
1001 
1002  /* allocate memory */
1003  dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL);
1004  rdev = rc_allocate_device();
1005  if (!dev || !rdev)
1006  goto error1;
1007 
1008  /* validate resources */
1009  error = -ENODEV;
1010 
1011  /* init these to -1, as 0 is valid for both */
1012  dev->hw_io = -1;
1013  dev->irq = -1;
1014 
1015  if (!pnp_port_valid(pnp_dev, 0) ||
1016  pnp_port_len(pnp_dev, 0) < ENE_IO_SIZE)
1017  goto error;
1018 
1019  if (!pnp_irq_valid(pnp_dev, 0))
1020  goto error;
1021 
1022  spin_lock_init(&dev->hw_lock);
1023 
1024  dev->hw_io = pnp_port_start(pnp_dev, 0);
1025 
1026  pnp_set_drvdata(pnp_dev, dev);
1027  dev->pnp_dev = pnp_dev;
1028 
1029  /* don't allow too short/long sample periods */
1030  if (sample_period < 5 || sample_period > 0x7F)
1031  sample_period = ENE_DEFAULT_SAMPLE_PERIOD;
1032 
1033  /* detect hardware version and features */
1034  error = ene_hw_detect(dev);
1035  if (error)
1036  goto error;
1037 
1038  if (!dev->hw_learning_and_tx_capable && txsim) {
1039  dev->hw_learning_and_tx_capable = true;
1040  setup_timer(&dev->tx_sim_timer, ene_tx_irqsim,
1041  (long unsigned int)dev);
1042  pr_warn("Simulation of TX activated\n");
1043  }
1044 
1045  if (!dev->hw_learning_and_tx_capable)
1046  learning_mode_force = false;
1047 
1048  rdev->driver_type = RC_DRIVER_IR_RAW;
1049  rdev->allowed_protos = RC_TYPE_ALL;
1050  rdev->priv = dev;
1051  rdev->open = ene_open;
1052  rdev->close = ene_close;
1053  rdev->s_idle = ene_set_idle;
1054  rdev->driver_name = ENE_DRIVER_NAME;
1055  rdev->map_name = RC_MAP_RC6_MCE;
1056  rdev->input_name = "ENE eHome Infrared Remote Receiver";
1057 
1058  if (dev->hw_learning_and_tx_capable) {
1059  rdev->s_learning_mode = ene_set_learning_mode;
1060  init_completion(&dev->tx_complete);
1061  rdev->tx_ir = ene_transmit;
1062  rdev->s_tx_mask = ene_set_tx_mask;
1063  rdev->s_tx_carrier = ene_set_tx_carrier;
1064  rdev->s_tx_duty_cycle = ene_set_tx_duty_cycle;
1065  rdev->s_carrier_report = ene_set_carrier_report;
1066  rdev->input_name = "ENE eHome Infrared Remote Transceiver";
1067  }
1068 
1069  dev->rdev = rdev;
1070 
1071  ene_rx_setup_hw_buffer(dev);
1072  ene_setup_default_settings(dev);
1073  ene_setup_hw_settings(dev);
1074 
1075  device_set_wakeup_capable(&pnp_dev->dev, true);
1076  device_set_wakeup_enable(&pnp_dev->dev, true);
1077 
1078  /* claim the resources */
1079  error = -EBUSY;
1080  if (!request_region(dev->hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) {
1081  dev->hw_io = -1;
1082  dev->irq = -1;
1083  goto error;
1084  }
1085 
1086  dev->irq = pnp_irq(pnp_dev, 0);
1087  if (request_irq(dev->irq, ene_isr,
1088  IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) {
1089  dev->irq = -1;
1090  goto error;
1091  }
1092 
1093  error = rc_register_device(rdev);
1094  if (error < 0)
1095  goto error;
1096 
1097  pr_notice("driver has been successfully loaded\n");
1098  return 0;
1099 error:
1100  if (dev && dev->irq >= 0)
1101  free_irq(dev->irq, dev);
1102  if (dev && dev->hw_io >= 0)
1103  release_region(dev->hw_io, ENE_IO_SIZE);
1104 error1:
1105  rc_free_device(rdev);
1106  kfree(dev);
1107  return error;
1108 }
1109 
1110 /* main unload function */
1111 static void ene_remove(struct pnp_dev *pnp_dev)
1112 {
1113  struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1114  unsigned long flags;
1115 
1116  spin_lock_irqsave(&dev->hw_lock, flags);
1117  ene_rx_disable(dev);
1118  ene_rx_restore_hw_buffer(dev);
1119  spin_unlock_irqrestore(&dev->hw_lock, flags);
1120 
1121  free_irq(dev->irq, dev);
1122  release_region(dev->hw_io, ENE_IO_SIZE);
1123  rc_unregister_device(dev->rdev);
1124  kfree(dev);
1125 }
1126 
1127 /* enable wake on IR (wakes on specific button on original remote) */
1128 static void ene_enable_wake(struct ene_device *dev, int enable)
1129 {
1130  enable = enable && device_may_wakeup(&dev->pnp_dev->dev);
1131  dbg("wake on IR %s", enable ? "enabled" : "disabled");
1132  ene_set_clear_reg_mask(dev, ENE_FW1, ENE_FW1_WAKE, enable);
1133 }
1134 
1135 #ifdef CONFIG_PM
1136 static int ene_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
1137 {
1138  struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1139  ene_enable_wake(dev, true);
1140 
1141  /* TODO: add support for wake pattern */
1142  return 0;
1143 }
1144 
1145 static int ene_resume(struct pnp_dev *pnp_dev)
1146 {
1147  struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1148  ene_setup_hw_settings(dev);
1149 
1150  if (dev->rx_enabled)
1151  ene_rx_enable(dev);
1152 
1153  ene_enable_wake(dev, false);
1154  return 0;
1155 }
1156 #endif
1157 
1158 static void ene_shutdown(struct pnp_dev *pnp_dev)
1159 {
1160  struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1161  ene_enable_wake(dev, true);
1162 }
1163 
1164 static const struct pnp_device_id ene_ids[] = {
1165  {.id = "ENE0100",},
1166  {.id = "ENE0200",},
1167  {.id = "ENE0201",},
1168  {.id = "ENE0202",},
1169  {},
1170 };
1171 
1172 static struct pnp_driver ene_driver = {
1173  .name = ENE_DRIVER_NAME,
1174  .id_table = ene_ids,
1175  .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1176 
1177  .probe = ene_probe,
1178  .remove = __devexit_p(ene_remove),
1179 #ifdef CONFIG_PM
1180  .suspend = ene_suspend,
1181  .resume = ene_resume,
1182 #endif
1183  .shutdown = ene_shutdown,
1184 };
1185 
1186 static int __init ene_init(void)
1187 {
1188  return pnp_register_driver(&ene_driver);
1189 }
1190 
1191 static void ene_exit(void)
1192 {
1193  pnp_unregister_driver(&ene_driver);
1194 }
1195 
1196 module_param(sample_period, int, S_IRUGO);
1197 MODULE_PARM_DESC(sample_period, "Hardware sample period (50 us default)");
1198 
1199 module_param(learning_mode_force, bool, S_IRUGO);
1200 MODULE_PARM_DESC(learning_mode_force, "Enable learning mode by default");
1201 
1202 module_param(debug, int, S_IRUGO | S_IWUSR);
1203 MODULE_PARM_DESC(debug, "Debug level");
1204 
1205 module_param(txsim, bool, S_IRUGO);
1206 MODULE_PARM_DESC(txsim,
1207  "Simulate TX features on unsupported hardware (dangerous)");
1208 
1209 MODULE_DEVICE_TABLE(pnp, ene_ids);
1210 MODULE_DESCRIPTION
1211  ("Infrared input driver for KB3926B/C/D/E/F "
1212  "(aka ENE0100/ENE0200/ENE0201/ENE0202) CIR port");
1213 
1214 MODULE_AUTHOR("Maxim Levitsky");
1215 MODULE_LICENSE("GPL");
1216 
1217 module_init(ene_init);
1218 module_exit(ene_exit);
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