48 nvc0_copy0_sclass[] = {
54 nvc0_copy1_sclass[] = {
74 *pobject = nv_object(priv);
82 nvc0_copy_context_ofuncs = {
83 .ctor = nvc0_copy_context_ctor,
94 .ofuncs = &nvc0_copy_context_ofuncs,
100 .ofuncs = &nvc0_copy_context_ofuncs,
107 static const struct nouveau_enum nvc0_copy_isr_error_name[] = {
108 { 0x0001,
"ILLEGAL_MTHD" },
109 { 0x0002,
"INVALID_ENUM" },
110 { 0x0003,
"INVALID_BITFIELD" },
122 u32 disp = nv_rd32(priv, 0x10401c + (idx * 0x1000));
123 u32 intr = nv_rd32(priv, 0x104008 + (idx * 0x1000));
124 u32 stat = intr & disp & ~(disp >> 16);
125 u64 inst = nv_rd32(priv, 0x104050 + (idx * 0x1000)) & 0x0fffffff;
126 u32 ssta = nv_rd32(priv, 0x104040 + (idx * 0x1000)) & 0x0000ffff;
127 u32 addr = nv_rd32(priv, 0x104040 + (idx * 0x1000)) >> 16;
128 u32 mthd = (addr & 0x07ff) << 2;
129 u32 subc = (addr & 0x3800) >> 11;
130 u32 data = nv_rd32(priv, 0x104044 + (idx * 0x1000));
134 chid = pfifo->
chid(pfifo, engctx);
136 if (stat & 0x00000040) {
139 printk(
"] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n",
140 chid, (
u64)inst << 12, subc, mthd, data);
141 nv_wr32(priv, 0x104004 + (idx * 0x1000), 0x00000040);
146 nv_error(priv,
"unhandled intr 0x%08x\n", stat);
147 nv_wr32(priv, 0x104004 + (idx * 0x1000), stat);
161 if (nv_rd32(parent, 0x022500) & 0x00000100)
165 *pobject = nv_object(priv);
169 nv_subdev(priv)->unit = 0x00000040;
170 nv_subdev(priv)->intr = nvc0_copy_intr;
171 nv_engine(priv)->cclass = &nvc0_copy0_cclass;
172 nv_engine(priv)->sclass = nvc0_copy0_sclass;
184 if (nv_rd32(parent, 0x022500) & 0x00000200)
188 *pobject = nv_object(priv);
192 nv_subdev(priv)->unit = 0x00000080;
193 nv_subdev(priv)->intr = nvc0_copy_intr;
194 nv_engine(priv)->cclass = &nvc0_copy1_cclass;
195 nv_engine(priv)->sclass = nvc0_copy1_sclass;
211 nv_wr32(priv, 0x104014 + (idx * 0x1000), 0xffffffff);
214 nv_wr32(priv, 0x1041c0 + (idx * 0x1000), 0x01000000);
215 for (i = 0; i <
sizeof(nvc0_pcopy_data) / 4; i++)
216 nv_wr32(priv, 0x1041c4 + (idx * 0x1000), nvc0_pcopy_data[
i]);
218 nv_wr32(priv, 0x104180 + (idx * 0x1000), 0x01000000);
219 for (i = 0; i <
sizeof(nvc0_pcopy_code) / 4; i++) {
221 nv_wr32(priv, 0x104188 + (idx * 0x1000), i >> 6);
222 nv_wr32(priv, 0x104184 + (idx * 0x1000), nvc0_pcopy_code[i]);
226 nv_wr32(priv, 0x104084 + (idx * 0x1000), idx);
227 nv_wr32(priv, 0x10410c + (idx * 0x1000), 0x00000000);
228 nv_wr32(priv, 0x104104 + (idx * 0x1000), 0x00000000);
229 nv_wr32(priv, 0x104100 + (idx * 0x1000), 0x00000002);
239 nv_mask(priv, 0x104048 + (idx * 0x1000), 0x00000003, 0x00000000);
240 nv_wr32(priv, 0x104014 + (idx * 0x1000), 0xffffffff);
249 .ctor = nvc0_copy0_ctor,
251 .init = nvc0_copy_init,
252 .fini = nvc0_copy_fini,
260 .ctor = nvc0_copy1_ctor,
262 .init = nvc0_copy_init,
263 .fini = nvc0_copy_fini,