35 nvd0_disp_sclass[] = {
49 if (chan->
vblank.crtc != crtc)
52 nv_wr32(priv, 0x001718, 0x80000000 | chan->
vblank.channel);
56 nv_wr32(priv, 0x060014, chan->
vblank.value);
62 spin_unlock_irqrestore(&disp->
vblank.lock, flags);
72 u32 intr = nv_rd32(priv, 0x610088);
75 for (i = 0; i < 4; i++) {
78 u32 stat = nv_rd32(priv, 0x6100bc + (i * 0x800));
79 if (stat & 0x00000001)
80 nvd0_disp_intr_vblank(priv, i);
81 nv_mask(priv, 0x6100bc + (i * 0x800), 0, 0);
82 nv_rd32(priv, 0x6100c0 + (i * 0x800));
97 *pobject = nv_object(priv);
101 nv_engine(priv)->sclass = nvd0_disp_sclass;
102 nv_subdev(priv)->intr = nvd0_disp_intr;
104 INIT_LIST_HEAD(&priv->
base.vblank.list);
113 .ctor = nvd0_disp_ctor,