Data Structures
struct	reg_eth_rw_ma0_lo

struct	reg_eth_rw_ma0_hi

struct	reg_eth_rw_ma1_lo

struct	reg_eth_rw_ma1_hi

struct	reg_eth_rw_ga_lo

struct	reg_eth_rw_ga_hi

struct	reg_eth_rw_gen_ctrl

struct	reg_eth_rw_rec_ctrl

struct	reg_eth_rw_tr_ctrl

struct	reg_eth_rw_clr_err

struct	reg_eth_rw_mgm_ctrl

struct	reg_eth_r_stat

struct	reg_eth_rs_rec_cnt

struct	reg_eth_r_rec_cnt

struct	reg_eth_rs_tr_cnt

struct	reg_eth_r_tr_cnt

struct	reg_eth_rs_phy_cnt

struct	reg_eth_r_phy_cnt

struct	reg_eth_rw_test_ctrl

struct	reg_eth_rw_intr_mask

struct	reg_eth_rw_ack_intr

struct	reg_eth_r_intr

struct	reg_eth_r_masked_intr

Macros
#define	REG_RD(scope, inst, reg)

#define	REG_WR(scope, inst, reg, val)

#define	REG_RD_VECT(scope, inst, reg, index)

#define	REG_WR_VECT(scope, inst, reg, index, val)

#define	REG_RD_INT(scope, inst, reg) REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )

#define	REG_WR_INT(scope, inst, reg, val) REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )

#define	REG_RD_INT_VECT(scope, inst, reg, index)

#define	REG_WR_INT_VECT(scope, inst, reg, index, val)

#define	REG_TYPE_CONV(type, orgtype, val) ( { union { orgtype o; type n; } r; r.o = val; r.n; } )

#define	reg_page_size 8192

#define	REG_ADDR(scope, inst, reg) ( (inst) + REG_RD_ADDR_##scope##_##reg )

#define	REG_ADDR_VECT(scope, inst, reg, index)

#define	REG_RD_ADDR_eth_rw_ma0_lo 0

#define	REG_WR_ADDR_eth_rw_ma0_lo 0

#define	REG_RD_ADDR_eth_rw_ma0_hi 4

#define	REG_WR_ADDR_eth_rw_ma0_hi 4

#define	REG_RD_ADDR_eth_rw_ma1_lo 8

#define	REG_WR_ADDR_eth_rw_ma1_lo 8

#define	REG_RD_ADDR_eth_rw_ma1_hi 12

#define	REG_WR_ADDR_eth_rw_ma1_hi 12

#define	REG_RD_ADDR_eth_rw_ga_lo 16

#define	REG_WR_ADDR_eth_rw_ga_lo 16

#define	REG_RD_ADDR_eth_rw_ga_hi 20

#define	REG_WR_ADDR_eth_rw_ga_hi 20

#define	REG_RD_ADDR_eth_rw_gen_ctrl 24

#define	REG_WR_ADDR_eth_rw_gen_ctrl 24

#define	REG_RD_ADDR_eth_rw_rec_ctrl 28

#define	REG_WR_ADDR_eth_rw_rec_ctrl 28

#define	REG_RD_ADDR_eth_rw_tr_ctrl 32

#define	REG_WR_ADDR_eth_rw_tr_ctrl 32

#define	REG_RD_ADDR_eth_rw_clr_err 36

#define	REG_WR_ADDR_eth_rw_clr_err 36

#define	REG_RD_ADDR_eth_rw_mgm_ctrl 40

#define	REG_WR_ADDR_eth_rw_mgm_ctrl 40

#define	REG_RD_ADDR_eth_r_stat 44

#define	REG_RD_ADDR_eth_rs_rec_cnt 48

#define	REG_RD_ADDR_eth_r_rec_cnt 52

#define	REG_RD_ADDR_eth_rs_tr_cnt 56

#define	REG_RD_ADDR_eth_r_tr_cnt 60

#define	REG_RD_ADDR_eth_rs_phy_cnt 64

#define	REG_RD_ADDR_eth_r_phy_cnt 68

#define	REG_RD_ADDR_eth_rw_test_ctrl 72

#define	REG_WR_ADDR_eth_rw_test_ctrl 72

#define	REG_RD_ADDR_eth_rw_intr_mask 76

#define	REG_WR_ADDR_eth_rw_intr_mask 76

#define	REG_RD_ADDR_eth_rw_ack_intr 80

#define	REG_WR_ADDR_eth_rw_ack_intr 80

#define	REG_RD_ADDR_eth_r_intr 84

#define	REG_RD_ADDR_eth_r_masked_intr 88

Enumerations
enum	{ regk_eth_discard = 0x00000000, regk_eth_ether = 0x00000000, regk_eth_full = 0x00000001, regk_eth_gmii = 0x00000003, regk_eth_gtxclk = 0x00000001, regk_eth_half = 0x00000000, regk_eth_hsh = 0x00000001, regk_eth_mii = 0x00000001, regk_eth_mii_arec = 0x00000002, regk_eth_mii_clk = 0x00000000, regk_eth_no = 0x00000000, regk_eth_phyrst = 0x00000000, regk_eth_rec = 0x00000001, regk_eth_rw_ga_hi_default = 0x00000000, regk_eth_rw_ga_lo_default = 0x00000000, regk_eth_rw_gen_ctrl_default = 0x00000000, regk_eth_rw_intr_mask_default = 0x00000000, regk_eth_rw_ma0_hi_default = 0x00000000, regk_eth_rw_ma0_lo_default = 0x00000000, regk_eth_rw_ma1_hi_default = 0x00000000, regk_eth_rw_ma1_lo_default = 0x00000000, regk_eth_rw_mgm_ctrl_default = 0x00000000, regk_eth_rw_test_ctrl_default = 0x00000000, regk_eth_size1518 = 0x000005ee, regk_eth_size1522 = 0x000005f2, regk_eth_yes = 0x00000001 }

Macro Definition Documentation

#define REG_ADDR	(	scope,
		inst,
		reg
	)	( (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 75 of file eth_defs.h.

#define REG_ADDR_VECT	(	scope,
		inst,
		reg,
		index
	)

Value:

( (inst) + REG_RD_ADDR_##scope##_##reg + \

(index) * STRIDE_##scope##_##reg )

Definition at line 80 of file eth_defs.h.

#define reg_page_size 8192

Definition at line 71 of file eth_defs.h.

#define REG_RD	(	scope,
		inst,
		reg
	)

Value:

REG_READ( reg_##scope##_##reg, \

(inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 18 of file eth_defs.h.

#define REG_RD_ADDR_eth_r_intr 84

Definition at line 326 of file eth_defs.h.

#define REG_RD_ADDR_eth_r_masked_intr 88

Definition at line 346 of file eth_defs.h.

#define REG_RD_ADDR_eth_r_phy_cnt 68

Definition at line 254 of file eth_defs.h.

#define REG_RD_ADDR_eth_r_rec_cnt 52

Definition at line 220 of file eth_defs.h.

#define REG_RD_ADDR_eth_r_stat 44

Definition at line 202 of file eth_defs.h.

#define REG_RD_ADDR_eth_r_tr_cnt 60

Definition at line 238 of file eth_defs.h.

#define REG_RD_ADDR_eth_rs_phy_cnt 64

Definition at line 246 of file eth_defs.h.

#define REG_RD_ADDR_eth_rs_rec_cnt 48

Definition at line 211 of file eth_defs.h.

#define REG_RD_ADDR_eth_rs_tr_cnt 56

Definition at line 229 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_ack_intr 80

Definition at line 305 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_clr_err 36

Definition at line 181 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_ga_hi 20

Definition at line 128 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_ga_lo 16

Definition at line 121 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_gen_ctrl 24

Definition at line 142 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_intr_mask 76

Definition at line 284 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_ma0_hi 4

Definition at line 99 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_ma0_lo 0

Definition at line 91 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_ma1_hi 12

Definition at line 114 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_ma1_lo 8

Definition at line 106 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_mgm_ctrl 40

Definition at line 191 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_rec_ctrl 28

Definition at line 158 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_test_ctrl 72

Definition at line 263 of file eth_defs.h.

#define REG_RD_ADDR_eth_rw_tr_ctrl 32

Definition at line 173 of file eth_defs.h.

#define REG_RD_INT	(	scope,
		inst,
		reg
	)	REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 44 of file eth_defs.h.

#define REG_RD_INT_VECT	(	scope,
		inst,
		reg,
		index
	)

Value:

REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \

(index) * STRIDE_##scope##_##reg )

Definition at line 54 of file eth_defs.h.

#define REG_RD_VECT	(	scope,
		inst,
		reg,
		index
	)

Value:

REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg + \
        (index) * STRIDE_##scope##_##reg )

Definition at line 30 of file eth_defs.h.

#define REG_TYPE_CONV	(	type,
		orgtype,
		val
	)	( { union { orgtype o; type n; } r; r.o = val; r.n; } )

Definition at line 66 of file eth_defs.h.

#define REG_WR	(	scope,
		inst,
		reg,
		val
	)

Value:

REG_WRITE( reg_##scope##_##reg, \

(inst) + REG_WR_ADDR_##scope##_##reg, (val) )

Definition at line 24 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_ack_intr 80

Definition at line 306 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_clr_err 36

Definition at line 182 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_ga_hi 20

Definition at line 129 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_ga_lo 16

Definition at line 122 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_gen_ctrl 24

Definition at line 143 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_intr_mask 76

Definition at line 285 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_ma0_hi 4

Definition at line 100 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_ma0_lo 0

Definition at line 92 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_ma1_hi 12

Definition at line 115 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_ma1_lo 8

Definition at line 107 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_mgm_ctrl 40

Definition at line 192 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_rec_ctrl 28

Definition at line 159 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_test_ctrl 72

Definition at line 264 of file eth_defs.h.

#define REG_WR_ADDR_eth_rw_tr_ctrl 32

Definition at line 174 of file eth_defs.h.

#define REG_WR_INT	(	scope,
		inst,
		reg,
		val
	)	REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )

Definition at line 49 of file eth_defs.h.

#define REG_WR_INT_VECT	(	scope,
		inst,
		reg,
		index,
		val
	)

Value:

REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \

(index) * STRIDE_##scope##_##reg, (val) )

Definition at line 60 of file eth_defs.h.

#define REG_WR_VECT	(	scope,
		inst,
		reg,
		index,
		val
	)

Value:

REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg + \
         (index) * STRIDE_##scope##_##reg, (val) )

Definition at line 37 of file eth_defs.h.

Enumeration Type Documentation

anonymous enum

Enumerator:

regk_eth_discard
regk_eth_ether
regk_eth_full
regk_eth_gmii
regk_eth_gtxclk
regk_eth_half
regk_eth_hsh
regk_eth_mii
regk_eth_mii_arec
regk_eth_mii_clk
regk_eth_no
regk_eth_phyrst
regk_eth_rec
regk_eth_rw_ga_hi_default
regk_eth_rw_ga_lo_default
regk_eth_rw_gen_ctrl_default
regk_eth_rw_intr_mask_default
regk_eth_rw_ma0_hi_default
regk_eth_rw_ma0_lo_default
regk_eth_rw_ma1_hi_default
regk_eth_rw_ma1_lo_default
regk_eth_rw_mgm_ctrl_default
regk_eth_rw_test_ctrl_default
regk_eth_size1518
regk_eth_size1522
regk_eth_yes

Definition at line 350 of file eth_defs.h.

Data Structures

Macros

Enumerations

Macro Definition Documentation

Enumeration Type Documentation