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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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#include "fifo_icap.h"Go to the source code of this file.
Macros | |
| #define | XHI_GIER_OFFSET 0x1C /* Device Global Interrupt Enable Reg */ |
| #define | XHI_IPISR_OFFSET 0x20 /* Interrupt Status Register */ |
| #define | XHI_IPIER_OFFSET 0x28 /* Interrupt Enable Register */ |
| #define | XHI_WF_OFFSET 0x100 /* Write FIFO */ |
| #define | XHI_RF_OFFSET 0x104 /* Read FIFO */ |
| #define | XHI_SZ_OFFSET 0x108 /* Size Register */ |
| #define | XHI_CR_OFFSET 0x10C /* Control Register */ |
| #define | XHI_SR_OFFSET 0x110 /* Status Register */ |
| #define | XHI_WFV_OFFSET 0x114 /* Write FIFO Vacancy Register */ |
| #define | XHI_RFO_OFFSET 0x118 /* Read FIFO Occupancy Register */ |
| #define | XHI_GIER_GIE_MASK 0x80000000 /* Global Interrupt enable Mask */ |
| #define | XHI_IPIXR_RFULL_MASK 0x00000008 /* Read FIFO Full */ |
| #define | XHI_IPIXR_WEMPTY_MASK 0x00000004 /* Write FIFO Empty */ |
| #define | XHI_IPIXR_RDP_MASK 0x00000002 /* Read FIFO half full */ |
| #define | XHI_IPIXR_WRP_MASK 0x00000001 /* Write FIFO half full */ |
| #define | XHI_IPIXR_ALL_MASK 0x0000000F /* Mask of all interrupts */ |
| #define | XHI_CR_SW_RESET_MASK 0x00000008 /* SW Reset Mask */ |
| #define | XHI_CR_FIFO_CLR_MASK 0x00000004 /* FIFO Clear Mask */ |
| #define | XHI_CR_READ_MASK 0x00000002 /* Read from ICAP to FIFO */ |
| #define | XHI_CR_WRITE_MASK 0x00000001 /* Write from FIFO to ICAP */ |
| #define | XHI_WFO_MAX_VACANCY 1024 /* Max Write FIFO Vacancy, in words */ |
| #define | XHI_RFO_MAX_OCCUPANCY 256 /* Max Read FIFO Occupancy, in words */ |
| #define | XHI_MAX_READ_TRANSACTION_WORDS 0xFFF |
Functions | |
| u32 | fifo_icap_get_status (struct hwicap_drvdata *drvdata) |
| int | fifo_icap_set_configuration (struct hwicap_drvdata *drvdata, u32 *frame_buffer, u32 num_words) |
| int | fifo_icap_get_configuration (struct hwicap_drvdata *drvdata, u32 *frame_buffer, u32 num_words) |
| void | fifo_icap_reset (struct hwicap_drvdata *drvdata) |
| void | fifo_icap_flush_fifo (struct hwicap_drvdata *drvdata) |
| #define XHI_CR_FIFO_CLR_MASK 0x00000004 /* FIFO Clear Mask */ |
Definition at line 74 of file fifo_icap.c.
| #define XHI_CR_OFFSET 0x10C /* Control Register */ |
Definition at line 42 of file fifo_icap.c.
| #define XHI_CR_READ_MASK 0x00000002 /* Read from ICAP to FIFO */ |
Definition at line 75 of file fifo_icap.c.
| #define XHI_CR_SW_RESET_MASK 0x00000008 /* SW Reset Mask */ |
Definition at line 73 of file fifo_icap.c.
| #define XHI_CR_WRITE_MASK 0x00000001 /* Write from FIFO to ICAP */ |
Definition at line 76 of file fifo_icap.c.
| #define XHI_GIER_GIE_MASK 0x80000000 /* Global Interrupt enable Mask */ |
Definition at line 49 of file fifo_icap.c.
| #define XHI_GIER_OFFSET 0x1C /* Device Global Interrupt Enable Reg */ |
Definition at line 36 of file fifo_icap.c.
| #define XHI_IPIER_OFFSET 0x28 /* Interrupt Enable Register */ |
Definition at line 38 of file fifo_icap.c.
| #define XHI_IPISR_OFFSET 0x20 /* Interrupt Status Register */ |
Definition at line 37 of file fifo_icap.c.
| #define XHI_IPIXR_ALL_MASK 0x0000000F /* Mask of all interrupts */ |
Definition at line 70 of file fifo_icap.c.
| #define XHI_IPIXR_RDP_MASK 0x00000002 /* Read FIFO half full */ |
Definition at line 68 of file fifo_icap.c.
| #define XHI_IPIXR_RFULL_MASK 0x00000008 /* Read FIFO Full */ |
HwIcap Device Interrupt Status/Enable Registers
Interrupt Status Register (IPISR) : This register holds the interrupt status flags for the device. These bits are toggle on write.
Interrupt Enable Register (IPIER) : This register is used to enable interrupt sources for the device. Writing a '1' to a bit enables the corresponding interrupt. Writing a '0' to a bit disables the corresponding interrupt.
IPISR/IPIER registers have the same bit definitions and are only defined once.
Definition at line 66 of file fifo_icap.c.
| #define XHI_IPIXR_WEMPTY_MASK 0x00000004 /* Write FIFO Empty */ |
Definition at line 67 of file fifo_icap.c.
| #define XHI_IPIXR_WRP_MASK 0x00000001 /* Write FIFO half full */ |
Definition at line 69 of file fifo_icap.c.
| #define XHI_MAX_READ_TRANSACTION_WORDS 0xFFF |
Definition at line 83 of file fifo_icap.c.
| #define XHI_RF_OFFSET 0x104 /* Read FIFO */ |
Definition at line 40 of file fifo_icap.c.
Definition at line 80 of file fifo_icap.c.
| #define XHI_RFO_OFFSET 0x118 /* Read FIFO Occupancy Register */ |
Definition at line 45 of file fifo_icap.c.
| #define XHI_SR_OFFSET 0x110 /* Status Register */ |
Definition at line 43 of file fifo_icap.c.
| #define XHI_SZ_OFFSET 0x108 /* Size Register */ |
Definition at line 41 of file fifo_icap.c.
| #define XHI_WF_OFFSET 0x100 /* Write FIFO */ |
Definition at line 39 of file fifo_icap.c.
Definition at line 79 of file fifo_icap.c.
| #define XHI_WFV_OFFSET 0x114 /* Write FIFO Vacancy Register */ |
Definition at line 44 of file fifo_icap.c.
| void fifo_icap_flush_fifo | ( | struct hwicap_drvdata * | drvdata | ) |
| int fifo_icap_get_configuration | ( | struct hwicap_drvdata * | drvdata, |
| u32 * | frame_buffer, | ||
| u32 | num_words | ||
| ) |
fifo_icap_get_configuration - Read configuration data from the device. : a pointer to the drvdata. : Address of the data representing the partial bitstream : the size of the partial bitstream in 32 bit words.
This function reads the specified number of words from the ICAP device in the polled mode.
Definition at line 289 of file fifo_icap.c.
| u32 fifo_icap_get_status | ( | struct hwicap_drvdata * | drvdata | ) |
fifo_icap_get_status - Get the contents of the status register. : a pointer to the drvdata.
The status register contains the ICAP status and the done bit.
D8 - cfgerr D7 - dalign D6 - rip D5 - in_abort_l D4 - Always 1 D3 - Always 1 D2 - Always 1 D1 - Always 1 D0 - Done bit
Definition at line 160 of file fifo_icap.c.
| void fifo_icap_reset | ( | struct hwicap_drvdata * | drvdata | ) |
buffer_icap_reset - Reset the logic of the icap device. : a pointer to the drvdata.
This function forces the software reset of the complete HWICAP device. All the registers will return to the default value and the FIFO is also flushed as a part of this software reset.
Definition at line 357 of file fifo_icap.c.
| int fifo_icap_set_configuration | ( | struct hwicap_drvdata * | drvdata, |
| u32 * | frame_buffer, | ||
| u32 | num_words | ||
| ) |
fifo_icap_set_configuration - Send configuration data to the ICAP. : a pointer to the drvdata. : a pointer to the data to be written to the ICAP device. : the number of words (32 bit) to write to the ICAP device.
This function writes the given user data to the Write FIFO in polled mode and starts the transfer of the data to the ICAP device.
Definition at line 213 of file fifo_icap.c.
1.8.2