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Data Structures | Macros
fintek-cir.h File Reference
#include <linux/spinlock.h>
#include <linux/ioctl.h>

Go to the source code of this file.

Data Structures

struct  fintek_dev
 

Macros

#define FINTEK_DRIVER_NAME   "fintek-cir"
 
#define FINTEK_DESCRIPTION   "Fintek LPC SuperIO Consumer IR Transceiver"
 
#define VENDOR_ID_FINTEK   0x1934
 
#define fit_pr(level, text,...)   printk(level KBUILD_MODNAME ": " text, ## __VA_ARGS__)
 
#define fit_dbg(text,...)
 
#define fit_dbg_verbose(text,...)
 
#define fit_dbg_wake(text,...)
 
#define TX_BUF_LEN   256
 
#define RX_BUF_LEN   32
 
#define BUF_PULSE_BIT   0x80
 
#define BUF_LEN_MASK   0x1f
 
#define BUF_SAMPLE_MASK   0x7f
 
#define BUF_COMMAND_HEADER   0x9f
 
#define BUF_COMMAND_MASK   0xe0
 
#define BUF_COMMAND_NULL   0x00
 
#define BUF_HW_CMD_HEADER   0xff
 
#define BUF_CMD_G_REVISION   0x0b
 
#define BUF_CMD_S_CARRIER   0x06
 
#define BUF_CMD_S_TIMEOUT   0x0c
 
#define BUF_CMD_SIG_END   0x01
 
#define BUF_CMD_S_TXMASK   0x08
 
#define BUF_CMD_S_RXSENSOR   0x14
 
#define BUF_RSP_PULSE_COUNT   0x15
 
#define CIR_SAMPLE_PERIOD   50
 
#define CR_INDEX_PORT   0x2e
 
#define CR_DATA_PORT   0x2f
 
#define CR_INDEX_PORT2   0x4e
 
#define CR_DATA_PORT2   0x4f
 
#define PORT_SEL_PORT_4E_EN   0x10
 
#define CONFIG_REG_ENABLE   0x87
 
#define CONFIG_REG_DISABLE   0xaa
 
#define CHIP_ID_HIGH_F71809U   0x04
 
#define CHIP_ID_LOW_F71809U   0x08
 
#define GCR_SOFTWARE_RESET   0x02 /* 0x00 */
 
#define GCR_LOGICAL_DEV_NO   0x07 /* 0x00 */
 
#define GCR_CHIP_ID_HI   0x20 /* 0x04 */
 
#define GCR_CHIP_ID_LO   0x21 /* 0x08 */
 
#define GCR_VENDOR_ID_HI   0x23 /* 0x19 */
 
#define GCR_VENDOR_ID_LO   0x24 /* 0x34 */
 
#define GCR_CONFIG_PORT_SEL   0x25 /* 0x01 */
 
#define GCR_KBMOUSE_WAKEUP   0x27
 
#define LOGICAL_DEV_DISABLE   0x00
 
#define LOGICAL_DEV_ENABLE   0x01
 
#define LOGICAL_DEV_CIR_REV1   0x05
 
#define LOGICAL_DEV_CIR_REV2   0x08
 
#define CIR_CR_COMMAND_INDEX   0x04
 
#define CIR_CR_IRCS
 
#define CIR_CR_COMMAND_DATA   0x06 /* Host read or write comand data */
 
#define CIR_CR_CLASS
 
#define CIR_CR_DEV_EN   0x30 /* bit0 = 1 enables CIR */
 
#define CIR_CR_BASE_ADDR_HI   0x60 /* MSB of CIR IO base addr */
 
#define CIR_CR_BASE_ADDR_LO   0x61 /* LSB of CIR IO base addr */
 
#define CIR_CR_IRQ_SEL   0x70 /* bits3-0 store CIR IRQ */
 
#define CIR_CR_PSOUT_STATUS   0xf1
 
#define CIR_CR_WAKE_KEY3_ADDR   0xf8
 
#define CIR_CR_WAKE_KEY3_CODE   0xf9
 
#define CIR_CR_WAKE_KEY3_DC   0xfa
 
#define CIR_CR_WAKE_CONTROL   0xfb
 
#define CIR_CR_WAKE_KEY12_ADDR   0xfc
 
#define CIR_CR_WAKE_KEY4_ADDR   0xfd
 
#define CIR_CR_WAKE_KEY5_ADDR   0xfe
 
#define CLASS_RX_ONLY   0xff
 
#define CLASS_RX_2TX   0x66
 
#define CLASS_RX_1TX   0x33
 
#define CIR_STATUS   0x00
 
#define CIR_RX_DATA   0x01
 
#define CIR_TX_CONTROL   0x02
 
#define CIR_TX_DATA   0x03
 
#define CIR_CONTROL   0x04
 
#define LOGICAL_DEV_ACPI   0x01
 
#define LDEV_ACPI_WAKE_EN_REG   0xe8
 
#define ACPI_WAKE_EN_CIR_BIT   0x04
 
#define LDEV_ACPI_PME_EN_REG   0xf0
 
#define LDEV_ACPI_PME_CLR_REG   0xf1
 
#define ACPI_PME_CIR_BIT   0x02
 
#define LDEV_ACPI_STATE_REG   0xf4
 
#define ACPI_STATE_CIR_BIT   0x20
 
#define CIR_STATUS_IRQ_EN   0x80
 
#define CIR_STATUS_TX_FINISH   0x08
 
#define CIR_STATUS_TX_UNDERRUN   0x04
 
#define CIR_STATUS_RX_TIMEOUT   0x02
 
#define CIR_STATUS_RX_RECEIVE   0x01
 
#define CIR_STATUS_IRQ_MASK   0x0f
 
#define CIR_TX_CONTROL_TX_START   0x80
 
#define CIR_TX_CONTROL_TX_END   0x40
 

Macro Definition Documentation

#define ACPI_PME_CIR_BIT   0x02

Definition at line 215 of file fintek-cir.h.

#define ACPI_STATE_CIR_BIT   0x20

Definition at line 218 of file fintek-cir.h.

#define ACPI_WAKE_EN_CIR_BIT   0x04

Definition at line 211 of file fintek-cir.h.

#define BUF_CMD_G_REVISION   0x0b

Definition at line 123 of file fintek-cir.h.

#define BUF_CMD_S_CARRIER   0x06

Definition at line 124 of file fintek-cir.h.

#define BUF_CMD_S_RXSENSOR   0x14

Definition at line 128 of file fintek-cir.h.

#define BUF_CMD_S_TIMEOUT   0x0c

Definition at line 125 of file fintek-cir.h.

#define BUF_CMD_S_TXMASK   0x08

Definition at line 127 of file fintek-cir.h.

#define BUF_CMD_SIG_END   0x01

Definition at line 126 of file fintek-cir.h.

#define BUF_COMMAND_HEADER   0x9f

Definition at line 119 of file fintek-cir.h.

#define BUF_COMMAND_MASK   0xe0

Definition at line 120 of file fintek-cir.h.

#define BUF_COMMAND_NULL   0x00

Definition at line 121 of file fintek-cir.h.

#define BUF_HW_CMD_HEADER   0xff

Definition at line 122 of file fintek-cir.h.

#define BUF_LEN_MASK   0x1f

Definition at line 116 of file fintek-cir.h.

#define BUF_PULSE_BIT   0x80

Definition at line 115 of file fintek-cir.h.

#define BUF_RSP_PULSE_COUNT   0x15

Definition at line 129 of file fintek-cir.h.

#define BUF_SAMPLE_MASK   0x7f

Definition at line 117 of file fintek-cir.h.

#define CHIP_ID_HIGH_F71809U   0x04

Definition at line 156 of file fintek-cir.h.

#define CHIP_ID_LOW_F71809U   0x08

Definition at line 157 of file fintek-cir.h.

#define CIR_CONTROL   0x04

Definition at line 206 of file fintek-cir.h.

#define CIR_CR_BASE_ADDR_HI   0x60 /* MSB of CIR IO base addr */

Definition at line 185 of file fintek-cir.h.

#define CIR_CR_BASE_ADDR_LO   0x61 /* LSB of CIR IO base addr */

Definition at line 186 of file fintek-cir.h.

#define CIR_CR_CLASS
Value:
0x07 /* 0xff = rx-only, 0x66 = rx + 2 tx,
0x33 = rx + 1 tx */

Definition at line 183 of file fintek-cir.h.

#define CIR_CR_COMMAND_DATA   0x06 /* Host read or write comand data */

Definition at line 182 of file fintek-cir.h.

#define CIR_CR_COMMAND_INDEX   0x04

Definition at line 180 of file fintek-cir.h.

#define CIR_CR_DEV_EN   0x30 /* bit0 = 1 enables CIR */

Definition at line 184 of file fintek-cir.h.

#define CIR_CR_IRCS
Value:
0x05 /* Before host writes command to IR, host
must set to 1. When host finshes write
command to IR, host must clear to 0. */

Definition at line 181 of file fintek-cir.h.

#define CIR_CR_IRQ_SEL   0x70 /* bits3-0 store CIR IRQ */

Definition at line 187 of file fintek-cir.h.

#define CIR_CR_PSOUT_STATUS   0xf1

Definition at line 188 of file fintek-cir.h.

#define CIR_CR_WAKE_CONTROL   0xfb

Definition at line 192 of file fintek-cir.h.

#define CIR_CR_WAKE_KEY12_ADDR   0xfc

Definition at line 193 of file fintek-cir.h.

#define CIR_CR_WAKE_KEY3_ADDR   0xf8

Definition at line 189 of file fintek-cir.h.

#define CIR_CR_WAKE_KEY3_CODE   0xf9

Definition at line 190 of file fintek-cir.h.

#define CIR_CR_WAKE_KEY3_DC   0xfa

Definition at line 191 of file fintek-cir.h.

#define CIR_CR_WAKE_KEY4_ADDR   0xfd

Definition at line 194 of file fintek-cir.h.

#define CIR_CR_WAKE_KEY5_ADDR   0xfe

Definition at line 195 of file fintek-cir.h.

#define CIR_RX_DATA   0x01

Definition at line 203 of file fintek-cir.h.

#define CIR_SAMPLE_PERIOD   50

Definition at line 131 of file fintek-cir.h.

#define CIR_STATUS   0x00

Definition at line 202 of file fintek-cir.h.

#define CIR_STATUS_IRQ_EN   0x80

Definition at line 228 of file fintek-cir.h.

#define CIR_STATUS_IRQ_MASK   0x0f

Definition at line 233 of file fintek-cir.h.

#define CIR_STATUS_RX_RECEIVE   0x01

Definition at line 232 of file fintek-cir.h.

#define CIR_STATUS_RX_TIMEOUT   0x02

Definition at line 231 of file fintek-cir.h.

#define CIR_STATUS_TX_FINISH   0x08

Definition at line 229 of file fintek-cir.h.

#define CIR_STATUS_TX_UNDERRUN   0x04

Definition at line 230 of file fintek-cir.h.

#define CIR_TX_CONTROL   0x02

Definition at line 204 of file fintek-cir.h.

#define CIR_TX_CONTROL_TX_END   0x40

Definition at line 241 of file fintek-cir.h.

#define CIR_TX_CONTROL_TX_START   0x80

Definition at line 240 of file fintek-cir.h.

#define CIR_TX_DATA   0x03

Definition at line 205 of file fintek-cir.h.

#define CLASS_RX_1TX   0x33

Definition at line 199 of file fintek-cir.h.

#define CLASS_RX_2TX   0x66

Definition at line 198 of file fintek-cir.h.

#define CLASS_RX_ONLY   0xff

Definition at line 197 of file fintek-cir.h.

#define CONFIG_REG_DISABLE   0xaa

Definition at line 153 of file fintek-cir.h.

#define CONFIG_REG_ENABLE   0x87

Definition at line 152 of file fintek-cir.h.

#define CR_DATA_PORT   0x2f

Definition at line 139 of file fintek-cir.h.

#define CR_DATA_PORT2   0x4f

Definition at line 143 of file fintek-cir.h.

#define CR_INDEX_PORT   0x2e

Definition at line 138 of file fintek-cir.h.

#define CR_INDEX_PORT2   0x4e

Definition at line 142 of file fintek-cir.h.

#define FINTEK_DESCRIPTION   "Fintek LPC SuperIO Consumer IR Transceiver"

Definition at line 31 of file fintek-cir.h.

#define FINTEK_DRIVER_NAME   "fintek-cir"

Definition at line 30 of file fintek-cir.h.

#define fit_dbg (   text,
  ... 
)
Value:
if (debug) \
printk(KERN_DEBUG \
KBUILD_MODNAME ": " text "\n" , ## __VA_ARGS__)

Definition at line 41 of file fintek-cir.h.

#define fit_dbg_verbose (   text,
  ... 
)
Value:
if (debug > 1) \
printk(KERN_DEBUG \
KBUILD_MODNAME ": " text "\n" , ## __VA_ARGS__)

Definition at line 46 of file fintek-cir.h.

#define fit_dbg_wake (   text,
  ... 
)
Value:
if (debug > 2) \
printk(KERN_DEBUG \
KBUILD_MODNAME ": " text "\n" , ## __VA_ARGS__)

Definition at line 51 of file fintek-cir.h.

#define fit_pr (   level,
  text,
  ... 
)    printk(level KBUILD_MODNAME ": " text, ## __VA_ARGS__)

Definition at line 38 of file fintek-cir.h.

#define GCR_CHIP_ID_HI   0x20 /* 0x04 */

Definition at line 165 of file fintek-cir.h.

#define GCR_CHIP_ID_LO   0x21 /* 0x08 */

Definition at line 166 of file fintek-cir.h.

#define GCR_CONFIG_PORT_SEL   0x25 /* 0x01 */

Definition at line 169 of file fintek-cir.h.

#define GCR_KBMOUSE_WAKEUP   0x27

Definition at line 170 of file fintek-cir.h.

#define GCR_LOGICAL_DEV_NO   0x07 /* 0x00 */

Definition at line 164 of file fintek-cir.h.

#define GCR_SOFTWARE_RESET   0x02 /* 0x00 */

Definition at line 163 of file fintek-cir.h.

#define GCR_VENDOR_ID_HI   0x23 /* 0x19 */

Definition at line 167 of file fintek-cir.h.

#define GCR_VENDOR_ID_LO   0x24 /* 0x34 */

Definition at line 168 of file fintek-cir.h.

#define LDEV_ACPI_PME_CLR_REG   0xf1

Definition at line 214 of file fintek-cir.h.

#define LDEV_ACPI_PME_EN_REG   0xf0

Definition at line 213 of file fintek-cir.h.

#define LDEV_ACPI_STATE_REG   0xf4

Definition at line 217 of file fintek-cir.h.

#define LDEV_ACPI_WAKE_EN_REG   0xe8

Definition at line 210 of file fintek-cir.h.

#define LOGICAL_DEV_ACPI   0x01

Definition at line 209 of file fintek-cir.h.

#define LOGICAL_DEV_CIR_REV1   0x05

Definition at line 176 of file fintek-cir.h.

#define LOGICAL_DEV_CIR_REV2   0x08

Definition at line 177 of file fintek-cir.h.

#define LOGICAL_DEV_DISABLE   0x00

Definition at line 172 of file fintek-cir.h.

#define LOGICAL_DEV_ENABLE   0x01

Definition at line 173 of file fintek-cir.h.

#define PORT_SEL_PORT_4E_EN   0x10

Definition at line 149 of file fintek-cir.h.

#define RX_BUF_LEN   32

Definition at line 58 of file fintek-cir.h.

#define TX_BUF_LEN   256

Definition at line 57 of file fintek-cir.h.

#define VENDOR_ID_FINTEK   0x1934

Definition at line 32 of file fintek-cir.h.