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fsl_ifc.h File Reference
#include <linux/compiler.h>
#include <linux/types.h>
#include <linux/io.h>
#include <linux/of_platform.h>
#include <linux/interrupt.h>

Go to the source code of this file.

Data Structures

struct  fsl_ifc_nand
 
struct  fsl_ifc_nor
 
struct  fsl_ifc_gpcm
 
struct  fsl_ifc_regs
 
struct  fsl_ifc_ctrl
 

Macros

#define FSL_IFC_BANK_COUNT   4
 
#define CSPR_BA   0xFFFF0000
 
#define CSPR_BA_SHIFT   16
 
#define CSPR_PORT_SIZE   0x00000180
 
#define CSPR_PORT_SIZE_SHIFT   7
 
#define CSPR_PORT_SIZE_8   0x00000080
 
#define CSPR_PORT_SIZE_16   0x00000100
 
#define CSPR_PORT_SIZE_32   0x00000180
 
#define CSPR_WP   0x00000040
 
#define CSPR_WP_SHIFT   6
 
#define CSPR_MSEL   0x00000006
 
#define CSPR_MSEL_SHIFT   1
 
#define CSPR_MSEL_NOR   0x00000000
 
#define CSPR_MSEL_NAND   0x00000002
 
#define CSPR_MSEL_GPCM   0x00000004
 
#define CSPR_V   0x00000001
 
#define CSPR_V_SHIFT   0
 
#define IFC_AMASK_MASK   0xFFFF0000
 
#define IFC_AMASK_SHIFT   16
 
#define IFC_AMASK(n)
 
#define CSOR_NAND_ECC_ENC_EN   0x80000000
 
#define CSOR_NAND_ECC_MODE_MASK   0x30000000
 
#define CSOR_NAND_ECC_MODE_4   0x00000000
 
#define CSOR_NAND_ECC_MODE_8   0x10000000
 
#define CSOR_NAND_ECC_DEC_EN   0x04000000
 
#define CSOR_NAND_RAL_MASK   0x01800000
 
#define CSOR_NAND_RAL_SHIFT   20
 
#define CSOR_NAND_RAL_1   0x00000000
 
#define CSOR_NAND_RAL_2   0x00800000
 
#define CSOR_NAND_RAL_3   0x01000000
 
#define CSOR_NAND_RAL_4   0x01800000
 
#define CSOR_NAND_PGS_MASK   0x00180000
 
#define CSOR_NAND_PGS_SHIFT   16
 
#define CSOR_NAND_PGS_512   0x00000000
 
#define CSOR_NAND_PGS_2K   0x00080000
 
#define CSOR_NAND_PGS_4K   0x00100000
 
#define CSOR_NAND_SPRZ_MASK   0x0000E000
 
#define CSOR_NAND_SPRZ_SHIFT   13
 
#define CSOR_NAND_SPRZ_16   0x00000000
 
#define CSOR_NAND_SPRZ_64   0x00002000
 
#define CSOR_NAND_SPRZ_128   0x00004000
 
#define CSOR_NAND_SPRZ_210   0x00006000
 
#define CSOR_NAND_SPRZ_218   0x00008000
 
#define CSOR_NAND_SPRZ_224   0x0000A000
 
#define CSOR_NAND_PB_MASK   0x00000700
 
#define CSOR_NAND_PB_SHIFT   8
 
#define CSOR_NAND_PB(n)   ((__ilog2(n) - 5) << CSOR_NAND_PB_SHIFT)
 
#define CSOR_NAND_TRHZ_MASK   0x0000001C
 
#define CSOR_NAND_TRHZ_SHIFT   2
 
#define CSOR_NAND_TRHZ_20   0x00000000
 
#define CSOR_NAND_TRHZ_40   0x00000004
 
#define CSOR_NAND_TRHZ_60   0x00000008
 
#define CSOR_NAND_TRHZ_80   0x0000000C
 
#define CSOR_NAND_TRHZ_100   0x00000010
 
#define CSOR_NAND_BCTLD   0x00000001
 
#define CSOR_NOR_ADM_SHFT_MODE_EN   0x80000000
 
#define CSOR_NOR_PGRD_EN   0x10000000
 
#define CSOR_NOR_AVD_TGL_PGM_EN   0x01000000
 
#define CSOR_NOR_ADM_MASK   0x0003E000
 
#define CSOR_NOR_ADM_SHIFT_SHIFT   13
 
#define CSOR_NOR_ADM_SHIFT(n)   ((n) << CSOR_NOR_ADM_SHIFT_SHIFT)
 
#define CSOR_NOR_NOR_MODE_AYSNC_NOR   0x00000000
 
#define CSOR_NOR_NOR_MODE_AVD_NOR   0x00000020
 
#define CSOR_NOR_TRHZ_MASK   0x0000001C
 
#define CSOR_NOR_TRHZ_SHIFT   2
 
#define CSOR_NOR_TRHZ_20   0x00000000
 
#define CSOR_NOR_TRHZ_40   0x00000004
 
#define CSOR_NOR_TRHZ_60   0x00000008
 
#define CSOR_NOR_TRHZ_80   0x0000000C
 
#define CSOR_NOR_TRHZ_100   0x00000010
 
#define CSOR_NOR_BCTLD   0x00000001
 
#define CSOR_GPCM_GPMODE_NORMAL   0x00000000
 
#define CSOR_GPCM_GPMODE_ASIC   0x80000000
 
#define CSOR_GPCM_PARITY_EVEN   0x40000000
 
#define CSOR_GPCM_PAR_EN   0x20000000
 
#define CSOR_GPCM_GPTO_MASK   0x0F000000
 
#define CSOR_GPCM_GPTO_SHIFT   24
 
#define CSOR_GPCM_GPTO(n)   ((__ilog2(n) - 8) << CSOR_GPCM_GPTO_SHIFT)
 
#define CSOR_GPCM_RGETA_EXT   0x00080000
 
#define CSOR_GPCM_WGETA_EXT   0x00040000
 
#define CSOR_GPCM_ADM_MASK   0x0003E000
 
#define CSOR_GPCM_ADM_SHIFT_SHIFT   13
 
#define CSOR_GPCM_ADM_SHIFT(n)   ((n) << CSOR_GPCM_ADM_SHIFT_SHIFT)
 
#define CSOR_GPCM_GAPERRD_MASK   0x00000180
 
#define CSOR_GPCM_GAPERRD_SHIFT   7
 
#define CSOR_GPCM_GAPERRD(n)   (((n) - 1) << CSOR_GPCM_GAPERRD_SHIFT)
 
#define CSOR_GPCM_TRHZ_MASK   0x0000001C
 
#define CSOR_GPCM_TRHZ_20   0x00000000
 
#define CSOR_GPCM_TRHZ_40   0x00000004
 
#define CSOR_GPCM_TRHZ_60   0x00000008
 
#define CSOR_GPCM_TRHZ_80   0x0000000C
 
#define CSOR_GPCM_TRHZ_100   0x00000010
 
#define CSOR_GPCM_BCTLD   0x00000001
 
#define IFC_RB_STAT_READY_CS0   0x80000000
 
#define IFC_RB_STAT_READY_CS1   0x40000000
 
#define IFC_RB_STAT_READY_CS2   0x20000000
 
#define IFC_RB_STAT_READY_CS3   0x10000000
 
#define IFC_GCR_MASK   0x8000F800
 
#define IFC_GCR_SOFT_RST_ALL   0x80000000
 
#define IFC_GCR_TBCTL_TRN_TIME   0x0000F800
 
#define IFC_GCR_TBCTL_TRN_TIME_SHIFT   11
 
#define IFC_CM_EVTER_STAT_CSER   0x80000000
 
#define IFC_CM_EVTER_EN_CSEREN   0x80000000
 
#define IFC_CM_EVTER_INTR_EN_CSERIREN   0x80000000
 
#define IFC_CM_ERATTR0_ERTYP_READ   0x80000000
 
#define IFC_CM_ERATTR0_ERAID   0x0FF00000
 
#define IFC_CM_ERATTR0_ERAID_SHIFT   20
 
#define IFC_CM_ERATTR0_ESRCID   0x0000FF00
 
#define IFC_CM_ERATTR0_ESRCID_SHIFT   8
 
#define IFC_CCR_MASK   0x0F0F8800
 
#define IFC_CCR_CLK_DIV_MASK   0x0F000000
 
#define IFC_CCR_CLK_DIV_SHIFT   24
 
#define IFC_CCR_CLK_DIV(n)   ((n-1) << IFC_CCR_CLK_DIV_SHIFT)
 
#define IFC_CCR_CLK_DLY_MASK   0x000F0000
 
#define IFC_CCR_CLK_DLY_SHIFT   16
 
#define IFC_CCR_CLK_DLY(n)   ((n) << IFC_CCR_CLK_DLY_SHIFT)
 
#define IFC_CCR_INV_CLK_EN   0x00008000
 
#define IFC_CCR_FB_IFC_CLK_SEL   0x00000800
 
#define IFC_CSR_CLK_STAT_STABLE   0x80000000
 
#define IFC_NAND_NCFGR_BOOT   0x80000000
 
#define IFC_NAND_NCFGR_ADDR_MODE_RC0   0x00000000
 
#define IFC_NAND_NCFGR_ADDR_MODE_RC1   0x00400000
 
#define IFC_NAND_NCFGR_NUM_LOOP_MASK   0x0000F000
 
#define IFC_NAND_NCFGR_NUM_LOOP_SHIFT   12
 
#define IFC_NAND_NCFGR_NUM_LOOP(n)   ((n) << IFC_NAND_NCFGR_NUM_LOOP_SHIFT)
 
#define IFC_NAND_NCFGR_NUM_WAIT_MASK   0x000000FF
 
#define IFC_NAND_NCFGR_NUM_WAIT_SHIFT   0
 
#define IFC_NAND_FCR0_CMD0   0xFF000000
 
#define IFC_NAND_FCR0_CMD0_SHIFT   24
 
#define IFC_NAND_FCR0_CMD1   0x00FF0000
 
#define IFC_NAND_FCR0_CMD1_SHIFT   16
 
#define IFC_NAND_FCR0_CMD2   0x0000FF00
 
#define IFC_NAND_FCR0_CMD2_SHIFT   8
 
#define IFC_NAND_FCR0_CMD3   0x000000FF
 
#define IFC_NAND_FCR0_CMD3_SHIFT   0
 
#define IFC_NAND_FCR1_CMD4   0xFF000000
 
#define IFC_NAND_FCR1_CMD4_SHIFT   24
 
#define IFC_NAND_FCR1_CMD5   0x00FF0000
 
#define IFC_NAND_FCR1_CMD5_SHIFT   16
 
#define IFC_NAND_FCR1_CMD6   0x0000FF00
 
#define IFC_NAND_FCR1_CMD6_SHIFT   8
 
#define IFC_NAND_FCR1_CMD7   0x000000FF
 
#define IFC_NAND_FCR1_CMD7_SHIFT   0
 
#define IFC_NAND_COL_MS   0x80000000
 
#define IFC_NAND_COL_CA_MASK   0x00000FFF
 
#define IFC_NAND_BC   0x000001FF
 
#define IFC_NAND_FIR0_OP0   0xFC000000
 
#define IFC_NAND_FIR0_OP0_SHIFT   26
 
#define IFC_NAND_FIR0_OP1   0x03F00000
 
#define IFC_NAND_FIR0_OP1_SHIFT   20
 
#define IFC_NAND_FIR0_OP2   0x000FC000
 
#define IFC_NAND_FIR0_OP2_SHIFT   14
 
#define IFC_NAND_FIR0_OP3   0x00003F00
 
#define IFC_NAND_FIR0_OP3_SHIFT   8
 
#define IFC_NAND_FIR0_OP4   0x000000FC
 
#define IFC_NAND_FIR0_OP4_SHIFT   2
 
#define IFC_NAND_FIR1_OP5   0xFC000000
 
#define IFC_NAND_FIR1_OP5_SHIFT   26
 
#define IFC_NAND_FIR1_OP6   0x03F00000
 
#define IFC_NAND_FIR1_OP6_SHIFT   20
 
#define IFC_NAND_FIR1_OP7   0x000FC000
 
#define IFC_NAND_FIR1_OP7_SHIFT   14
 
#define IFC_NAND_FIR1_OP8   0x00003F00
 
#define IFC_NAND_FIR1_OP8_SHIFT   8
 
#define IFC_NAND_FIR1_OP9   0x000000FC
 
#define IFC_NAND_FIR1_OP9_SHIFT   2
 
#define IFC_NAND_FIR2_OP10   0xFC000000
 
#define IFC_NAND_FIR2_OP10_SHIFT   26
 
#define IFC_NAND_FIR2_OP11   0x03F00000
 
#define IFC_NAND_FIR2_OP11_SHIFT   20
 
#define IFC_NAND_FIR2_OP12   0x000FC000
 
#define IFC_NAND_FIR2_OP12_SHIFT   14
 
#define IFC_NAND_FIR2_OP13   0x00003F00
 
#define IFC_NAND_FIR2_OP13_SHIFT   8
 
#define IFC_NAND_FIR2_OP14   0x000000FC
 
#define IFC_NAND_FIR2_OP14_SHIFT   2
 
#define IFC_NAND_CSEL   0x0C000000
 
#define IFC_NAND_CSEL_SHIFT   26
 
#define IFC_NAND_CSEL_CS0   0x00000000
 
#define IFC_NAND_CSEL_CS1   0x04000000
 
#define IFC_NAND_CSEL_CS2   0x08000000
 
#define IFC_NAND_CSEL_CS3   0x0C000000
 
#define IFC_NAND_SEQ_STRT_FIR_STRT   0x80000000
 
#define IFC_NAND_SEQ_STRT_AUTO_ERS   0x00800000
 
#define IFC_NAND_SEQ_STRT_AUTO_PGM   0x00100000
 
#define IFC_NAND_SEQ_STRT_AUTO_CPB   0x00020000
 
#define IFC_NAND_SEQ_STRT_AUTO_RD   0x00004000
 
#define IFC_NAND_SEQ_STRT_AUTO_STAT_RD   0x00000800
 
#define IFC_NAND_EVTER_STAT_OPC   0x80000000
 
#define IFC_NAND_EVTER_STAT_FTOER   0x08000000
 
#define IFC_NAND_EVTER_STAT_WPER   0x04000000
 
#define IFC_NAND_EVTER_STAT_ECCER   0x02000000
 
#define IFC_NAND_EVTER_STAT_RCW_DN   0x00008000
 
#define IFC_NAND_EVTER_STAT_BOOT_DN   0x00004000
 
#define IFC_NAND_EVTER_STAT_BBI_SRCH_SE   0x00000800
 
#define PGRDCMPL_EVT_STAT_MASK   0xFFFF0000
 
#define PGRDCMPL_EVT_STAT_SECTION_SP(n)   (1 << (31 - (n)))
 
#define PGRDCMPL_EVT_STAT_LP_2K(n)   (0xF << (28 - (n)*4))
 
#define PGRDCMPL_EVT_STAT_LP_4K(n)   (0xFF << (24 - (n)*8))
 
#define IFC_NAND_EVTER_EN_OPC_EN   0x80000000
 
#define IFC_NAND_EVTER_EN_PGRDCMPL_EN   0x20000000
 
#define IFC_NAND_EVTER_EN_FTOER_EN   0x08000000
 
#define IFC_NAND_EVTER_EN_WPER_EN   0x04000000
 
#define IFC_NAND_EVTER_EN_ECCER_EN   0x02000000
 
#define IFC_NAND_EVTER_INTR_OPCIR_EN   0x80000000
 
#define IFC_NAND_EVTER_INTR_PGRDCMPLIR_EN   0x20000000
 
#define IFC_NAND_EVTER_INTR_FTOERIR_EN   0x08000000
 
#define IFC_NAND_EVTER_INTR_WPERIR_EN   0x04000000
 
#define IFC_NAND_EVTER_INTR_ECCERIR_EN   0x02000000
 
#define IFC_NAND_ERATTR0_MASK   0x0C080000
 
#define IFC_NAND_ERATTR0_ERCS_CS0   0x00000000
 
#define IFC_NAND_ERATTR0_ERCS_CS1   0x04000000
 
#define IFC_NAND_ERATTR0_ERCS_CS2   0x08000000
 
#define IFC_NAND_ERATTR0_ERCS_CS3   0x0C000000
 
#define IFC_NAND_ERATTR0_ERTTYPE_READ   0x00080000
 
#define IFC_NAND_NFSR_RS0   0xFF000000
 
#define IFC_NAND_NFSR_RS1   0x00FF0000
 
#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_MASK   0x0F000000
 
#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_SHIFT   24
 
#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_MASK   0x000F0000
 
#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_SHIFT   16
 
#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_MASK   0x00000F00
 
#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_SHIFT   8
 
#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_MASK   0x0000000F
 
#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_SHIFT   0
 
#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_MASK   0x0F000000
 
#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_SHIFT   24
 
#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_MASK   0x000F0000
 
#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_SHIFT   16
 
#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_MASK   0x00000F00
 
#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_SHIFT   8
 
#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_MASK   0x0000000F
 
#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_SHIFT   0
 
#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_MASK   0x0F000000
 
#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_SHIFT   24
 
#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_MASK   0x000F0000
 
#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_SHIFT   16
 
#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_MASK   0x00000F00
 
#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_SHIFT   8
 
#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_MASK   0x0000000F
 
#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_SHIFT   0
 
#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_MASK   0x0F000000
 
#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_SHIFT   24
 
#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_MASK   0x000F0000
 
#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_SHIFT   16
 
#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_MASK   0x00000F00
 
#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_SHIFT   8
 
#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_MASK   0x0000000F
 
#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_SHIFT   0
 
#define IFC_NAND_NCR_FTOCNT_MASK   0x1E000000
 
#define IFC_NAND_NCR_FTOCNT_SHIFT   25
 
#define IFC_NAND_NCR_FTOCNT(n)   ((_ilog2(n) - 8) << IFC_NAND_NCR_FTOCNT_SHIFT)
 
#define IFC_NAND_AUTOBOOT_TRGR_RCW_LD   0x80000000
 
#define IFC_NAND_AUTOBOOT_TRGR_BOOT_LD   0x20000000
 
#define IFC_NAND_MDR_RDATA0   0xFF000000
 
#define IFC_NAND_MDR_RDATA1   0x00FF0000
 
#define IFC_NOR_EVTER_STAT_OPC_NOR   0x80000000
 
#define IFC_NOR_EVTER_STAT_WPER   0x04000000
 
#define IFC_NOR_EVTER_STAT_STOER   0x01000000
 
#define IFC_NOR_EVTER_EN_OPCEN_NOR   0x80000000
 
#define IFC_NOR_EVTER_EN_WPEREN   0x04000000
 
#define IFC_NOR_EVTER_EN_STOEREN   0x01000000
 
#define IFC_NOR_EVTER_INTR_OPCEN_NOR   0x80000000
 
#define IFC_NOR_EVTER_INTR_WPEREN   0x04000000
 
#define IFC_NOR_EVTER_INTR_STOEREN   0x01000000
 
#define IFC_NOR_ERATTR0_ERSRCID   0xFF000000
 
#define IFC_NOR_ERATTR0_ERAID   0x000FF000
 
#define IFC_NOR_ERATTR0_ERCS_CS0   0x00000000
 
#define IFC_NOR_ERATTR0_ERCS_CS1   0x00000010
 
#define IFC_NOR_ERATTR0_ERCS_CS2   0x00000020
 
#define IFC_NOR_ERATTR0_ERCS_CS3   0x00000030
 
#define IFC_NOR_ERATTR0_ERTYPE_READ   0x00000001
 
#define IFC_NOR_ERATTR2_ER_NUM_PHASE_EXP   0x000F0000
 
#define IFC_NOR_ERATTR2_ER_NUM_PHASE_PER   0x00000F00
 
#define IFC_NORCR_MASK   0x0F0F0000
 
#define IFC_NORCR_NUM_PHASE_MASK   0x0F000000
 
#define IFC_NORCR_NUM_PHASE_SHIFT   24
 
#define IFC_NORCR_NUM_PHASE(n)   ((n-1) << IFC_NORCR_NUM_PHASE_SHIFT)
 
#define IFC_NORCR_STOCNT_MASK   0x000F0000
 
#define IFC_NORCR_STOCNT_SHIFT   16
 
#define IFC_NORCR_STOCNT(n)   ((__ilog2(n) - 8) << IFC_NORCR_STOCNT_SHIFT)
 
#define IFC_GPCM_EVTER_STAT_TOER   0x04000000
 
#define IFC_GPCM_EVTER_STAT_PER   0x01000000
 
#define IFC_GPCM_EVTER_EN_TOER_EN   0x04000000
 
#define IFC_GPCM_EVTER_EN_PER_EN   0x01000000
 
#define IFC_GPCM_EEIER_TOERIR_EN   0x04000000
 
#define IFC_GPCM_EEIER_PERIR_EN   0x01000000
 
#define IFC_GPCM_ERATTR0_ERSRCID   0xFF000000
 
#define IFC_GPCM_ERATTR0_ERAID   0x000FF000
 
#define IFC_GPCM_ERATTR0_ERCS_CS0   0x00000000
 
#define IFC_GPCM_ERATTR0_ERCS_CS1   0x00000040
 
#define IFC_GPCM_ERATTR0_ERCS_CS2   0x00000080
 
#define IFC_GPCM_ERATTR0_ERCS_CS3   0x000000C0
 
#define IFC_GPCM_ERATTR0_ERTYPE_READ   0x00000001
 
#define IFC_GPCM_ERATTR2_PERR_BEAT   0x00000C00
 
#define IFC_GPCM_ERATTR2_PERR_BYTE   0x000000F0
 
#define IFC_GPCM_ERATTR2_PERR_DATA_PHASE   0x00000001
 
#define IFC_GPCM_STAT_BSY   0x80000000 /* GPCM is busy */
 

Enumerations

enum  ifc_nand_fir_opcodes {
  IFC_FIR_OP_NOP, IFC_FIR_OP_CA0, IFC_FIR_OP_CA1, IFC_FIR_OP_CA2,
  IFC_FIR_OP_CA3, IFC_FIR_OP_RA0, IFC_FIR_OP_RA1, IFC_FIR_OP_RA2,
  IFC_FIR_OP_RA3, IFC_FIR_OP_CMD0, IFC_FIR_OP_CMD1, IFC_FIR_OP_CMD2,
  IFC_FIR_OP_CMD3, IFC_FIR_OP_CMD4, IFC_FIR_OP_CMD5, IFC_FIR_OP_CMD6,
  IFC_FIR_OP_CMD7, IFC_FIR_OP_CW0, IFC_FIR_OP_CW1, IFC_FIR_OP_CW2,
  IFC_FIR_OP_CW3, IFC_FIR_OP_CW4, IFC_FIR_OP_CW5, IFC_FIR_OP_CW6,
  IFC_FIR_OP_CW7, IFC_FIR_OP_WBCD, IFC_FIR_OP_RBCD, IFC_FIR_OP_BTRD,
  IFC_FIR_OP_RDSTAT, IFC_FIR_OP_NWAIT, IFC_FIR_OP_WFR, IFC_FIR_OP_SBRD,
  IFC_FIR_OP_UA, IFC_FIR_OP_RB
}
 

Functions

unsigned int convert_ifc_address (phys_addr_t addr_base)
 
int fsl_ifc_find (phys_addr_t addr_base)
 

Variables

enum ifc_nand_fir_opcodes __attribute__
 
struct fsl_ifc_ctrlfsl_ifc_ctrl_dev
 

Macro Definition Documentation

#define CSOR_GPCM_ADM_MASK   0x0003E000

Definition at line 167 of file fsl_ifc.h.

#define CSOR_GPCM_ADM_SHIFT (   n)    ((n) << CSOR_GPCM_ADM_SHIFT_SHIFT)

Definition at line 169 of file fsl_ifc.h.

#define CSOR_GPCM_ADM_SHIFT_SHIFT   13

Definition at line 168 of file fsl_ifc.h.

#define CSOR_GPCM_BCTLD   0x00000001

Definition at line 182 of file fsl_ifc.h.

#define CSOR_GPCM_GAPERRD (   n)    (((n) - 1) << CSOR_GPCM_GAPERRD_SHIFT)

Definition at line 173 of file fsl_ifc.h.

#define CSOR_GPCM_GAPERRD_MASK   0x00000180

Definition at line 171 of file fsl_ifc.h.

#define CSOR_GPCM_GAPERRD_SHIFT   7

Definition at line 172 of file fsl_ifc.h.

#define CSOR_GPCM_GPMODE_ASIC   0x80000000

Definition at line 153 of file fsl_ifc.h.

#define CSOR_GPCM_GPMODE_NORMAL   0x00000000

Definition at line 151 of file fsl_ifc.h.

#define CSOR_GPCM_GPTO (   n)    ((__ilog2(n) - 8) << CSOR_GPCM_GPTO_SHIFT)

Definition at line 161 of file fsl_ifc.h.

#define CSOR_GPCM_GPTO_MASK   0x0F000000

Definition at line 159 of file fsl_ifc.h.

#define CSOR_GPCM_GPTO_SHIFT   24

Definition at line 160 of file fsl_ifc.h.

#define CSOR_GPCM_PAR_EN   0x20000000

Definition at line 157 of file fsl_ifc.h.

#define CSOR_GPCM_PARITY_EVEN   0x40000000

Definition at line 155 of file fsl_ifc.h.

#define CSOR_GPCM_RGETA_EXT   0x00080000

Definition at line 163 of file fsl_ifc.h.

#define CSOR_GPCM_TRHZ_100   0x00000010

Definition at line 180 of file fsl_ifc.h.

#define CSOR_GPCM_TRHZ_20   0x00000000

Definition at line 176 of file fsl_ifc.h.

#define CSOR_GPCM_TRHZ_40   0x00000004

Definition at line 177 of file fsl_ifc.h.

#define CSOR_GPCM_TRHZ_60   0x00000008

Definition at line 178 of file fsl_ifc.h.

#define CSOR_GPCM_TRHZ_80   0x0000000C

Definition at line 179 of file fsl_ifc.h.

#define CSOR_GPCM_TRHZ_MASK   0x0000001C

Definition at line 175 of file fsl_ifc.h.

#define CSOR_GPCM_WGETA_EXT   0x00040000

Definition at line 165 of file fsl_ifc.h.

#define CSOR_NAND_BCTLD   0x00000001

Definition at line 118 of file fsl_ifc.h.

#define CSOR_NAND_ECC_DEC_EN   0x04000000

Definition at line 82 of file fsl_ifc.h.

#define CSOR_NAND_ECC_ENC_EN   0x80000000

Definition at line 75 of file fsl_ifc.h.

#define CSOR_NAND_ECC_MODE_4   0x00000000

Definition at line 78 of file fsl_ifc.h.

#define CSOR_NAND_ECC_MODE_8   0x10000000

Definition at line 80 of file fsl_ifc.h.

#define CSOR_NAND_ECC_MODE_MASK   0x30000000

Definition at line 76 of file fsl_ifc.h.

#define CSOR_NAND_PB (   n)    ((__ilog2(n) - 5) << CSOR_NAND_PB_SHIFT)

Definition at line 108 of file fsl_ifc.h.

#define CSOR_NAND_PB_MASK   0x00000700

Definition at line 106 of file fsl_ifc.h.

#define CSOR_NAND_PB_SHIFT   8

Definition at line 107 of file fsl_ifc.h.

#define CSOR_NAND_PGS_2K   0x00080000

Definition at line 94 of file fsl_ifc.h.

#define CSOR_NAND_PGS_4K   0x00100000

Definition at line 95 of file fsl_ifc.h.

#define CSOR_NAND_PGS_512   0x00000000

Definition at line 93 of file fsl_ifc.h.

#define CSOR_NAND_PGS_MASK   0x00180000

Definition at line 91 of file fsl_ifc.h.

#define CSOR_NAND_PGS_SHIFT   16

Definition at line 92 of file fsl_ifc.h.

#define CSOR_NAND_RAL_1   0x00000000

Definition at line 86 of file fsl_ifc.h.

#define CSOR_NAND_RAL_2   0x00800000

Definition at line 87 of file fsl_ifc.h.

#define CSOR_NAND_RAL_3   0x01000000

Definition at line 88 of file fsl_ifc.h.

#define CSOR_NAND_RAL_4   0x01800000

Definition at line 89 of file fsl_ifc.h.

#define CSOR_NAND_RAL_MASK   0x01800000

Definition at line 84 of file fsl_ifc.h.

#define CSOR_NAND_RAL_SHIFT   20

Definition at line 85 of file fsl_ifc.h.

#define CSOR_NAND_SPRZ_128   0x00004000

Definition at line 101 of file fsl_ifc.h.

#define CSOR_NAND_SPRZ_16   0x00000000

Definition at line 99 of file fsl_ifc.h.

#define CSOR_NAND_SPRZ_210   0x00006000

Definition at line 102 of file fsl_ifc.h.

#define CSOR_NAND_SPRZ_218   0x00008000

Definition at line 103 of file fsl_ifc.h.

#define CSOR_NAND_SPRZ_224   0x0000A000

Definition at line 104 of file fsl_ifc.h.

#define CSOR_NAND_SPRZ_64   0x00002000

Definition at line 100 of file fsl_ifc.h.

#define CSOR_NAND_SPRZ_MASK   0x0000E000

Definition at line 97 of file fsl_ifc.h.

#define CSOR_NAND_SPRZ_SHIFT   13

Definition at line 98 of file fsl_ifc.h.

#define CSOR_NAND_TRHZ_100   0x00000010

Definition at line 116 of file fsl_ifc.h.

#define CSOR_NAND_TRHZ_20   0x00000000

Definition at line 112 of file fsl_ifc.h.

#define CSOR_NAND_TRHZ_40   0x00000004

Definition at line 113 of file fsl_ifc.h.

#define CSOR_NAND_TRHZ_60   0x00000008

Definition at line 114 of file fsl_ifc.h.

#define CSOR_NAND_TRHZ_80   0x0000000C

Definition at line 115 of file fsl_ifc.h.

#define CSOR_NAND_TRHZ_MASK   0x0000001C

Definition at line 110 of file fsl_ifc.h.

#define CSOR_NAND_TRHZ_SHIFT   2

Definition at line 111 of file fsl_ifc.h.

#define CSOR_NOR_ADM_MASK   0x0003E000

Definition at line 130 of file fsl_ifc.h.

#define CSOR_NOR_ADM_SHFT_MODE_EN   0x80000000

Definition at line 124 of file fsl_ifc.h.

#define CSOR_NOR_ADM_SHIFT (   n)    ((n) << CSOR_NOR_ADM_SHIFT_SHIFT)

Definition at line 132 of file fsl_ifc.h.

#define CSOR_NOR_ADM_SHIFT_SHIFT   13

Definition at line 131 of file fsl_ifc.h.

#define CSOR_NOR_AVD_TGL_PGM_EN   0x01000000

Definition at line 128 of file fsl_ifc.h.

#define CSOR_NOR_BCTLD   0x00000001

Definition at line 145 of file fsl_ifc.h.

#define CSOR_NOR_NOR_MODE_AVD_NOR   0x00000020

Definition at line 135 of file fsl_ifc.h.

#define CSOR_NOR_NOR_MODE_AYSNC_NOR   0x00000000

Definition at line 134 of file fsl_ifc.h.

#define CSOR_NOR_PGRD_EN   0x10000000

Definition at line 126 of file fsl_ifc.h.

#define CSOR_NOR_TRHZ_100   0x00000010

Definition at line 143 of file fsl_ifc.h.

#define CSOR_NOR_TRHZ_20   0x00000000

Definition at line 139 of file fsl_ifc.h.

#define CSOR_NOR_TRHZ_40   0x00000004

Definition at line 140 of file fsl_ifc.h.

#define CSOR_NOR_TRHZ_60   0x00000008

Definition at line 141 of file fsl_ifc.h.

#define CSOR_NOR_TRHZ_80   0x0000000C

Definition at line 142 of file fsl_ifc.h.

#define CSOR_NOR_TRHZ_MASK   0x0000001C

Definition at line 137 of file fsl_ifc.h.

#define CSOR_NOR_TRHZ_SHIFT   2

Definition at line 138 of file fsl_ifc.h.

#define CSPR_BA   0xFFFF0000

Definition at line 37 of file fsl_ifc.h.

#define CSPR_BA_SHIFT   16

Definition at line 38 of file fsl_ifc.h.

#define CSPR_MSEL   0x00000006

Definition at line 51 of file fsl_ifc.h.

#define CSPR_MSEL_GPCM   0x00000004

Definition at line 58 of file fsl_ifc.h.

#define CSPR_MSEL_NAND   0x00000002

Definition at line 56 of file fsl_ifc.h.

#define CSPR_MSEL_NOR   0x00000000

Definition at line 54 of file fsl_ifc.h.

#define CSPR_MSEL_SHIFT   1

Definition at line 52 of file fsl_ifc.h.

#define CSPR_PORT_SIZE   0x00000180

Definition at line 39 of file fsl_ifc.h.

#define CSPR_PORT_SIZE_16   0x00000100

Definition at line 44 of file fsl_ifc.h.

#define CSPR_PORT_SIZE_32   0x00000180

Definition at line 46 of file fsl_ifc.h.

#define CSPR_PORT_SIZE_8   0x00000080

Definition at line 42 of file fsl_ifc.h.

#define CSPR_PORT_SIZE_SHIFT   7

Definition at line 40 of file fsl_ifc.h.

#define CSPR_V   0x00000001

Definition at line 60 of file fsl_ifc.h.

#define CSPR_V_SHIFT   0

Definition at line 61 of file fsl_ifc.h.

#define CSPR_WP   0x00000040

Definition at line 48 of file fsl_ifc.h.

#define CSPR_WP_SHIFT   6

Definition at line 49 of file fsl_ifc.h.

#define FSL_IFC_BANK_COUNT   4

Definition at line 32 of file fsl_ifc.h.

#define IFC_AMASK (   n)
Value:
(__ilog2(n) - IFC_AMASK_SHIFT))

Definition at line 68 of file fsl_ifc.h.

#define IFC_AMASK_MASK   0xFFFF0000

Definition at line 66 of file fsl_ifc.h.

#define IFC_AMASK_SHIFT   16

Definition at line 67 of file fsl_ifc.h.

#define IFC_CCR_CLK_DIV (   n)    ((n-1) << IFC_CCR_CLK_DIV_SHIFT)

Definition at line 238 of file fsl_ifc.h.

#define IFC_CCR_CLK_DIV_MASK   0x0F000000

Definition at line 236 of file fsl_ifc.h.

#define IFC_CCR_CLK_DIV_SHIFT   24

Definition at line 237 of file fsl_ifc.h.

#define IFC_CCR_CLK_DLY (   n)    ((n) << IFC_CCR_CLK_DLY_SHIFT)

Definition at line 242 of file fsl_ifc.h.

#define IFC_CCR_CLK_DLY_MASK   0x000F0000

Definition at line 240 of file fsl_ifc.h.

#define IFC_CCR_CLK_DLY_SHIFT   16

Definition at line 241 of file fsl_ifc.h.

#define IFC_CCR_FB_IFC_CLK_SEL   0x00000800

Definition at line 246 of file fsl_ifc.h.

#define IFC_CCR_INV_CLK_EN   0x00008000

Definition at line 244 of file fsl_ifc.h.

#define IFC_CCR_MASK   0x0F0F8800

Definition at line 234 of file fsl_ifc.h.

#define IFC_CM_ERATTR0_ERAID   0x0FF00000

Definition at line 226 of file fsl_ifc.h.

#define IFC_CM_ERATTR0_ERAID_SHIFT   20

Definition at line 227 of file fsl_ifc.h.

#define IFC_CM_ERATTR0_ERTYP_READ   0x80000000

Definition at line 225 of file fsl_ifc.h.

#define IFC_CM_ERATTR0_ESRCID   0x0000FF00

Definition at line 228 of file fsl_ifc.h.

#define IFC_CM_ERATTR0_ESRCID_SHIFT   8

Definition at line 229 of file fsl_ifc.h.

#define IFC_CM_EVTER_EN_CSEREN   0x80000000

Definition at line 213 of file fsl_ifc.h.

#define IFC_CM_EVTER_INTR_EN_CSERIREN   0x80000000

Definition at line 219 of file fsl_ifc.h.

#define IFC_CM_EVTER_STAT_CSER   0x80000000

Definition at line 207 of file fsl_ifc.h.

#define IFC_CSR_CLK_STAT_STABLE   0x80000000

Definition at line 252 of file fsl_ifc.h.

#define IFC_GCR_MASK   0x8000F800

Definition at line 196 of file fsl_ifc.h.

#define IFC_GCR_SOFT_RST_ALL   0x80000000

Definition at line 198 of file fsl_ifc.h.

#define IFC_GCR_TBCTL_TRN_TIME   0x0000F800

Definition at line 200 of file fsl_ifc.h.

#define IFC_GCR_TBCTL_TRN_TIME_SHIFT   11

Definition at line 201 of file fsl_ifc.h.

#define IFC_GPCM_EEIER_PERIR_EN   0x01000000

Definition at line 641 of file fsl_ifc.h.

#define IFC_GPCM_EEIER_TOERIR_EN   0x04000000

Definition at line 639 of file fsl_ifc.h.

#define IFC_GPCM_ERATTR0_ERAID   0x000FF000

Definition at line 649 of file fsl_ifc.h.

#define IFC_GPCM_ERATTR0_ERCS_CS0   0x00000000

Definition at line 651 of file fsl_ifc.h.

#define IFC_GPCM_ERATTR0_ERCS_CS1   0x00000040

Definition at line 652 of file fsl_ifc.h.

#define IFC_GPCM_ERATTR0_ERCS_CS2   0x00000080

Definition at line 653 of file fsl_ifc.h.

#define IFC_GPCM_ERATTR0_ERCS_CS3   0x000000C0

Definition at line 654 of file fsl_ifc.h.

#define IFC_GPCM_ERATTR0_ERSRCID   0xFF000000

Definition at line 647 of file fsl_ifc.h.

#define IFC_GPCM_ERATTR0_ERTYPE_READ   0x00000001

Definition at line 656 of file fsl_ifc.h.

#define IFC_GPCM_ERATTR2_PERR_BEAT   0x00000C00

Definition at line 662 of file fsl_ifc.h.

#define IFC_GPCM_ERATTR2_PERR_BYTE   0x000000F0

Definition at line 664 of file fsl_ifc.h.

#define IFC_GPCM_ERATTR2_PERR_DATA_PHASE   0x00000001

Definition at line 666 of file fsl_ifc.h.

#define IFC_GPCM_EVTER_EN_PER_EN   0x01000000

Definition at line 633 of file fsl_ifc.h.

#define IFC_GPCM_EVTER_EN_TOER_EN   0x04000000

Definition at line 631 of file fsl_ifc.h.

#define IFC_GPCM_EVTER_STAT_PER   0x01000000

Definition at line 625 of file fsl_ifc.h.

#define IFC_GPCM_EVTER_STAT_TOER   0x04000000

Definition at line 623 of file fsl_ifc.h.

#define IFC_GPCM_STAT_BSY   0x80000000 /* GPCM is busy */

Definition at line 671 of file fsl_ifc.h.

#define IFC_NAND_AUTOBOOT_TRGR_BOOT_LD   0x20000000

Definition at line 539 of file fsl_ifc.h.

#define IFC_NAND_AUTOBOOT_TRGR_RCW_LD   0x80000000

Definition at line 537 of file fsl_ifc.h.

#define IFC_NAND_BC   0x000001FF

Definition at line 307 of file fsl_ifc.h.

#define IFC_NAND_COL_CA_MASK   0x00000FFF

Definition at line 301 of file fsl_ifc.h.

#define IFC_NAND_COL_MS   0x80000000

Definition at line 299 of file fsl_ifc.h.

#define IFC_NAND_CSEL   0x0C000000

Definition at line 388 of file fsl_ifc.h.

#define IFC_NAND_CSEL_CS0   0x00000000

Definition at line 390 of file fsl_ifc.h.

#define IFC_NAND_CSEL_CS1   0x04000000

Definition at line 391 of file fsl_ifc.h.

#define IFC_NAND_CSEL_CS2   0x08000000

Definition at line 392 of file fsl_ifc.h.

#define IFC_NAND_CSEL_CS3   0x0C000000

Definition at line 393 of file fsl_ifc.h.

#define IFC_NAND_CSEL_SHIFT   26

Definition at line 389 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_MASK   0x0F000000

Definition at line 493 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_SHIFT   24

Definition at line 494 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_MASK   0x000F0000

Definition at line 495 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_SHIFT   16

Definition at line 496 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_MASK   0x00000F00

Definition at line 497 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_SHIFT   8

Definition at line 498 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_MASK   0x0000000F

Definition at line 499 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_SHIFT   0

Definition at line 500 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_MASK   0x0F000000

Definition at line 501 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_SHIFT   24

Definition at line 502 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_MASK   0x000F0000

Definition at line 503 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_SHIFT   16

Definition at line 504 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_MASK   0x00000F00

Definition at line 505 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_SHIFT   8

Definition at line 506 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_MASK   0x0000000F

Definition at line 507 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_SHIFT   0

Definition at line 508 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_MASK   0x00000F00

Definition at line 513 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_SHIFT   8

Definition at line 514 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_MASK   0x0000000F

Definition at line 515 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_SHIFT   0

Definition at line 516 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_MASK   0x0F000000

Definition at line 509 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_SHIFT   24

Definition at line 510 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_MASK   0x000F0000

Definition at line 511 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_SHIFT   16

Definition at line 512 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_MASK   0x0F000000

Definition at line 517 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_SHIFT   24

Definition at line 518 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_MASK   0x000F0000

Definition at line 519 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_SHIFT   16

Definition at line 520 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_MASK   0x00000F00

Definition at line 521 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_SHIFT   8

Definition at line 522 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_MASK   0x0000000F

Definition at line 523 of file fsl_ifc.h.

#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_SHIFT   0

Definition at line 524 of file fsl_ifc.h.

#define IFC_NAND_ERATTR0_ERCS_CS0   0x00000000

Definition at line 474 of file fsl_ifc.h.

#define IFC_NAND_ERATTR0_ERCS_CS1   0x04000000

Definition at line 475 of file fsl_ifc.h.

#define IFC_NAND_ERATTR0_ERCS_CS2   0x08000000

Definition at line 476 of file fsl_ifc.h.

#define IFC_NAND_ERATTR0_ERCS_CS3   0x0C000000

Definition at line 477 of file fsl_ifc.h.

#define IFC_NAND_ERATTR0_ERTTYPE_READ   0x00080000

Definition at line 479 of file fsl_ifc.h.

#define IFC_NAND_ERATTR0_MASK   0x0C080000

Definition at line 472 of file fsl_ifc.h.

#define IFC_NAND_EVTER_EN_ECCER_EN   0x02000000

Definition at line 453 of file fsl_ifc.h.

#define IFC_NAND_EVTER_EN_FTOER_EN   0x08000000

Definition at line 449 of file fsl_ifc.h.

#define IFC_NAND_EVTER_EN_OPC_EN   0x80000000

Definition at line 445 of file fsl_ifc.h.

#define IFC_NAND_EVTER_EN_PGRDCMPL_EN   0x20000000

Definition at line 447 of file fsl_ifc.h.

#define IFC_NAND_EVTER_EN_WPER_EN   0x04000000

Definition at line 451 of file fsl_ifc.h.

#define IFC_NAND_EVTER_INTR_ECCERIR_EN   0x02000000

Definition at line 467 of file fsl_ifc.h.

#define IFC_NAND_EVTER_INTR_FTOERIR_EN   0x08000000

Definition at line 463 of file fsl_ifc.h.

#define IFC_NAND_EVTER_INTR_OPCIR_EN   0x80000000

Definition at line 459 of file fsl_ifc.h.

#define IFC_NAND_EVTER_INTR_PGRDCMPLIR_EN   0x20000000

Definition at line 461 of file fsl_ifc.h.

#define IFC_NAND_EVTER_INTR_WPERIR_EN   0x04000000

Definition at line 465 of file fsl_ifc.h.

#define IFC_NAND_EVTER_STAT_BBI_SRCH_SE   0x00000800

Definition at line 427 of file fsl_ifc.h.

#define IFC_NAND_EVTER_STAT_BOOT_DN   0x00004000

Definition at line 425 of file fsl_ifc.h.

#define IFC_NAND_EVTER_STAT_ECCER   0x02000000

Definition at line 421 of file fsl_ifc.h.

#define IFC_NAND_EVTER_STAT_FTOER   0x08000000

Definition at line 417 of file fsl_ifc.h.

#define IFC_NAND_EVTER_STAT_OPC   0x80000000

Definition at line 415 of file fsl_ifc.h.

#define IFC_NAND_EVTER_STAT_RCW_DN   0x00008000

Definition at line 423 of file fsl_ifc.h.

#define IFC_NAND_EVTER_STAT_WPER   0x04000000

Definition at line 419 of file fsl_ifc.h.

#define IFC_NAND_FCR0_CMD0   0xFF000000

Definition at line 278 of file fsl_ifc.h.

#define IFC_NAND_FCR0_CMD0_SHIFT   24

Definition at line 279 of file fsl_ifc.h.

#define IFC_NAND_FCR0_CMD1   0x00FF0000

Definition at line 280 of file fsl_ifc.h.

#define IFC_NAND_FCR0_CMD1_SHIFT   16

Definition at line 281 of file fsl_ifc.h.

#define IFC_NAND_FCR0_CMD2   0x0000FF00

Definition at line 282 of file fsl_ifc.h.

#define IFC_NAND_FCR0_CMD2_SHIFT   8

Definition at line 283 of file fsl_ifc.h.

#define IFC_NAND_FCR0_CMD3   0x000000FF

Definition at line 284 of file fsl_ifc.h.

#define IFC_NAND_FCR0_CMD3_SHIFT   0

Definition at line 285 of file fsl_ifc.h.

#define IFC_NAND_FCR1_CMD4   0xFF000000

Definition at line 286 of file fsl_ifc.h.

#define IFC_NAND_FCR1_CMD4_SHIFT   24

Definition at line 287 of file fsl_ifc.h.

#define IFC_NAND_FCR1_CMD5   0x00FF0000

Definition at line 288 of file fsl_ifc.h.

#define IFC_NAND_FCR1_CMD5_SHIFT   16

Definition at line 289 of file fsl_ifc.h.

#define IFC_NAND_FCR1_CMD6   0x0000FF00

Definition at line 290 of file fsl_ifc.h.

#define IFC_NAND_FCR1_CMD6_SHIFT   8

Definition at line 291 of file fsl_ifc.h.

#define IFC_NAND_FCR1_CMD7   0x000000FF

Definition at line 292 of file fsl_ifc.h.

#define IFC_NAND_FCR1_CMD7_SHIFT   0

Definition at line 293 of file fsl_ifc.h.

#define IFC_NAND_FIR0_OP0   0xFC000000

Definition at line 313 of file fsl_ifc.h.

#define IFC_NAND_FIR0_OP0_SHIFT   26

Definition at line 314 of file fsl_ifc.h.

#define IFC_NAND_FIR0_OP1   0x03F00000

Definition at line 315 of file fsl_ifc.h.

#define IFC_NAND_FIR0_OP1_SHIFT   20

Definition at line 316 of file fsl_ifc.h.

#define IFC_NAND_FIR0_OP2   0x000FC000

Definition at line 317 of file fsl_ifc.h.

#define IFC_NAND_FIR0_OP2_SHIFT   14

Definition at line 318 of file fsl_ifc.h.

#define IFC_NAND_FIR0_OP3   0x00003F00

Definition at line 319 of file fsl_ifc.h.

#define IFC_NAND_FIR0_OP3_SHIFT   8

Definition at line 320 of file fsl_ifc.h.

#define IFC_NAND_FIR0_OP4   0x000000FC

Definition at line 321 of file fsl_ifc.h.

#define IFC_NAND_FIR0_OP4_SHIFT   2

Definition at line 322 of file fsl_ifc.h.

#define IFC_NAND_FIR1_OP5   0xFC000000

Definition at line 323 of file fsl_ifc.h.

#define IFC_NAND_FIR1_OP5_SHIFT   26

Definition at line 324 of file fsl_ifc.h.

#define IFC_NAND_FIR1_OP6   0x03F00000

Definition at line 325 of file fsl_ifc.h.

#define IFC_NAND_FIR1_OP6_SHIFT   20

Definition at line 326 of file fsl_ifc.h.

#define IFC_NAND_FIR1_OP7   0x000FC000

Definition at line 327 of file fsl_ifc.h.

#define IFC_NAND_FIR1_OP7_SHIFT   14

Definition at line 328 of file fsl_ifc.h.

#define IFC_NAND_FIR1_OP8   0x00003F00

Definition at line 329 of file fsl_ifc.h.

#define IFC_NAND_FIR1_OP8_SHIFT   8

Definition at line 330 of file fsl_ifc.h.

#define IFC_NAND_FIR1_OP9   0x000000FC

Definition at line 331 of file fsl_ifc.h.

#define IFC_NAND_FIR1_OP9_SHIFT   2

Definition at line 332 of file fsl_ifc.h.

#define IFC_NAND_FIR2_OP10   0xFC000000

Definition at line 333 of file fsl_ifc.h.

#define IFC_NAND_FIR2_OP10_SHIFT   26

Definition at line 334 of file fsl_ifc.h.

#define IFC_NAND_FIR2_OP11   0x03F00000

Definition at line 335 of file fsl_ifc.h.

#define IFC_NAND_FIR2_OP11_SHIFT   20

Definition at line 336 of file fsl_ifc.h.

#define IFC_NAND_FIR2_OP12   0x000FC000

Definition at line 337 of file fsl_ifc.h.

#define IFC_NAND_FIR2_OP12_SHIFT   14

Definition at line 338 of file fsl_ifc.h.

#define IFC_NAND_FIR2_OP13   0x00003F00

Definition at line 339 of file fsl_ifc.h.

#define IFC_NAND_FIR2_OP13_SHIFT   8

Definition at line 340 of file fsl_ifc.h.

#define IFC_NAND_FIR2_OP14   0x000000FC

Definition at line 341 of file fsl_ifc.h.

#define IFC_NAND_FIR2_OP14_SHIFT   2

Definition at line 342 of file fsl_ifc.h.

#define IFC_NAND_MDR_RDATA0   0xFF000000

Definition at line 545 of file fsl_ifc.h.

#define IFC_NAND_MDR_RDATA1   0x00FF0000

Definition at line 547 of file fsl_ifc.h.

#define IFC_NAND_NCFGR_ADDR_MODE_RC0   0x00000000

Definition at line 263 of file fsl_ifc.h.

#define IFC_NAND_NCFGR_ADDR_MODE_RC1   0x00400000

Definition at line 265 of file fsl_ifc.h.

#define IFC_NAND_NCFGR_BOOT   0x80000000

Definition at line 261 of file fsl_ifc.h.

#define IFC_NAND_NCFGR_NUM_LOOP (   n)    ((n) << IFC_NAND_NCFGR_NUM_LOOP_SHIFT)

Definition at line 269 of file fsl_ifc.h.

#define IFC_NAND_NCFGR_NUM_LOOP_MASK   0x0000F000

Definition at line 267 of file fsl_ifc.h.

#define IFC_NAND_NCFGR_NUM_LOOP_SHIFT   12

Definition at line 268 of file fsl_ifc.h.

#define IFC_NAND_NCFGR_NUM_WAIT_MASK   0x000000FF

Definition at line 271 of file fsl_ifc.h.

#define IFC_NAND_NCFGR_NUM_WAIT_SHIFT   0

Definition at line 272 of file fsl_ifc.h.

#define IFC_NAND_NCR_FTOCNT (   n)    ((_ilog2(n) - 8) << IFC_NAND_NCR_FTOCNT_SHIFT)

Definition at line 531 of file fsl_ifc.h.

#define IFC_NAND_NCR_FTOCNT_MASK   0x1E000000

Definition at line 529 of file fsl_ifc.h.

#define IFC_NAND_NCR_FTOCNT_SHIFT   25

Definition at line 530 of file fsl_ifc.h.

#define IFC_NAND_NFSR_RS0   0xFF000000

Definition at line 485 of file fsl_ifc.h.

#define IFC_NAND_NFSR_RS1   0x00FF0000

Definition at line 487 of file fsl_ifc.h.

#define IFC_NAND_SEQ_STRT_AUTO_CPB   0x00020000

Definition at line 405 of file fsl_ifc.h.

#define IFC_NAND_SEQ_STRT_AUTO_ERS   0x00800000

Definition at line 401 of file fsl_ifc.h.

#define IFC_NAND_SEQ_STRT_AUTO_PGM   0x00100000

Definition at line 403 of file fsl_ifc.h.

#define IFC_NAND_SEQ_STRT_AUTO_RD   0x00004000

Definition at line 407 of file fsl_ifc.h.

#define IFC_NAND_SEQ_STRT_AUTO_STAT_RD   0x00000800

Definition at line 409 of file fsl_ifc.h.

#define IFC_NAND_SEQ_STRT_FIR_STRT   0x80000000

Definition at line 399 of file fsl_ifc.h.

#define IFC_NOR_ERATTR0_ERAID   0x000FF000

Definition at line 588 of file fsl_ifc.h.

#define IFC_NOR_ERATTR0_ERCS_CS0   0x00000000

Definition at line 590 of file fsl_ifc.h.

#define IFC_NOR_ERATTR0_ERCS_CS1   0x00000010

Definition at line 591 of file fsl_ifc.h.

#define IFC_NOR_ERATTR0_ERCS_CS2   0x00000020

Definition at line 592 of file fsl_ifc.h.

#define IFC_NOR_ERATTR0_ERCS_CS3   0x00000030

Definition at line 593 of file fsl_ifc.h.

#define IFC_NOR_ERATTR0_ERSRCID   0xFF000000

Definition at line 586 of file fsl_ifc.h.

#define IFC_NOR_ERATTR0_ERTYPE_READ   0x00000001

Definition at line 595 of file fsl_ifc.h.

#define IFC_NOR_ERATTR2_ER_NUM_PHASE_EXP   0x000F0000

Definition at line 600 of file fsl_ifc.h.

#define IFC_NOR_ERATTR2_ER_NUM_PHASE_PER   0x00000F00

Definition at line 601 of file fsl_ifc.h.

#define IFC_NOR_EVTER_EN_OPCEN_NOR   0x80000000

Definition at line 566 of file fsl_ifc.h.

#define IFC_NOR_EVTER_EN_STOEREN   0x01000000

Definition at line 570 of file fsl_ifc.h.

#define IFC_NOR_EVTER_EN_WPEREN   0x04000000

Definition at line 568 of file fsl_ifc.h.

#define IFC_NOR_EVTER_INTR_OPCEN_NOR   0x80000000

Definition at line 576 of file fsl_ifc.h.

#define IFC_NOR_EVTER_INTR_STOEREN   0x01000000

Definition at line 580 of file fsl_ifc.h.

#define IFC_NOR_EVTER_INTR_WPEREN   0x04000000

Definition at line 578 of file fsl_ifc.h.

#define IFC_NOR_EVTER_STAT_OPC_NOR   0x80000000

Definition at line 556 of file fsl_ifc.h.

#define IFC_NOR_EVTER_STAT_STOER   0x01000000

Definition at line 560 of file fsl_ifc.h.

#define IFC_NOR_EVTER_STAT_WPER   0x04000000

Definition at line 558 of file fsl_ifc.h.

#define IFC_NORCR_MASK   0x0F0F0000

Definition at line 606 of file fsl_ifc.h.

#define IFC_NORCR_NUM_PHASE (   n)    ((n-1) << IFC_NORCR_NUM_PHASE_SHIFT)

Definition at line 610 of file fsl_ifc.h.

#define IFC_NORCR_NUM_PHASE_MASK   0x0F000000

Definition at line 608 of file fsl_ifc.h.

#define IFC_NORCR_NUM_PHASE_SHIFT   24

Definition at line 609 of file fsl_ifc.h.

#define IFC_NORCR_STOCNT (   n)    ((__ilog2(n) - 8) << IFC_NORCR_STOCNT_SHIFT)

Definition at line 614 of file fsl_ifc.h.

#define IFC_NORCR_STOCNT_MASK   0x000F0000

Definition at line 612 of file fsl_ifc.h.

#define IFC_NORCR_STOCNT_SHIFT   16

Definition at line 613 of file fsl_ifc.h.

#define IFC_RB_STAT_READY_CS0   0x80000000

Definition at line 188 of file fsl_ifc.h.

#define IFC_RB_STAT_READY_CS1   0x40000000

Definition at line 189 of file fsl_ifc.h.

#define IFC_RB_STAT_READY_CS2   0x20000000

Definition at line 190 of file fsl_ifc.h.

#define IFC_RB_STAT_READY_CS3   0x10000000

Definition at line 191 of file fsl_ifc.h.

#define PGRDCMPL_EVT_STAT_LP_2K (   n)    (0xF << (28 - (n)*4))

Definition at line 437 of file fsl_ifc.h.

#define PGRDCMPL_EVT_STAT_LP_4K (   n)    (0xFF << (24 - (n)*8))

Definition at line 439 of file fsl_ifc.h.

#define PGRDCMPL_EVT_STAT_MASK   0xFFFF0000

Definition at line 433 of file fsl_ifc.h.

#define PGRDCMPL_EVT_STAT_SECTION_SP (   n)    (1 << (31 - (n)))

Definition at line 435 of file fsl_ifc.h.

Enumeration Type Documentation

Enumerator:
IFC_FIR_OP_NOP 
IFC_FIR_OP_CA0 
IFC_FIR_OP_CA1 
IFC_FIR_OP_CA2 
IFC_FIR_OP_CA3 
IFC_FIR_OP_RA0 
IFC_FIR_OP_RA1 
IFC_FIR_OP_RA2 
IFC_FIR_OP_RA3 
IFC_FIR_OP_CMD0 
IFC_FIR_OP_CMD1 
IFC_FIR_OP_CMD2 
IFC_FIR_OP_CMD3 
IFC_FIR_OP_CMD4 
IFC_FIR_OP_CMD5 
IFC_FIR_OP_CMD6 
IFC_FIR_OP_CMD7 
IFC_FIR_OP_CW0 
IFC_FIR_OP_CW1 
IFC_FIR_OP_CW2 
IFC_FIR_OP_CW3 
IFC_FIR_OP_CW4 
IFC_FIR_OP_CW5 
IFC_FIR_OP_CW6 
IFC_FIR_OP_CW7 
IFC_FIR_OP_WBCD 
IFC_FIR_OP_RBCD 
IFC_FIR_OP_BTRD 
IFC_FIR_OP_RDSTAT 
IFC_FIR_OP_NWAIT 
IFC_FIR_OP_WFR 
IFC_FIR_OP_SBRD 
IFC_FIR_OP_UA 
IFC_FIR_OP_RB 

Definition at line 348 of file fsl_ifc.h.

Function Documentation

unsigned int convert_ifc_address ( phys_addr_t  addr_base)

Definition at line 43 of file fsl_ifc.c.

int fsl_ifc_find ( phys_addr_t  addr_base)

Definition at line 58 of file fsl_ifc.c.

Variable Documentation

struct fsl_ifc_ctrl* fsl_ifc_ctrl_dev

Definition at line 36 of file fsl_ifc.c.