glb.h File Reference

Go to the source code of this file.

Macros
#define	PNX8550_GLB1_BASE   0xBBE63000
#define	PNX8550_GLB2_BASE   0xBBE4d000
#define	PNX8550_RESET_BASE   0xBBE60000
#define	PNX8550_GLB2_ENAB_INTA_O   *(volatile unsigned long *)(PNX8550_GLB2_BASE + 0x050)
#define	PNX8550_GLB_DAC_PD   0x2
#define	PNX8550_GLB_ENABLE_INTA_O   0x1
#define	PNX8550_PCIMEM   0x12000000
#define	PNX8550_PCIMEM_SIZE   0x08000000
#define	PNX8550_PCIIO   0x1c000000
#define	PNX8550_PCIIO_SIZE   0x02000000 /* 32M */
#define	PNX8550_PORT_BASE   KSEG1
#define	PNX8550_GPIO_BASE   0x1Be00000
#define	PNX8550_GPIO_DIRQ0   (PNX8550_GPIO_BASE + 0x104500)
#define	PNX8550_GPIO_MC1   (PNX8550_GPIO_BASE + 0x104004)
#define	PNX8550_GPIO_MC_31_BIT   30
#define	PNX8550_GPIO_MC_30_BIT   28
#define	PNX8550_GPIO_MC_29_BIT   26
#define	PNX8550_GPIO_MC_28_BIT   24
#define	PNX8550_GPIO_MC_27_BIT   22
#define	PNX8550_GPIO_MC_26_BIT   20
#define	PNX8550_GPIO_MC_25_BIT   18
#define	PNX8550_GPIO_MC_24_BIT   16
#define	PNX8550_GPIO_MC_23_BIT   14
#define	PNX8550_GPIO_MC_22_BIT   12
#define	PNX8550_GPIO_MC_21_BIT   10
#define	PNX8550_GPIO_MC_20_BIT   8
#define	PNX8550_GPIO_MC_19_BIT   6
#define	PNX8550_GPIO_MC_18_BIT   4
#define	PNX8550_GPIO_MC_17_BIT   2
#define	PNX8550_GPIO_MC_16_BIT   0
#define	PNX8550_GPIO_MODE_PRIMOP   0x1
#define	PNX8550_GPIO_MODE_NO_OPENDR   0x2
#define	PNX8550_GPIO_MODE_OPENDR   0x3
#define	PNX8550_RST_CTL   *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x0)
#define	PNX8550_RST_CAUSE   *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x4)
#define	PNX8550_RST_EN_WATCHDOG   *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x8)
#define	PNX8550_RST_REL_MIPS_RST_N   0x8
#define	PNX8550_RST_DO_SW_RST   0x4
#define	PNX8550_RST_REL_SYS_RST_OUT   0x2
#define	PNX8550_RST_ASSERT_SYS_RST_OUT   0x1

Macro Definition Documentation

#define PNX8550_GLB1_BASE   0xBBE63000

Definition at line 25 of file glb.h.

#define PNX8550_GLB2_BASE   0xBBE4d000

Definition at line 26 of file glb.h.

#define PNX8550_GLB2_ENAB_INTA_O   *(volatile unsigned long *)(PNX8550_GLB2_BASE + 0x050)

Definition at line 30 of file glb.h.

#define PNX8550_GLB_DAC_PD   0x2

Definition at line 36 of file glb.h.

#define PNX8550_GLB_ENABLE_INTA_O   0x1

Definition at line 41 of file glb.h.

#define PNX8550_GPIO_BASE   0x1Be00000

Definition at line 52 of file glb.h.

#define PNX8550_GPIO_DIRQ0   (PNX8550_GPIO_BASE + 0x104500)

Definition at line 54 of file glb.h.

#define PNX8550_GPIO_MC1   (PNX8550_GPIO_BASE + 0x104004)

Definition at line 55 of file glb.h.

#define PNX8550_GPIO_MC_16_BIT   0

Definition at line 71 of file glb.h.

#define PNX8550_GPIO_MC_17_BIT   2

Definition at line 70 of file glb.h.

#define PNX8550_GPIO_MC_18_BIT   4

Definition at line 69 of file glb.h.

#define PNX8550_GPIO_MC_19_BIT   6

Definition at line 68 of file glb.h.

#define PNX8550_GPIO_MC_20_BIT   8

Definition at line 67 of file glb.h.

#define PNX8550_GPIO_MC_21_BIT   10

Definition at line 66 of file glb.h.

#define PNX8550_GPIO_MC_22_BIT   12

Definition at line 65 of file glb.h.

#define PNX8550_GPIO_MC_23_BIT   14

Definition at line 64 of file glb.h.

#define PNX8550_GPIO_MC_24_BIT   16

Definition at line 63 of file glb.h.

#define PNX8550_GPIO_MC_25_BIT   18

Definition at line 62 of file glb.h.

#define PNX8550_GPIO_MC_26_BIT   20

Definition at line 61 of file glb.h.

#define PNX8550_GPIO_MC_27_BIT   22

Definition at line 60 of file glb.h.

#define PNX8550_GPIO_MC_28_BIT   24

Definition at line 59 of file glb.h.

#define PNX8550_GPIO_MC_29_BIT   26

Definition at line 58 of file glb.h.

#define PNX8550_GPIO_MC_30_BIT   28

Definition at line 57 of file glb.h.

#define PNX8550_GPIO_MC_31_BIT   30

Definition at line 56 of file glb.h.

#define PNX8550_GPIO_MODE_NO_OPENDR   0x2

Definition at line 74 of file glb.h.

#define PNX8550_GPIO_MODE_OPENDR   0x3

Definition at line 75 of file glb.h.

#define PNX8550_GPIO_MODE_PRIMOP   0x1

Definition at line 73 of file glb.h.

#define PNX8550_PCIIO   0x1c000000

Definition at line 46 of file glb.h.

#define PNX8550_PCIIO_SIZE   0x02000000 /* 32M */

Definition at line 47 of file glb.h.

#define PNX8550_PCIMEM   0x12000000

Definition at line 44 of file glb.h.

#define PNX8550_PCIMEM_SIZE   0x08000000

Definition at line 45 of file glb.h.

#define PNX8550_PORT_BASE   KSEG1

Definition at line 49 of file glb.h.

#define PNX8550_RESET_BASE   0xBBE60000

Definition at line 27 of file glb.h.

#define PNX8550_RST_ASSERT_SYS_RST_OUT   0x1

Definition at line 85 of file glb.h.

#define PNX8550_RST_CAUSE   *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x4)

Definition at line 79 of file glb.h.

#define PNX8550_RST_CTL   *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x0)

Definition at line 78 of file glb.h.

#define PNX8550_RST_DO_SW_RST   0x4

Definition at line 83 of file glb.h.

#define PNX8550_RST_EN_WATCHDOG   *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x8)

Definition at line 80 of file glb.h.

#define PNX8550_RST_REL_MIPS_RST_N   0x8

Definition at line 82 of file glb.h.

#define PNX8550_RST_REL_SYS_RST_OUT   0x2

Definition at line 84 of file glb.h.