#include <linux/bitops.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <mach/cpu.h>
#include <mach/msm_gpiomux.h>
#include <mach/msm_iomap.h>

Data Structures
struct	msm_gpio_regs

struct	msm_gpio_chip

Macros
#define	MSM_GPIO1_REG(off) (MSM_GPIO1_BASE + (off))

#define	MSM_GPIO2_REG(off) (MSM_GPIO2_BASE + 0x400 + (off))

#define	MSM_GPIO1_SHADOW_REG(off) (MSM_GPIO1_BASE + 0x800 + (off))

#define	MSM_GPIO2_SHADOW_REG(off) (MSM_GPIO2_BASE + 0xC00 + (off))

#define	MSM7X00_GPIO_OUT_0 MSM_GPIO1_SHADOW_REG(0x00) /* gpio 15-0 */

#define	MSM7X00_GPIO_OUT_1 MSM_GPIO2_SHADOW_REG(0x00) /* gpio 42-16 */

#define	MSM7X00_GPIO_OUT_2 MSM_GPIO1_SHADOW_REG(0x04) /* gpio 67-43 */

#define	MSM7X00_GPIO_OUT_3 MSM_GPIO1_SHADOW_REG(0x08) /* gpio 94-68 */

#define	MSM7X00_GPIO_OUT_4 MSM_GPIO1_SHADOW_REG(0x0C) /* gpio 106-95 */

#define	MSM7X00_GPIO_OUT_5 MSM_GPIO1_SHADOW_REG(0x50) /* gpio 107-121 */

#define	MSM7X00_GPIO_OE_0 MSM_GPIO1_SHADOW_REG(0x10)

#define	MSM7X00_GPIO_OE_1 MSM_GPIO2_SHADOW_REG(0x08)

#define	MSM7X00_GPIO_OE_2 MSM_GPIO1_SHADOW_REG(0x14)

#define	MSM7X00_GPIO_OE_3 MSM_GPIO1_SHADOW_REG(0x18)

#define	MSM7X00_GPIO_OE_4 MSM_GPIO1_SHADOW_REG(0x1C)

#define	MSM7X00_GPIO_OE_5 MSM_GPIO1_SHADOW_REG(0x54)

#define	MSM7X00_GPIO_IN_0 MSM_GPIO1_SHADOW_REG(0x34)

#define	MSM7X00_GPIO_IN_1 MSM_GPIO2_SHADOW_REG(0x20)

#define	MSM7X00_GPIO_IN_2 MSM_GPIO1_SHADOW_REG(0x38)

#define	MSM7X00_GPIO_IN_3 MSM_GPIO1_SHADOW_REG(0x3C)

#define	MSM7X00_GPIO_IN_4 MSM_GPIO1_SHADOW_REG(0x40)

#define	MSM7X00_GPIO_IN_5 MSM_GPIO1_SHADOW_REG(0x44)

#define	MSM7X00_GPIO_INT_EDGE_0 MSM_GPIO1_SHADOW_REG(0x60)

#define	MSM7X00_GPIO_INT_EDGE_1 MSM_GPIO2_SHADOW_REG(0x50)

#define	MSM7X00_GPIO_INT_EDGE_2 MSM_GPIO1_SHADOW_REG(0x64)

#define	MSM7X00_GPIO_INT_EDGE_3 MSM_GPIO1_SHADOW_REG(0x68)

#define	MSM7X00_GPIO_INT_EDGE_4 MSM_GPIO1_SHADOW_REG(0x6C)

#define	MSM7X00_GPIO_INT_EDGE_5 MSM_GPIO1_SHADOW_REG(0xC0)

#define	MSM7X00_GPIO_INT_POS_0 MSM_GPIO1_SHADOW_REG(0x70)

#define	MSM7X00_GPIO_INT_POS_1 MSM_GPIO2_SHADOW_REG(0x58)

#define	MSM7X00_GPIO_INT_POS_2 MSM_GPIO1_SHADOW_REG(0x74)

#define	MSM7X00_GPIO_INT_POS_3 MSM_GPIO1_SHADOW_REG(0x78)

#define	MSM7X00_GPIO_INT_POS_4 MSM_GPIO1_SHADOW_REG(0x7C)

#define	MSM7X00_GPIO_INT_POS_5 MSM_GPIO1_SHADOW_REG(0xBC)

#define	MSM7X00_GPIO_INT_EN_0 MSM_GPIO1_SHADOW_REG(0x80)

#define	MSM7X00_GPIO_INT_EN_1 MSM_GPIO2_SHADOW_REG(0x60)

#define	MSM7X00_GPIO_INT_EN_2 MSM_GPIO1_SHADOW_REG(0x84)

#define	MSM7X00_GPIO_INT_EN_3 MSM_GPIO1_SHADOW_REG(0x88)

#define	MSM7X00_GPIO_INT_EN_4 MSM_GPIO1_SHADOW_REG(0x8C)

#define	MSM7X00_GPIO_INT_EN_5 MSM_GPIO1_SHADOW_REG(0xB8)

#define	MSM7X00_GPIO_INT_CLEAR_0 MSM_GPIO1_SHADOW_REG(0x90)

#define	MSM7X00_GPIO_INT_CLEAR_1 MSM_GPIO2_SHADOW_REG(0x68)

#define	MSM7X00_GPIO_INT_CLEAR_2 MSM_GPIO1_SHADOW_REG(0x94)

#define	MSM7X00_GPIO_INT_CLEAR_3 MSM_GPIO1_SHADOW_REG(0x98)

#define	MSM7X00_GPIO_INT_CLEAR_4 MSM_GPIO1_SHADOW_REG(0x9C)

#define	MSM7X00_GPIO_INT_CLEAR_5 MSM_GPIO1_SHADOW_REG(0xB4)

#define	MSM7X00_GPIO_INT_STATUS_0 MSM_GPIO1_SHADOW_REG(0xA0)

#define	MSM7X00_GPIO_INT_STATUS_1 MSM_GPIO2_SHADOW_REG(0x70)

#define	MSM7X00_GPIO_INT_STATUS_2 MSM_GPIO1_SHADOW_REG(0xA4)

#define	MSM7X00_GPIO_INT_STATUS_3 MSM_GPIO1_SHADOW_REG(0xA8)

#define	MSM7X00_GPIO_INT_STATUS_4 MSM_GPIO1_SHADOW_REG(0xAC)

#define	MSM7X00_GPIO_INT_STATUS_5 MSM_GPIO1_SHADOW_REG(0xB0)

#define	QSD8X50_GPIO_OUT_0 MSM_GPIO1_SHADOW_REG(0x00) /* gpio 15-0 */

#define	QSD8X50_GPIO_OUT_1 MSM_GPIO2_SHADOW_REG(0x00) /* gpio 42-16 */

#define	QSD8X50_GPIO_OUT_2 MSM_GPIO1_SHADOW_REG(0x04) /* gpio 67-43 */

#define	QSD8X50_GPIO_OUT_3 MSM_GPIO1_SHADOW_REG(0x08) /* gpio 94-68 */

#define	QSD8X50_GPIO_OUT_4 MSM_GPIO1_SHADOW_REG(0x0C) /* gpio 103-95 */

#define	QSD8X50_GPIO_OUT_5 MSM_GPIO1_SHADOW_REG(0x10) /* gpio 121-104 */

#define	QSD8X50_GPIO_OUT_6 MSM_GPIO1_SHADOW_REG(0x14) /* gpio 152-122 */

#define	QSD8X50_GPIO_OUT_7 MSM_GPIO1_SHADOW_REG(0x18) /* gpio 164-153 */

#define	QSD8X50_GPIO_OE_0 MSM_GPIO1_SHADOW_REG(0x20)

#define	QSD8X50_GPIO_OE_1 MSM_GPIO2_SHADOW_REG(0x08)

#define	QSD8X50_GPIO_OE_2 MSM_GPIO1_SHADOW_REG(0x24)

#define	QSD8X50_GPIO_OE_3 MSM_GPIO1_SHADOW_REG(0x28)

#define	QSD8X50_GPIO_OE_4 MSM_GPIO1_SHADOW_REG(0x2C)

#define	QSD8X50_GPIO_OE_5 MSM_GPIO1_SHADOW_REG(0x30)

#define	QSD8X50_GPIO_OE_6 MSM_GPIO1_SHADOW_REG(0x34)

#define	QSD8X50_GPIO_OE_7 MSM_GPIO1_SHADOW_REG(0x38)

#define	QSD8X50_GPIO_IN_0 MSM_GPIO1_SHADOW_REG(0x50)

#define	QSD8X50_GPIO_IN_1 MSM_GPIO2_SHADOW_REG(0x20)

#define	QSD8X50_GPIO_IN_2 MSM_GPIO1_SHADOW_REG(0x54)

#define	QSD8X50_GPIO_IN_3 MSM_GPIO1_SHADOW_REG(0x58)

#define	QSD8X50_GPIO_IN_4 MSM_GPIO1_SHADOW_REG(0x5C)

#define	QSD8X50_GPIO_IN_5 MSM_GPIO1_SHADOW_REG(0x60)

#define	QSD8X50_GPIO_IN_6 MSM_GPIO1_SHADOW_REG(0x64)

#define	QSD8X50_GPIO_IN_7 MSM_GPIO1_SHADOW_REG(0x68)

#define	QSD8X50_GPIO_INT_EDGE_0 MSM_GPIO1_SHADOW_REG(0x70)

#define	QSD8X50_GPIO_INT_EDGE_1 MSM_GPIO2_SHADOW_REG(0x50)

#define	QSD8X50_GPIO_INT_EDGE_2 MSM_GPIO1_SHADOW_REG(0x74)

#define	QSD8X50_GPIO_INT_EDGE_3 MSM_GPIO1_SHADOW_REG(0x78)

#define	QSD8X50_GPIO_INT_EDGE_4 MSM_GPIO1_SHADOW_REG(0x7C)

#define	QSD8X50_GPIO_INT_EDGE_5 MSM_GPIO1_SHADOW_REG(0x80)

#define	QSD8X50_GPIO_INT_EDGE_6 MSM_GPIO1_SHADOW_REG(0x84)

#define	QSD8X50_GPIO_INT_EDGE_7 MSM_GPIO1_SHADOW_REG(0x88)

#define	QSD8X50_GPIO_INT_POS_0 MSM_GPIO1_SHADOW_REG(0x90)

#define	QSD8X50_GPIO_INT_POS_1 MSM_GPIO2_SHADOW_REG(0x58)

#define	QSD8X50_GPIO_INT_POS_2 MSM_GPIO1_SHADOW_REG(0x94)

#define	QSD8X50_GPIO_INT_POS_3 MSM_GPIO1_SHADOW_REG(0x98)

#define	QSD8X50_GPIO_INT_POS_4 MSM_GPIO1_SHADOW_REG(0x9C)

#define	QSD8X50_GPIO_INT_POS_5 MSM_GPIO1_SHADOW_REG(0xA0)

#define	QSD8X50_GPIO_INT_POS_6 MSM_GPIO1_SHADOW_REG(0xA4)

#define	QSD8X50_GPIO_INT_POS_7 MSM_GPIO1_SHADOW_REG(0xA8)

#define	QSD8X50_GPIO_INT_EN_0 MSM_GPIO1_SHADOW_REG(0xB0)

#define	QSD8X50_GPIO_INT_EN_1 MSM_GPIO2_SHADOW_REG(0x60)

#define	QSD8X50_GPIO_INT_EN_2 MSM_GPIO1_SHADOW_REG(0xB4)

#define	QSD8X50_GPIO_INT_EN_3 MSM_GPIO1_SHADOW_REG(0xB8)

#define	QSD8X50_GPIO_INT_EN_4 MSM_GPIO1_SHADOW_REG(0xBC)

#define	QSD8X50_GPIO_INT_EN_5 MSM_GPIO1_SHADOW_REG(0xC0)

#define	QSD8X50_GPIO_INT_EN_6 MSM_GPIO1_SHADOW_REG(0xC4)

#define	QSD8X50_GPIO_INT_EN_7 MSM_GPIO1_SHADOW_REG(0xC8)

#define	QSD8X50_GPIO_INT_CLEAR_0 MSM_GPIO1_SHADOW_REG(0xD0)

#define	QSD8X50_GPIO_INT_CLEAR_1 MSM_GPIO2_SHADOW_REG(0x68)

#define	QSD8X50_GPIO_INT_CLEAR_2 MSM_GPIO1_SHADOW_REG(0xD4)

#define	QSD8X50_GPIO_INT_CLEAR_3 MSM_GPIO1_SHADOW_REG(0xD8)

#define	QSD8X50_GPIO_INT_CLEAR_4 MSM_GPIO1_SHADOW_REG(0xDC)

#define	QSD8X50_GPIO_INT_CLEAR_5 MSM_GPIO1_SHADOW_REG(0xE0)

#define	QSD8X50_GPIO_INT_CLEAR_6 MSM_GPIO1_SHADOW_REG(0xE4)

#define	QSD8X50_GPIO_INT_CLEAR_7 MSM_GPIO1_SHADOW_REG(0xE8)

#define	QSD8X50_GPIO_INT_STATUS_0 MSM_GPIO1_SHADOW_REG(0xF0)

#define	QSD8X50_GPIO_INT_STATUS_1 MSM_GPIO2_SHADOW_REG(0x70)

#define	QSD8X50_GPIO_INT_STATUS_2 MSM_GPIO1_SHADOW_REG(0xF4)

#define	QSD8X50_GPIO_INT_STATUS_3 MSM_GPIO1_SHADOW_REG(0xF8)

#define	QSD8X50_GPIO_INT_STATUS_4 MSM_GPIO1_SHADOW_REG(0xFC)

#define	QSD8X50_GPIO_INT_STATUS_5 MSM_GPIO1_SHADOW_REG(0x100)

#define	QSD8X50_GPIO_INT_STATUS_6 MSM_GPIO1_SHADOW_REG(0x104)

#define	QSD8X50_GPIO_INT_STATUS_7 MSM_GPIO1_SHADOW_REG(0x108)

#define	MSM7X30_GPIO_OUT_0 MSM_GPIO1_REG(0x00) /* gpio 15-0 */

#define	MSM7X30_GPIO_OUT_1 MSM_GPIO2_REG(0x00) /* gpio 43-16 */

#define	MSM7X30_GPIO_OUT_2 MSM_GPIO1_REG(0x04) /* gpio 67-44 */

#define	MSM7X30_GPIO_OUT_3 MSM_GPIO1_REG(0x08) /* gpio 94-68 */

#define	MSM7X30_GPIO_OUT_4 MSM_GPIO1_REG(0x0C) /* gpio 106-95 */

#define	MSM7X30_GPIO_OUT_5 MSM_GPIO1_REG(0x50) /* gpio 133-107 */

#define	MSM7X30_GPIO_OUT_6 MSM_GPIO1_REG(0xC4) /* gpio 150-134 */

#define	MSM7X30_GPIO_OUT_7 MSM_GPIO1_REG(0x214) /* gpio 181-151 */

#define	MSM7X30_GPIO_OE_0 MSM_GPIO1_REG(0x10)

#define	MSM7X30_GPIO_OE_1 MSM_GPIO2_REG(0x08)

#define	MSM7X30_GPIO_OE_2 MSM_GPIO1_REG(0x14)

#define	MSM7X30_GPIO_OE_3 MSM_GPIO1_REG(0x18)

#define	MSM7X30_GPIO_OE_4 MSM_GPIO1_REG(0x1C)

#define	MSM7X30_GPIO_OE_5 MSM_GPIO1_REG(0x54)

#define	MSM7X30_GPIO_OE_6 MSM_GPIO1_REG(0xC8)

#define	MSM7X30_GPIO_OE_7 MSM_GPIO1_REG(0x218)

#define	MSM7X30_GPIO_IN_0 MSM_GPIO1_REG(0x34)

#define	MSM7X30_GPIO_IN_1 MSM_GPIO2_REG(0x20)

#define	MSM7X30_GPIO_IN_2 MSM_GPIO1_REG(0x38)

#define	MSM7X30_GPIO_IN_3 MSM_GPIO1_REG(0x3C)

#define	MSM7X30_GPIO_IN_4 MSM_GPIO1_REG(0x40)

#define	MSM7X30_GPIO_IN_5 MSM_GPIO1_REG(0x44)

#define	MSM7X30_GPIO_IN_6 MSM_GPIO1_REG(0xCC)

#define	MSM7X30_GPIO_IN_7 MSM_GPIO1_REG(0x21C)

#define	MSM7X30_GPIO_INT_EDGE_0 MSM_GPIO1_REG(0x60)

#define	MSM7X30_GPIO_INT_EDGE_1 MSM_GPIO2_REG(0x50)

#define	MSM7X30_GPIO_INT_EDGE_2 MSM_GPIO1_REG(0x64)

#define	MSM7X30_GPIO_INT_EDGE_3 MSM_GPIO1_REG(0x68)

#define	MSM7X30_GPIO_INT_EDGE_4 MSM_GPIO1_REG(0x6C)

#define	MSM7X30_GPIO_INT_EDGE_5 MSM_GPIO1_REG(0xC0)

#define	MSM7X30_GPIO_INT_EDGE_6 MSM_GPIO1_REG(0xD0)

#define	MSM7X30_GPIO_INT_EDGE_7 MSM_GPIO1_REG(0x240)

#define	MSM7X30_GPIO_INT_POS_0 MSM_GPIO1_REG(0x70)

#define	MSM7X30_GPIO_INT_POS_1 MSM_GPIO2_REG(0x58)

#define	MSM7X30_GPIO_INT_POS_2 MSM_GPIO1_REG(0x74)

#define	MSM7X30_GPIO_INT_POS_3 MSM_GPIO1_REG(0x78)

#define	MSM7X30_GPIO_INT_POS_4 MSM_GPIO1_REG(0x7C)

#define	MSM7X30_GPIO_INT_POS_5 MSM_GPIO1_REG(0xBC)

#define	MSM7X30_GPIO_INT_POS_6 MSM_GPIO1_REG(0xD4)

#define	MSM7X30_GPIO_INT_POS_7 MSM_GPIO1_REG(0x228)

#define	MSM7X30_GPIO_INT_EN_0 MSM_GPIO1_REG(0x80)

#define	MSM7X30_GPIO_INT_EN_1 MSM_GPIO2_REG(0x60)

#define	MSM7X30_GPIO_INT_EN_2 MSM_GPIO1_REG(0x84)

#define	MSM7X30_GPIO_INT_EN_3 MSM_GPIO1_REG(0x88)

#define	MSM7X30_GPIO_INT_EN_4 MSM_GPIO1_REG(0x8C)

#define	MSM7X30_GPIO_INT_EN_5 MSM_GPIO1_REG(0xB8)

#define	MSM7X30_GPIO_INT_EN_6 MSM_GPIO1_REG(0xD8)

#define	MSM7X30_GPIO_INT_EN_7 MSM_GPIO1_REG(0x22C)

#define	MSM7X30_GPIO_INT_CLEAR_0 MSM_GPIO1_REG(0x90)

#define	MSM7X30_GPIO_INT_CLEAR_1 MSM_GPIO2_REG(0x68)

#define	MSM7X30_GPIO_INT_CLEAR_2 MSM_GPIO1_REG(0x94)

#define	MSM7X30_GPIO_INT_CLEAR_3 MSM_GPIO1_REG(0x98)

#define	MSM7X30_GPIO_INT_CLEAR_4 MSM_GPIO1_REG(0x9C)

#define	MSM7X30_GPIO_INT_CLEAR_5 MSM_GPIO1_REG(0xB4)

#define	MSM7X30_GPIO_INT_CLEAR_6 MSM_GPIO1_REG(0xDC)

#define	MSM7X30_GPIO_INT_CLEAR_7 MSM_GPIO1_REG(0x230)

#define	MSM7X30_GPIO_INT_STATUS_0 MSM_GPIO1_REG(0xA0)

#define	MSM7X30_GPIO_INT_STATUS_1 MSM_GPIO2_REG(0x70)

#define	MSM7X30_GPIO_INT_STATUS_2 MSM_GPIO1_REG(0xA4)

#define	MSM7X30_GPIO_INT_STATUS_3 MSM_GPIO1_REG(0xA8)

#define	MSM7X30_GPIO_INT_STATUS_4 MSM_GPIO1_REG(0xAC)

#define	MSM7X30_GPIO_INT_STATUS_5 MSM_GPIO1_REG(0xB0)

#define	MSM7X30_GPIO_INT_STATUS_6 MSM_GPIO1_REG(0xE0)

#define	MSM7X30_GPIO_INT_STATUS_7 MSM_GPIO1_REG(0x234)

#define	FIRST_GPIO_IRQ MSM_GPIO_TO_INT(0)

#define	MSM_GPIO_BANK(soc, bank, first, last)

#define	MSM_GPIO_BROKEN_INT_CLEAR 1

#define	msm_gpio_request NULL

#define	msm_gpio_free NULL

Functions
	postcore_initcall (msm_init_gpio)

Macro Definition Documentation

#define FIRST_GPIO_IRQ MSM_GPIO_TO_INT(0)

Definition at line 275 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_IN_0 MSM_GPIO1_SHADOW_REG(0x34)

Definition at line 62 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_IN_1 MSM_GPIO2_SHADOW_REG(0x20)

Definition at line 63 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_IN_2 MSM_GPIO1_SHADOW_REG(0x38)

Definition at line 64 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_IN_3 MSM_GPIO1_SHADOW_REG(0x3C)

Definition at line 65 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_IN_4 MSM_GPIO1_SHADOW_REG(0x40)

Definition at line 66 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_IN_5 MSM_GPIO1_SHADOW_REG(0x44)

Definition at line 67 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_CLEAR_0 MSM_GPIO1_SHADOW_REG(0x90)

Definition at line 94 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_CLEAR_1 MSM_GPIO2_SHADOW_REG(0x68)

Definition at line 95 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_CLEAR_2 MSM_GPIO1_SHADOW_REG(0x94)

Definition at line 96 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_CLEAR_3 MSM_GPIO1_SHADOW_REG(0x98)

Definition at line 97 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_CLEAR_4 MSM_GPIO1_SHADOW_REG(0x9C)

Definition at line 98 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_CLEAR_5 MSM_GPIO1_SHADOW_REG(0xB4)

Definition at line 99 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EDGE_0 MSM_GPIO1_SHADOW_REG(0x60)

Definition at line 70 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EDGE_1 MSM_GPIO2_SHADOW_REG(0x50)

Definition at line 71 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EDGE_2 MSM_GPIO1_SHADOW_REG(0x64)

Definition at line 72 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EDGE_3 MSM_GPIO1_SHADOW_REG(0x68)

Definition at line 73 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EDGE_4 MSM_GPIO1_SHADOW_REG(0x6C)

Definition at line 74 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EDGE_5 MSM_GPIO1_SHADOW_REG(0xC0)

Definition at line 75 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EN_0 MSM_GPIO1_SHADOW_REG(0x80)

Definition at line 86 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EN_1 MSM_GPIO2_SHADOW_REG(0x60)

Definition at line 87 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EN_2 MSM_GPIO1_SHADOW_REG(0x84)

Definition at line 88 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EN_3 MSM_GPIO1_SHADOW_REG(0x88)

Definition at line 89 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EN_4 MSM_GPIO1_SHADOW_REG(0x8C)

Definition at line 90 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_EN_5 MSM_GPIO1_SHADOW_REG(0xB8)

Definition at line 91 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_POS_0 MSM_GPIO1_SHADOW_REG(0x70)

Definition at line 78 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_POS_1 MSM_GPIO2_SHADOW_REG(0x58)

Definition at line 79 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_POS_2 MSM_GPIO1_SHADOW_REG(0x74)

Definition at line 80 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_POS_3 MSM_GPIO1_SHADOW_REG(0x78)

Definition at line 81 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_POS_4 MSM_GPIO1_SHADOW_REG(0x7C)

Definition at line 82 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_POS_5 MSM_GPIO1_SHADOW_REG(0xBC)

Definition at line 83 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_STATUS_0 MSM_GPIO1_SHADOW_REG(0xA0)

Definition at line 102 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_STATUS_1 MSM_GPIO2_SHADOW_REG(0x70)

Definition at line 103 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_STATUS_2 MSM_GPIO1_SHADOW_REG(0xA4)

Definition at line 104 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_STATUS_3 MSM_GPIO1_SHADOW_REG(0xA8)

Definition at line 105 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_STATUS_4 MSM_GPIO1_SHADOW_REG(0xAC)

Definition at line 106 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_INT_STATUS_5 MSM_GPIO1_SHADOW_REG(0xB0)

Definition at line 107 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OE_0 MSM_GPIO1_SHADOW_REG(0x10)

Definition at line 54 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OE_1 MSM_GPIO2_SHADOW_REG(0x08)

Definition at line 55 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OE_2 MSM_GPIO1_SHADOW_REG(0x14)

Definition at line 56 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OE_3 MSM_GPIO1_SHADOW_REG(0x18)

Definition at line 57 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OE_4 MSM_GPIO1_SHADOW_REG(0x1C)

Definition at line 58 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OE_5 MSM_GPIO1_SHADOW_REG(0x54)

Definition at line 59 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OUT_0 MSM_GPIO1_SHADOW_REG(0x00) /* gpio 15-0 */

Definition at line 46 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OUT_1 MSM_GPIO2_SHADOW_REG(0x00) /* gpio 42-16 */

Definition at line 47 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OUT_2 MSM_GPIO1_SHADOW_REG(0x04) /* gpio 67-43 */

Definition at line 48 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OUT_3 MSM_GPIO1_SHADOW_REG(0x08) /* gpio 94-68 */

Definition at line 49 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OUT_4 MSM_GPIO1_SHADOW_REG(0x0C) /* gpio 106-95 */

Definition at line 50 of file gpio-msm-v1.c.

#define MSM7X00_GPIO_OUT_5 MSM_GPIO1_SHADOW_REG(0x50) /* gpio 107-121 */

Definition at line 51 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_IN_0 MSM_GPIO1_REG(0x34)

Definition at line 216 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_IN_1 MSM_GPIO2_REG(0x20)

Definition at line 217 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_IN_2 MSM_GPIO1_REG(0x38)

Definition at line 218 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_IN_3 MSM_GPIO1_REG(0x3C)

Definition at line 219 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_IN_4 MSM_GPIO1_REG(0x40)

Definition at line 220 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_IN_5 MSM_GPIO1_REG(0x44)

Definition at line 221 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_IN_6 MSM_GPIO1_REG(0xCC)

Definition at line 222 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_IN_7 MSM_GPIO1_REG(0x21C)

Definition at line 223 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_CLEAR_0 MSM_GPIO1_REG(0x90)

Definition at line 256 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_CLEAR_1 MSM_GPIO2_REG(0x68)

Definition at line 257 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_CLEAR_2 MSM_GPIO1_REG(0x94)

Definition at line 258 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_CLEAR_3 MSM_GPIO1_REG(0x98)

Definition at line 259 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_CLEAR_4 MSM_GPIO1_REG(0x9C)

Definition at line 260 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_CLEAR_5 MSM_GPIO1_REG(0xB4)

Definition at line 261 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_CLEAR_6 MSM_GPIO1_REG(0xDC)

Definition at line 262 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_CLEAR_7 MSM_GPIO1_REG(0x230)

Definition at line 263 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EDGE_0 MSM_GPIO1_REG(0x60)

Definition at line 226 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EDGE_1 MSM_GPIO2_REG(0x50)

Definition at line 227 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EDGE_2 MSM_GPIO1_REG(0x64)

Definition at line 228 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EDGE_3 MSM_GPIO1_REG(0x68)

Definition at line 229 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EDGE_4 MSM_GPIO1_REG(0x6C)

Definition at line 230 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EDGE_5 MSM_GPIO1_REG(0xC0)

Definition at line 231 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EDGE_6 MSM_GPIO1_REG(0xD0)

Definition at line 232 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EDGE_7 MSM_GPIO1_REG(0x240)

Definition at line 233 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EN_0 MSM_GPIO1_REG(0x80)

Definition at line 246 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EN_1 MSM_GPIO2_REG(0x60)

Definition at line 247 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EN_2 MSM_GPIO1_REG(0x84)

Definition at line 248 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EN_3 MSM_GPIO1_REG(0x88)

Definition at line 249 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EN_4 MSM_GPIO1_REG(0x8C)

Definition at line 250 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EN_5 MSM_GPIO1_REG(0xB8)

Definition at line 251 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EN_6 MSM_GPIO1_REG(0xD8)

Definition at line 252 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_EN_7 MSM_GPIO1_REG(0x22C)

Definition at line 253 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_POS_0 MSM_GPIO1_REG(0x70)

Definition at line 236 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_POS_1 MSM_GPIO2_REG(0x58)

Definition at line 237 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_POS_2 MSM_GPIO1_REG(0x74)

Definition at line 238 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_POS_3 MSM_GPIO1_REG(0x78)

Definition at line 239 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_POS_4 MSM_GPIO1_REG(0x7C)

Definition at line 240 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_POS_5 MSM_GPIO1_REG(0xBC)

Definition at line 241 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_POS_6 MSM_GPIO1_REG(0xD4)

Definition at line 242 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_POS_7 MSM_GPIO1_REG(0x228)

Definition at line 243 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_STATUS_0 MSM_GPIO1_REG(0xA0)

Definition at line 266 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_STATUS_1 MSM_GPIO2_REG(0x70)

Definition at line 267 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_STATUS_2 MSM_GPIO1_REG(0xA4)

Definition at line 268 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_STATUS_3 MSM_GPIO1_REG(0xA8)

Definition at line 269 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_STATUS_4 MSM_GPIO1_REG(0xAC)

Definition at line 270 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_STATUS_5 MSM_GPIO1_REG(0xB0)

Definition at line 271 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_STATUS_6 MSM_GPIO1_REG(0xE0)

Definition at line 272 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_INT_STATUS_7 MSM_GPIO1_REG(0x234)

Definition at line 273 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OE_0 MSM_GPIO1_REG(0x10)

Definition at line 206 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OE_1 MSM_GPIO2_REG(0x08)

Definition at line 207 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OE_2 MSM_GPIO1_REG(0x14)

Definition at line 208 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OE_3 MSM_GPIO1_REG(0x18)

Definition at line 209 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OE_4 MSM_GPIO1_REG(0x1C)

Definition at line 210 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OE_5 MSM_GPIO1_REG(0x54)

Definition at line 211 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OE_6 MSM_GPIO1_REG(0xC8)

Definition at line 212 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OE_7 MSM_GPIO1_REG(0x218)

Definition at line 213 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OUT_0 MSM_GPIO1_REG(0x00) /* gpio 15-0 */

Definition at line 196 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OUT_1 MSM_GPIO2_REG(0x00) /* gpio 43-16 */

Definition at line 197 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OUT_2 MSM_GPIO1_REG(0x04) /* gpio 67-44 */

Definition at line 198 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OUT_3 MSM_GPIO1_REG(0x08) /* gpio 94-68 */

Definition at line 199 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OUT_4 MSM_GPIO1_REG(0x0C) /* gpio 106-95 */

Definition at line 200 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OUT_5 MSM_GPIO1_REG(0x50) /* gpio 133-107 */

Definition at line 201 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OUT_6 MSM_GPIO1_REG(0xC4) /* gpio 150-134 */

Definition at line 202 of file gpio-msm-v1.c.

#define MSM7X30_GPIO_OUT_7 MSM_GPIO1_REG(0x214) /* gpio 181-151 */

Definition at line 203 of file gpio-msm-v1.c.

#define MSM_GPIO1_REG ( off ) (MSM_GPIO1_BASE + (off))

Definition at line 37 of file gpio-msm-v1.c.

#define MSM_GPIO1_SHADOW_REG ( off ) (MSM_GPIO1_BASE + 0x800 + (off))

Definition at line 39 of file gpio-msm-v1.c.

#define MSM_GPIO2_REG ( off ) (MSM_GPIO2_BASE + 0x400 + (off))

Definition at line 38 of file gpio-msm-v1.c.

#define MSM_GPIO2_SHADOW_REG ( off ) (MSM_GPIO2_BASE + 0xC00 + (off))

Definition at line 40 of file gpio-msm-v1.c.

#define MSM_GPIO_BANK	(	soc,
		bank,
		first,
		last
	)

Value:

{                               \
        .regs = {                       \
            .out =         soc##_GPIO_OUT_##bank,       \
            .in =          soc##_GPIO_IN_##bank,        \
            .int_status =  soc##_GPIO_INT_STATUS_##bank,    \
            .int_clear =   soc##_GPIO_INT_CLEAR_##bank, \
            .int_en =      soc##_GPIO_INT_EN_##bank,    \
            .int_edge =    soc##_GPIO_INT_EDGE_##bank,  \
            .int_pos =     soc##_GPIO_INT_POS_##bank,   \
            .oe =          soc##_GPIO_OE_##bank,        \
        },                          \
        .chip = {                       \
            .base = (first),                \
            .ngpio = (last) - (first) + 1,          \
            .get = msm_gpio_get,                \
            .set = msm_gpio_set,                \
            .direction_input = msm_gpio_direction_input,    \
            .direction_output = msm_gpio_direction_output,  \
            .to_irq = msm_gpio_to_irq,          \
            .request = msm_gpio_request,            \
            .free = msm_gpio_free,              \
        }                           \
    }

Definition at line 277 of file gpio-msm-v1.c.

#define MSM_GPIO_BROKEN_INT_CLEAR 1

Definition at line 302 of file gpio-msm-v1.c.

#define msm_gpio_free NULL

Definition at line 438 of file gpio-msm-v1.c.

#define msm_gpio_request NULL

Definition at line 437 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_IN_0 MSM_GPIO1_SHADOW_REG(0x50)

Definition at line 133 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_IN_1 MSM_GPIO2_SHADOW_REG(0x20)

Definition at line 134 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_IN_2 MSM_GPIO1_SHADOW_REG(0x54)

Definition at line 135 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_IN_3 MSM_GPIO1_SHADOW_REG(0x58)

Definition at line 136 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_IN_4 MSM_GPIO1_SHADOW_REG(0x5C)

Definition at line 137 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_IN_5 MSM_GPIO1_SHADOW_REG(0x60)

Definition at line 138 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_IN_6 MSM_GPIO1_SHADOW_REG(0x64)

Definition at line 139 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_IN_7 MSM_GPIO1_SHADOW_REG(0x68)

Definition at line 140 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_CLEAR_0 MSM_GPIO1_SHADOW_REG(0xD0)

Definition at line 173 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_CLEAR_1 MSM_GPIO2_SHADOW_REG(0x68)

Definition at line 174 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_CLEAR_2 MSM_GPIO1_SHADOW_REG(0xD4)

Definition at line 175 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_CLEAR_3 MSM_GPIO1_SHADOW_REG(0xD8)

Definition at line 176 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_CLEAR_4 MSM_GPIO1_SHADOW_REG(0xDC)

Definition at line 177 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_CLEAR_5 MSM_GPIO1_SHADOW_REG(0xE0)

Definition at line 178 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_CLEAR_6 MSM_GPIO1_SHADOW_REG(0xE4)

Definition at line 179 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_CLEAR_7 MSM_GPIO1_SHADOW_REG(0xE8)

Definition at line 180 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EDGE_0 MSM_GPIO1_SHADOW_REG(0x70)

Definition at line 143 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EDGE_1 MSM_GPIO2_SHADOW_REG(0x50)

Definition at line 144 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EDGE_2 MSM_GPIO1_SHADOW_REG(0x74)

Definition at line 145 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EDGE_3 MSM_GPIO1_SHADOW_REG(0x78)

Definition at line 146 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EDGE_4 MSM_GPIO1_SHADOW_REG(0x7C)

Definition at line 147 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EDGE_5 MSM_GPIO1_SHADOW_REG(0x80)

Definition at line 148 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EDGE_6 MSM_GPIO1_SHADOW_REG(0x84)

Definition at line 149 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EDGE_7 MSM_GPIO1_SHADOW_REG(0x88)

Definition at line 150 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EN_0 MSM_GPIO1_SHADOW_REG(0xB0)

Definition at line 163 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EN_1 MSM_GPIO2_SHADOW_REG(0x60)

Definition at line 164 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EN_2 MSM_GPIO1_SHADOW_REG(0xB4)

Definition at line 165 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EN_3 MSM_GPIO1_SHADOW_REG(0xB8)

Definition at line 166 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EN_4 MSM_GPIO1_SHADOW_REG(0xBC)

Definition at line 167 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EN_5 MSM_GPIO1_SHADOW_REG(0xC0)

Definition at line 168 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EN_6 MSM_GPIO1_SHADOW_REG(0xC4)

Definition at line 169 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_EN_7 MSM_GPIO1_SHADOW_REG(0xC8)

Definition at line 170 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_POS_0 MSM_GPIO1_SHADOW_REG(0x90)

Definition at line 153 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_POS_1 MSM_GPIO2_SHADOW_REG(0x58)

Definition at line 154 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_POS_2 MSM_GPIO1_SHADOW_REG(0x94)

Definition at line 155 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_POS_3 MSM_GPIO1_SHADOW_REG(0x98)

Definition at line 156 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_POS_4 MSM_GPIO1_SHADOW_REG(0x9C)

Definition at line 157 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_POS_5 MSM_GPIO1_SHADOW_REG(0xA0)

Definition at line 158 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_POS_6 MSM_GPIO1_SHADOW_REG(0xA4)

Definition at line 159 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_POS_7 MSM_GPIO1_SHADOW_REG(0xA8)

Definition at line 160 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_STATUS_0 MSM_GPIO1_SHADOW_REG(0xF0)

Definition at line 183 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_STATUS_1 MSM_GPIO2_SHADOW_REG(0x70)

Definition at line 184 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_STATUS_2 MSM_GPIO1_SHADOW_REG(0xF4)

Definition at line 185 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_STATUS_3 MSM_GPIO1_SHADOW_REG(0xF8)

Definition at line 186 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_STATUS_4 MSM_GPIO1_SHADOW_REG(0xFC)

Definition at line 187 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_STATUS_5 MSM_GPIO1_SHADOW_REG(0x100)

Definition at line 188 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_STATUS_6 MSM_GPIO1_SHADOW_REG(0x104)

Definition at line 189 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_INT_STATUS_7 MSM_GPIO1_SHADOW_REG(0x108)

Definition at line 190 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OE_0 MSM_GPIO1_SHADOW_REG(0x20)

Definition at line 123 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OE_1 MSM_GPIO2_SHADOW_REG(0x08)

Definition at line 124 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OE_2 MSM_GPIO1_SHADOW_REG(0x24)

Definition at line 125 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OE_3 MSM_GPIO1_SHADOW_REG(0x28)

Definition at line 126 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OE_4 MSM_GPIO1_SHADOW_REG(0x2C)

Definition at line 127 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OE_5 MSM_GPIO1_SHADOW_REG(0x30)

Definition at line 128 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OE_6 MSM_GPIO1_SHADOW_REG(0x34)

Definition at line 129 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OE_7 MSM_GPIO1_SHADOW_REG(0x38)

Definition at line 130 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OUT_0 MSM_GPIO1_SHADOW_REG(0x00) /* gpio 15-0 */

Definition at line 113 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OUT_1 MSM_GPIO2_SHADOW_REG(0x00) /* gpio 42-16 */

Definition at line 114 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OUT_2 MSM_GPIO1_SHADOW_REG(0x04) /* gpio 67-43 */

Definition at line 115 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OUT_3 MSM_GPIO1_SHADOW_REG(0x08) /* gpio 94-68 */

Definition at line 116 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OUT_4 MSM_GPIO1_SHADOW_REG(0x0C) /* gpio 103-95 */

Definition at line 117 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OUT_5 MSM_GPIO1_SHADOW_REG(0x10) /* gpio 121-104 */

Definition at line 118 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OUT_6 MSM_GPIO1_SHADOW_REG(0x14) /* gpio 152-122 */

Definition at line 119 of file gpio-msm-v1.c.

#define QSD8X50_GPIO_OUT_7 MSM_GPIO1_SHADOW_REG(0x18) /* gpio 164-153 */

Definition at line 120 of file gpio-msm-v1.c.

Function Documentation

postcore_initcall ( msm_init_gpio )

Data Structures

Macros

Functions

Macro Definition Documentation

Function Documentation