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gpmc.h File Reference

Go to the source code of this file.

Data Structures

struct  gpmc_timings
 
struct  gpmc_nand_regs
 

Macros

#define GPMC_CS_NUM   8
 
#define GPMC_CS_CONFIG1   0x00
 
#define GPMC_CS_CONFIG2   0x04
 
#define GPMC_CS_CONFIG3   0x08
 
#define GPMC_CS_CONFIG4   0x0c
 
#define GPMC_CS_CONFIG5   0x10
 
#define GPMC_CS_CONFIG6   0x14
 
#define GPMC_CS_CONFIG7   0x18
 
#define GPMC_CS_NAND_COMMAND   0x1c
 
#define GPMC_CS_NAND_ADDRESS   0x20
 
#define GPMC_CS_NAND_DATA   0x24
 
#define GPMC_CONFIG_RDY_BSY   0x00000001
 
#define GPMC_CONFIG_DEV_SIZE   0x00000002
 
#define GPMC_CONFIG_DEV_TYPE   0x00000003
 
#define GPMC_SET_IRQ_STATUS   0x00000004
 
#define GPMC_CONFIG_WP   0x00000005
 
#define GPMC_GET_IRQ_STATUS   0x00000006
 
#define GPMC_PREFETCH_FIFO_CNT   0x00000007 /* bytes available in FIFO for r/w */
 
#define GPMC_PREFETCH_COUNT   0x00000008 /* remaining bytes to be read/write*/
 
#define GPMC_STATUS_BUFFER   0x00000009 /* 1: buffer is available to write */
 
#define GPMC_NAND_COMMAND   0x0000000a
 
#define GPMC_NAND_ADDRESS   0x0000000b
 
#define GPMC_NAND_DATA   0x0000000c
 
#define GPMC_ENABLE_IRQ   0x0000000d
 
#define GPMC_ECC_READ   0 /* Reset Hardware ECC for read */
 
#define GPMC_ECC_WRITE   1 /* Reset Hardware ECC for write */
 
#define GPMC_ECC_READSYN   2 /* Reset before syndrom is read back */
 
#define GPMC_CONFIG1_WRAPBURST_SUPP   (1 << 31)
 
#define GPMC_CONFIG1_READMULTIPLE_SUPP   (1 << 30)
 
#define GPMC_CONFIG1_READTYPE_ASYNC   (0 << 29)
 
#define GPMC_CONFIG1_READTYPE_SYNC   (1 << 29)
 
#define GPMC_CONFIG1_WRITEMULTIPLE_SUPP   (1 << 28)
 
#define GPMC_CONFIG1_WRITETYPE_ASYNC   (0 << 27)
 
#define GPMC_CONFIG1_WRITETYPE_SYNC   (1 << 27)
 
#define GPMC_CONFIG1_CLKACTIVATIONTIME(val)   ((val & 3) << 25)
 
#define GPMC_CONFIG1_PAGE_LEN(val)   ((val & 3) << 23)
 
#define GPMC_CONFIG1_WAIT_READ_MON   (1 << 22)
 
#define GPMC_CONFIG1_WAIT_WRITE_MON   (1 << 21)
 
#define GPMC_CONFIG1_WAIT_MON_IIME(val)   ((val & 3) << 18)
 
#define GPMC_CONFIG1_WAIT_PIN_SEL(val)   ((val & 3) << 16)
 
#define GPMC_CONFIG1_DEVICESIZE(val)   ((val & 3) << 12)
 
#define GPMC_CONFIG1_DEVICESIZE_16   GPMC_CONFIG1_DEVICESIZE(1)
 
#define GPMC_CONFIG1_DEVICETYPE(val)   ((val & 3) << 10)
 
#define GPMC_CONFIG1_DEVICETYPE_NOR   GPMC_CONFIG1_DEVICETYPE(0)
 
#define GPMC_CONFIG1_MUXADDDATA   (1 << 9)
 
#define GPMC_CONFIG1_TIME_PARA_GRAN   (1 << 4)
 
#define GPMC_CONFIG1_FCLK_DIV(val)   (val & 3)
 
#define GPMC_CONFIG1_FCLK_DIV2   (GPMC_CONFIG1_FCLK_DIV(1))
 
#define GPMC_CONFIG1_FCLK_DIV3   (GPMC_CONFIG1_FCLK_DIV(2))
 
#define GPMC_CONFIG1_FCLK_DIV4   (GPMC_CONFIG1_FCLK_DIV(3))
 
#define GPMC_CONFIG7_CSVALID   (1 << 6)
 
#define GPMC_DEVICETYPE_NOR   0
 
#define GPMC_DEVICETYPE_NAND   2
 
#define GPMC_CONFIG_WRITEPROTECT   0x00000010
 
#define GPMC_STATUS_BUFF_EMPTY   0x00000001
 
#define WR_RD_PIN_MONITORING   0x00600000
 
#define GPMC_PREFETCH_STATUS_FIFO_CNT(val)   ((val >> 24) & 0x7F)
 
#define GPMC_PREFETCH_STATUS_COUNT(val)   (val & 0x00003fff)
 
#define GPMC_IRQ_FIFOEVENTENABLE   0x01
 
#define GPMC_IRQ_COUNT_EVENT   0x02
 
#define PREFETCH_FIFOTHRESHOLD_MAX   0x40
 
#define PREFETCH_FIFOTHRESHOLD(val)   ((val) << 8)
 

Enumerations

enum  omap_ecc {
  OMAP_ECC_HAMMING_CODE_DEFAULT = 0, OMAP_ECC_HAMMING_CODE_HW, OMAP_ECC_HAMMING_CODE_HW_ROMCODE, OMAP_ECC_BCH4_CODE_HW,
  OMAP_ECC_BCH8_CODE_HW
}
 

Functions

void gpmc_update_nand_reg (struct gpmc_nand_regs *reg, int cs)
 
int gpmc_get_client_irq (unsigned irq_config)
 
unsigned int gpmc_ns_to_ticks (unsigned int time_ns)
 
unsigned int gpmc_ps_to_ticks (unsigned int time_ps)
 
unsigned int gpmc_ticks_to_ns (unsigned int ticks)
 
unsigned int gpmc_round_ns_to_ticks (unsigned int time_ns)
 
unsigned long gpmc_get_fclk_period (void)
 
void gpmc_cs_write_reg (int cs, int idx, u32 val)
 
u32 gpmc_cs_read_reg (int cs, int idx)
 
int gpmc_cs_calc_divider (int cs, unsigned int sync_clk)
 
int gpmc_cs_set_timings (int cs, const struct gpmc_timings *t)
 
int gpmc_cs_request (int cs, unsigned long size, unsigned long *base)
 
void gpmc_cs_free (int cs)
 
int gpmc_cs_set_reserved (int cs, int reserved)
 
int gpmc_cs_reserved (int cs)
 
int gpmc_prefetch_enable (int cs, int fifo_th, int dma_mode, unsigned int u32_count, int is_write)
 
int gpmc_prefetch_reset (int cs)
 
void omap3_gpmc_save_context (void)
 
void omap3_gpmc_restore_context (void)
 
int gpmc_read_status (int cmd)
 
int gpmc_cs_configure (int cs, int cmd, int wval)
 
int gpmc_nand_read (int cs, int cmd)
 
int gpmc_nand_write (int cs, int cmd, int wval)
 
int gpmc_enable_hwecc (int cs, int mode, int dev_width, int ecc_size)
 
int gpmc_calculate_ecc (int cs, const u_char *dat, u_char *ecc_code)
 

Macro Definition Documentation

#define GPMC_CONFIG1_CLKACTIVATIONTIME (   val)    ((val & 3) << 25)

Definition at line 58 of file gpmc.h.

#define GPMC_CONFIG1_DEVICESIZE (   val)    ((val & 3) << 12)

Definition at line 64 of file gpmc.h.

#define GPMC_CONFIG1_DEVICESIZE_16   GPMC_CONFIG1_DEVICESIZE(1)

Definition at line 65 of file gpmc.h.

#define GPMC_CONFIG1_DEVICETYPE (   val)    ((val & 3) << 10)

Definition at line 66 of file gpmc.h.

#define GPMC_CONFIG1_DEVICETYPE_NOR   GPMC_CONFIG1_DEVICETYPE(0)

Definition at line 67 of file gpmc.h.

#define GPMC_CONFIG1_FCLK_DIV (   val)    (val & 3)

Definition at line 70 of file gpmc.h.

#define GPMC_CONFIG1_FCLK_DIV2   (GPMC_CONFIG1_FCLK_DIV(1))

Definition at line 71 of file gpmc.h.

#define GPMC_CONFIG1_FCLK_DIV3   (GPMC_CONFIG1_FCLK_DIV(2))

Definition at line 72 of file gpmc.h.

#define GPMC_CONFIG1_FCLK_DIV4   (GPMC_CONFIG1_FCLK_DIV(3))

Definition at line 73 of file gpmc.h.

#define GPMC_CONFIG1_MUXADDDATA   (1 << 9)

Definition at line 68 of file gpmc.h.

#define GPMC_CONFIG1_PAGE_LEN (   val)    ((val & 3) << 23)

Definition at line 59 of file gpmc.h.

#define GPMC_CONFIG1_READMULTIPLE_SUPP   (1 << 30)

Definition at line 52 of file gpmc.h.

#define GPMC_CONFIG1_READTYPE_ASYNC   (0 << 29)

Definition at line 53 of file gpmc.h.

#define GPMC_CONFIG1_READTYPE_SYNC   (1 << 29)

Definition at line 54 of file gpmc.h.

#define GPMC_CONFIG1_TIME_PARA_GRAN   (1 << 4)

Definition at line 69 of file gpmc.h.

#define GPMC_CONFIG1_WAIT_MON_IIME (   val)    ((val & 3) << 18)

Definition at line 62 of file gpmc.h.

#define GPMC_CONFIG1_WAIT_PIN_SEL (   val)    ((val & 3) << 16)

Definition at line 63 of file gpmc.h.

#define GPMC_CONFIG1_WAIT_READ_MON   (1 << 22)

Definition at line 60 of file gpmc.h.

#define GPMC_CONFIG1_WAIT_WRITE_MON   (1 << 21)

Definition at line 61 of file gpmc.h.

#define GPMC_CONFIG1_WRAPBURST_SUPP   (1 << 31)

Definition at line 51 of file gpmc.h.

#define GPMC_CONFIG1_WRITEMULTIPLE_SUPP   (1 << 28)

Definition at line 55 of file gpmc.h.

#define GPMC_CONFIG1_WRITETYPE_ASYNC   (0 << 27)

Definition at line 56 of file gpmc.h.

#define GPMC_CONFIG1_WRITETYPE_SYNC   (1 << 27)

Definition at line 57 of file gpmc.h.

#define GPMC_CONFIG7_CSVALID   (1 << 6)

Definition at line 74 of file gpmc.h.

#define GPMC_CONFIG_DEV_SIZE   0x00000002

Definition at line 30 of file gpmc.h.

#define GPMC_CONFIG_DEV_TYPE   0x00000003

Definition at line 31 of file gpmc.h.

#define GPMC_CONFIG_RDY_BSY   0x00000001

Definition at line 29 of file gpmc.h.

#define GPMC_CONFIG_WP   0x00000005

Definition at line 33 of file gpmc.h.

#define GPMC_CONFIG_WRITEPROTECT   0x00000010

Definition at line 78 of file gpmc.h.

#define GPMC_CS_CONFIG1   0x00

Definition at line 17 of file gpmc.h.

#define GPMC_CS_CONFIG2   0x04

Definition at line 18 of file gpmc.h.

#define GPMC_CS_CONFIG3   0x08

Definition at line 19 of file gpmc.h.

#define GPMC_CS_CONFIG4   0x0c

Definition at line 20 of file gpmc.h.

#define GPMC_CS_CONFIG5   0x10

Definition at line 21 of file gpmc.h.

#define GPMC_CS_CONFIG6   0x14

Definition at line 22 of file gpmc.h.

#define GPMC_CS_CONFIG7   0x18

Definition at line 23 of file gpmc.h.

#define GPMC_CS_NAND_ADDRESS   0x20

Definition at line 25 of file gpmc.h.

#define GPMC_CS_NAND_COMMAND   0x1c

Definition at line 24 of file gpmc.h.

#define GPMC_CS_NAND_DATA   0x24

Definition at line 26 of file gpmc.h.

#define GPMC_CS_NUM   8

Definition at line 15 of file gpmc.h.

#define GPMC_DEVICETYPE_NAND   2

Definition at line 77 of file gpmc.h.

#define GPMC_DEVICETYPE_NOR   0

Definition at line 76 of file gpmc.h.

#define GPMC_ECC_READ   0 /* Reset Hardware ECC for read */

Definition at line 47 of file gpmc.h.

#define GPMC_ECC_READSYN   2 /* Reset before syndrom is read back */

Definition at line 49 of file gpmc.h.

#define GPMC_ECC_WRITE   1 /* Reset Hardware ECC for write */

Definition at line 48 of file gpmc.h.

#define GPMC_ENABLE_IRQ   0x0000000d

Definition at line 44 of file gpmc.h.

#define GPMC_GET_IRQ_STATUS   0x00000006

Definition at line 35 of file gpmc.h.

#define GPMC_IRQ_COUNT_EVENT   0x02

Definition at line 84 of file gpmc.h.

#define GPMC_IRQ_FIFOEVENTENABLE   0x01

Definition at line 83 of file gpmc.h.

#define GPMC_NAND_ADDRESS   0x0000000b

Definition at line 41 of file gpmc.h.

#define GPMC_NAND_COMMAND   0x0000000a

Definition at line 40 of file gpmc.h.

#define GPMC_NAND_DATA   0x0000000c

Definition at line 42 of file gpmc.h.

#define GPMC_PREFETCH_COUNT   0x00000008 /* remaining bytes to be read/write*/

Definition at line 37 of file gpmc.h.

#define GPMC_PREFETCH_FIFO_CNT   0x00000007 /* bytes available in FIFO for r/w */

Definition at line 36 of file gpmc.h.

#define GPMC_PREFETCH_STATUS_COUNT (   val)    (val & 0x00003fff)

Definition at line 82 of file gpmc.h.

#define GPMC_PREFETCH_STATUS_FIFO_CNT (   val)    ((val >> 24) & 0x7F)

Definition at line 81 of file gpmc.h.

#define GPMC_SET_IRQ_STATUS   0x00000004

Definition at line 32 of file gpmc.h.

#define GPMC_STATUS_BUFF_EMPTY   0x00000001

Definition at line 79 of file gpmc.h.

#define GPMC_STATUS_BUFFER   0x00000009 /* 1: buffer is available to write */

Definition at line 38 of file gpmc.h.

#define PREFETCH_FIFOTHRESHOLD (   val)    ((val) << 8)

Definition at line 87 of file gpmc.h.

#define PREFETCH_FIFOTHRESHOLD_MAX   0x40

Definition at line 86 of file gpmc.h.

#define WR_RD_PIN_MONITORING   0x00600000

Definition at line 80 of file gpmc.h.

Enumeration Type Documentation

enum omap_ecc
Enumerator:
OMAP_ECC_HAMMING_CODE_DEFAULT 
OMAP_ECC_HAMMING_CODE_HW 
OMAP_ECC_HAMMING_CODE_HW_ROMCODE 
OMAP_ECC_BCH4_CODE_HW 
OMAP_ECC_BCH8_CODE_HW 

Definition at line 89 of file gpmc.h.

Function Documentation

int gpmc_calculate_ecc ( int  cs,
const u_char *  dat,
u_char *  ecc_code 
)

gpmc_calculate_ecc - generate non-inverted ecc bytes : chip select number : data pointer over which ecc is computed : ecc code buffer

Using non-inverted ECC is considered ugly since writing a blank page (padding) will clear the ECC bytes. This is not a problem as long no one is trying to write data on the seemingly unused page. Reading an erased page will produce an ECC mismatch between generated and read ECC bytes that has to be dealt with separately.

Definition at line 1159 of file gpmc.c.

int gpmc_cs_calc_divider ( int  cs,
unsigned int  sync_clk 
)

Definition at line 291 of file gpmc.c.

int gpmc_cs_configure ( int  cs,
int  cmd,
int  wval 
)

gpmc_cs_configure - write request to configure gpmc : chip select number : command type : value to write

Returns
status of the operation

Definition at line 556 of file gpmc.c.

void gpmc_cs_free ( int  cs)

Definition at line 495 of file gpmc.c.

u32 gpmc_cs_read_reg ( int  cs,
int  idx 
)

Definition at line 185 of file gpmc.c.

int gpmc_cs_request ( int  cs,
unsigned long  size,
unsigned long *  base 
)

Definition at line 461 of file gpmc.c.

int gpmc_cs_reserved ( int  cs)

Definition at line 410 of file gpmc.c.

int gpmc_cs_set_reserved ( int  cs,
int  reserved 
)

Definition at line 399 of file gpmc.c.

int gpmc_cs_set_timings ( int  cs,
const struct gpmc_timings *  t 
)

Definition at line 306 of file gpmc.c.

void gpmc_cs_write_reg ( int  cs,
int  idx,
u32  val 
)

Definition at line 177 of file gpmc.c.

int gpmc_enable_hwecc ( int  cs,
int  mode,
int  dev_width,
int  ecc_size 
)

gpmc_enable_hwecc - enable hardware ecc functionality : chip select number : read/write mode : device bus width(1 for x16, 0 for x8) : bytes for which ECC will be generated

Definition at line 1104 of file gpmc.c.

int gpmc_get_client_irq ( unsigned  irq_config)

Definition at line 750 of file gpmc.c.

unsigned long gpmc_get_fclk_period ( void  )

Definition at line 194 of file gpmc.c.

int gpmc_nand_read ( int  cs,
int  cmd 
)

gpmc_nand_read - nand specific read access request : chip select number : command type

Definition at line 622 of file gpmc.c.

int gpmc_nand_write ( int  cs,
int  cmd,
int  wval 
)

gpmc_nand_write - nand specific write request : chip select number : command type : value to write

Definition at line 644 of file gpmc.c.

unsigned int gpmc_ns_to_ticks ( unsigned int  time_ns)

Definition at line 209 of file gpmc.c.

int gpmc_prefetch_enable ( int  cs,
int  fifo_th,
int  dma_mode,
unsigned int  u32_count,
int  is_write 
)

gpmc_prefetch_enable - configures and starts prefetch transfer : cs (chip select) number : fifo threshold to be used for read/ write : dma mode enable (1) or disable (0) : number of bytes to be transferred : prefetch read(0) or write post(1) mode

Definition at line 678 of file gpmc.c.

int gpmc_prefetch_reset ( int  cs)

gpmc_prefetch_reset - disables and stops the prefetch engine

Definition at line 711 of file gpmc.c.

unsigned int gpmc_ps_to_ticks ( unsigned int  time_ps)

Definition at line 219 of file gpmc.c.

int gpmc_read_status ( int  cmd)

gpmc_read_status - read access request to get the different gpmc status : command type

Returns
status

Definition at line 516 of file gpmc.c.

unsigned int gpmc_round_ns_to_ticks ( unsigned int  time_ns)

Definition at line 234 of file gpmc.c.

unsigned int gpmc_ticks_to_ns ( unsigned int  ticks)

Definition at line 229 of file gpmc.c.

void gpmc_update_nand_reg ( struct gpmc_nand_regs *  reg,
int  cs 
)

Definition at line 730 of file gpmc.c.

void omap3_gpmc_restore_context ( void  )
void omap3_gpmc_save_context ( void  )
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