Linux Kernel
3.7.1
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#include <plat/omap_hwmod.h>
Go to the source code of this file.
Macros | |
#define | HDQ_CTRL_STATUS_OFFSET 0x0c |
#define | HDQ_CTRL_STATUS_CLOCKENABLE_SHIFT 5 |
Functions | |
int | omap_hdq1w_reset (struct omap_hwmod *oh) |
int omap_hdq1w_reset | ( | struct omap_hwmod * | oh | ) |
omap_hdq1w_reset - reset the OMAP HDQ1W module : struct omap_hwmod *
OCP soft reset the HDQ1W IP block. Section 20.6.1.4 "HDQ1W/1-Wire Software Reset" of the OMAP34xx Technical Reference Manual Revision ZR (SWPU223R) does not include the rather important fact that, for the reset to succeed, the HDQ1W module's internal clock gate must be programmed to allow the clock to propagate to the rest of the module. In this sense, it's rather similar to the I2C custom reset function. Returns 0.