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hif-ops.h
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1 /*
2  * Copyright (c) 2004-2011 Atheros Communications Inc.
3  * Copyright (c) 2011 Qualcomm Atheros, Inc.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 #ifndef HIF_OPS_H
19 #define HIF_OPS_H
20 
21 #include "hif.h"
22 #include "debug.h"
23 
24 static inline int hif_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
25  u32 len, u32 request)
26 {
27  ath6kl_dbg(ATH6KL_DBG_HIF,
28  "hif %s sync addr 0x%x buf 0x%p len %d request 0x%x\n",
29  (request & HIF_WRITE) ? "write" : "read",
30  addr, buf, len, request);
31 
32  return ar->hif_ops->read_write_sync(ar, addr, buf, len, request);
33 }
34 
35 static inline int hif_write_async(struct ath6kl *ar, u32 address, u8 *buffer,
36  u32 length, u32 request,
37  struct htc_packet *packet)
38 {
39  ath6kl_dbg(ATH6KL_DBG_HIF,
40  "hif write async addr 0x%x buf 0x%p len %d request 0x%x\n",
41  address, buffer, length, request);
42 
43  return ar->hif_ops->write_async(ar, address, buffer, length,
44  request, packet);
45 }
46 static inline void ath6kl_hif_irq_enable(struct ath6kl *ar)
47 {
48  ath6kl_dbg(ATH6KL_DBG_HIF, "hif irq enable\n");
49 
50  return ar->hif_ops->irq_enable(ar);
51 }
52 
53 static inline void ath6kl_hif_irq_disable(struct ath6kl *ar)
54 {
55  ath6kl_dbg(ATH6KL_DBG_HIF, "hif irq disable\n");
56 
57  return ar->hif_ops->irq_disable(ar);
58 }
59 
60 static inline struct hif_scatter_req *hif_scatter_req_get(struct ath6kl *ar)
61 {
62  return ar->hif_ops->scatter_req_get(ar);
63 }
64 
65 static inline void hif_scatter_req_add(struct ath6kl *ar,
66  struct hif_scatter_req *s_req)
67 {
68  return ar->hif_ops->scatter_req_add(ar, s_req);
69 }
70 
71 static inline int ath6kl_hif_enable_scatter(struct ath6kl *ar)
72 {
73  return ar->hif_ops->enable_scatter(ar);
74 }
75 
76 static inline int ath6kl_hif_scat_req_rw(struct ath6kl *ar,
77  struct hif_scatter_req *scat_req)
78 {
79  return ar->hif_ops->scat_req_rw(ar, scat_req);
80 }
81 
82 static inline void ath6kl_hif_cleanup_scatter(struct ath6kl *ar)
83 {
84  return ar->hif_ops->cleanup_scatter(ar);
85 }
86 
87 static inline int ath6kl_hif_suspend(struct ath6kl *ar,
88  struct cfg80211_wowlan *wow)
89 {
90  ath6kl_dbg(ATH6KL_DBG_HIF, "hif suspend\n");
91 
92  return ar->hif_ops->suspend(ar, wow);
93 }
94 
95 /*
96  * Read from the ATH6KL through its diagnostic window. No cooperation from
97  * the Target is required for this.
98  */
99 static inline int ath6kl_hif_diag_read32(struct ath6kl *ar, u32 address,
100  u32 *value)
101 {
102  return ar->hif_ops->diag_read32(ar, address, value);
103 }
104 
105 /*
106  * Write to the ATH6KL through its diagnostic window. No cooperation from
107  * the Target is required for this.
108  */
109 static inline int ath6kl_hif_diag_write32(struct ath6kl *ar, u32 address,
110  __le32 value)
111 {
112  return ar->hif_ops->diag_write32(ar, address, value);
113 }
114 
115 static inline int ath6kl_hif_bmi_read(struct ath6kl *ar, u8 *buf, u32 len)
116 {
117  return ar->hif_ops->bmi_read(ar, buf, len);
118 }
119 
120 static inline int ath6kl_hif_bmi_write(struct ath6kl *ar, u8 *buf, u32 len)
121 {
122  return ar->hif_ops->bmi_write(ar, buf, len);
123 }
124 
125 static inline int ath6kl_hif_resume(struct ath6kl *ar)
126 {
127  ath6kl_dbg(ATH6KL_DBG_HIF, "hif resume\n");
128 
129  return ar->hif_ops->resume(ar);
130 }
131 
132 static inline int ath6kl_hif_power_on(struct ath6kl *ar)
133 {
134  ath6kl_dbg(ATH6KL_DBG_HIF, "hif power on\n");
135 
136  return ar->hif_ops->power_on(ar);
137 }
138 
139 static inline int ath6kl_hif_power_off(struct ath6kl *ar)
140 {
141  ath6kl_dbg(ATH6KL_DBG_HIF, "hif power off\n");
142 
143  return ar->hif_ops->power_off(ar);
144 }
145 
146 static inline void ath6kl_hif_stop(struct ath6kl *ar)
147 {
148  ath6kl_dbg(ATH6KL_DBG_HIF, "hif stop\n");
149 
150  ar->hif_ops->stop(ar);
151 }
152 
153 static inline int ath6kl_hif_pipe_send(struct ath6kl *ar,
154  u8 pipe, struct sk_buff *hdr_buf,
155  struct sk_buff *buf)
156 {
157  ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe send\n");
158 
159  return ar->hif_ops->pipe_send(ar, pipe, hdr_buf, buf);
160 }
161 
162 static inline void ath6kl_hif_pipe_get_default(struct ath6kl *ar,
163  u8 *ul_pipe, u8 *dl_pipe)
164 {
165  ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get default\n");
166 
167  ar->hif_ops->pipe_get_default(ar, ul_pipe, dl_pipe);
168 }
169 
170 static inline int ath6kl_hif_pipe_map_service(struct ath6kl *ar,
171  u16 service_id, u8 *ul_pipe,
172  u8 *dl_pipe)
173 {
174  ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get default\n");
175 
176  return ar->hif_ops->pipe_map_service(ar, service_id, ul_pipe, dl_pipe);
177 }
178 
179 static inline u16 ath6kl_hif_pipe_get_free_queue_number(struct ath6kl *ar,
180  u8 pipe)
181 {
182  ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get free queue number\n");
183 
184  return ar->hif_ops->pipe_get_free_queue_number(ar, pipe);
185 }
186 
187 #endif