Linux Kernel
3.7.1
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#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/ctype.h>
#include <linux/edac.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/of_platform.h>
#include <linux/uaccess.h>
#include "edac_core.h"
#include "edac_module.h"
Go to the source code of this file.
Data Structures | |
struct | hb_mc_drvdata |
Macros | |
#define | HB_DDR_ECC_OPT 0x128 |
#define | HB_DDR_ECC_U_ERR_ADDR 0x130 |
#define | HB_DDR_ECC_U_ERR_STAT 0x134 |
#define | HB_DDR_ECC_U_ERR_DATAL 0x138 |
#define | HB_DDR_ECC_U_ERR_DATAH 0x13c |
#define | HB_DDR_ECC_C_ERR_ADDR 0x140 |
#define | HB_DDR_ECC_C_ERR_STAT 0x144 |
#define | HB_DDR_ECC_C_ERR_DATAL 0x148 |
#define | HB_DDR_ECC_C_ERR_DATAH 0x14c |
#define | HB_DDR_ECC_INT_STATUS 0x180 |
#define | HB_DDR_ECC_INT_ACK 0x184 |
#define | HB_DDR_ECC_U_ERR_ID 0x424 |
#define | HB_DDR_ECC_C_ERR_ID 0x428 |
#define | HB_DDR_ECC_INT_STAT_CE 0x8 |
#define | HB_DDR_ECC_INT_STAT_DOUBLE_CE 0x10 |
#define | HB_DDR_ECC_INT_STAT_UE 0x20 |
#define | HB_DDR_ECC_INT_STAT_DOUBLE_UE 0x40 |
#define | HB_DDR_ECC_OPT_MODE_MASK 0x3 |
#define | HB_DDR_ECC_OPT_FWC 0x100 |
#define | HB_DDR_ECC_OPT_XOR_SHIFT 16 |
Functions | |
MODULE_DEVICE_TABLE (of, hb_ddr_ctrl_of_match) | |
module_platform_driver (highbank_mc_edac_driver) | |
MODULE_LICENSE ("GPL v2") | |
MODULE_AUTHOR ("Calxeda, Inc.") | |
MODULE_DESCRIPTION ("EDAC Driver for Calxeda Highbank") | |
#define HB_DDR_ECC_C_ERR_ADDR 0x140 |
Definition at line 34 of file highbank_mc_edac.c.
#define HB_DDR_ECC_C_ERR_DATAH 0x14c |
Definition at line 37 of file highbank_mc_edac.c.
#define HB_DDR_ECC_C_ERR_DATAL 0x148 |
Definition at line 36 of file highbank_mc_edac.c.
#define HB_DDR_ECC_C_ERR_ID 0x428 |
Definition at line 41 of file highbank_mc_edac.c.
#define HB_DDR_ECC_C_ERR_STAT 0x144 |
Definition at line 35 of file highbank_mc_edac.c.
#define HB_DDR_ECC_INT_ACK 0x184 |
Definition at line 39 of file highbank_mc_edac.c.
#define HB_DDR_ECC_INT_STAT_CE 0x8 |
Definition at line 43 of file highbank_mc_edac.c.
#define HB_DDR_ECC_INT_STAT_DOUBLE_CE 0x10 |
Definition at line 44 of file highbank_mc_edac.c.
#define HB_DDR_ECC_INT_STAT_DOUBLE_UE 0x40 |
Definition at line 46 of file highbank_mc_edac.c.
#define HB_DDR_ECC_INT_STAT_UE 0x20 |
Definition at line 45 of file highbank_mc_edac.c.
#define HB_DDR_ECC_INT_STATUS 0x180 |
Definition at line 38 of file highbank_mc_edac.c.
#define HB_DDR_ECC_OPT 0x128 |
Definition at line 29 of file highbank_mc_edac.c.
#define HB_DDR_ECC_OPT_FWC 0x100 |
Definition at line 49 of file highbank_mc_edac.c.
#define HB_DDR_ECC_OPT_MODE_MASK 0x3 |
Definition at line 48 of file highbank_mc_edac.c.
#define HB_DDR_ECC_OPT_XOR_SHIFT 16 |
Definition at line 50 of file highbank_mc_edac.c.
#define HB_DDR_ECC_U_ERR_ADDR 0x130 |
Definition at line 30 of file highbank_mc_edac.c.
#define HB_DDR_ECC_U_ERR_DATAH 0x13c |
Definition at line 33 of file highbank_mc_edac.c.
#define HB_DDR_ECC_U_ERR_DATAL 0x138 |
Definition at line 32 of file highbank_mc_edac.c.
#define HB_DDR_ECC_U_ERR_ID 0x424 |
Definition at line 40 of file highbank_mc_edac.c.
#define HB_DDR_ECC_U_ERR_STAT 0x134 |
Definition at line 31 of file highbank_mc_edac.c.
MODULE_AUTHOR | ( | " | Calxeda, |
Inc." | |||
) |
MODULE_DESCRIPTION | ( | "EDAC Driver for Calxeda Highbank" | ) |
MODULE_DEVICE_TABLE | ( | of | , |
hb_ddr_ctrl_of_match | |||
) |
MODULE_LICENSE | ( | "GPL v2" | ) |
module_platform_driver | ( | highbank_mc_edac_driver | ) |