Data Structures
struct	hp100_ring

Macros
#define	HP100_PAGE_PERFORMANCE 0x0 /* Page 0 */

#define	HP100_PAGE_MAC_ADDRESS 0x1 /* Page 1 */

#define	HP100_PAGE_HW_MAP 0x2 /* Page 2 */

#define	HP100_PAGE_EEPROM_CTRL 0x3 /* Page 3 */

#define	HP100_PAGE_MAC_CTRL 0x4 /* Page 4 */

#define	HP100_PAGE_MMU_CFG 0x5 /* Page 5 */

#define	HP100_PAGE_ID_MAC_ADDR 0x6 /* Page 6 */

#define	HP100_PAGE_MMU_POINTER 0x7 /* Page 7 */

#define	HP100_REG_HW_ID 0x00 /* R: (16) Unique card ID */

#define	HP100_REG_TRACE 0x00 /* W: (16) Used for debug output */

#define	HP100_REG_PAGING 0x02 /* R: (16),15:4 Card ID */

#define	HP100_REG_OPTION_LSW 0x04 /* RW: (16) Select card functions */

#define	HP100_REG_OPTION_MSW 0x06 /* RW: (16) Select card functions */

#define	HP100_REG_IRQ_STATUS 0x08 /* RW: (16) Which ints are pending */

#define	HP100_REG_IRQ_MASK 0x0a /* RW: (16) Select ints to allow */

#define	HP100_REG_FRAGMENT_LEN 0x0c /* W: (16)12:0 Current fragment len */

#define	HP100_REG_OFFSET 0x0e /* RW: (16)12:0 Offset to start read */

#define	HP100_REG_DATA32 0x10 /* RW: (32) I/O mode data port */

#define	HP100_REG_DATA16 0x12 /* RW: WORDs must be read from here */

#define	HP100_REG_TX_MEM_FREE 0x14 /* RD: (32) Amount of free Tx mem */

#define	HP100_REG_TX_PDA_L 0x14 /* W: (32) BM: Ptr to PDL, Low Pri */

#define	HP100_REG_TX_PDA_H 0x1c /* W: (32) BM: Ptr to PDL, High Pri */

#define	HP100_REG_RX_PKT_CNT 0x18 /* RD: (8) Rx count of pkts on card */

#define	HP100_REG_TX_PKT_CNT 0x19 /* RD: (8) Tx count of pkts on card */

#define	HP100_REG_RX_PDL 0x1a /* R: (8) BM: # rx pdl not executed */

#define	HP100_REG_TX_PDL 0x1b /* R: (8) BM: # tx pdl not executed */

#define	HP100_REG_RX_PDA 0x18 /* W: (32) BM: Up to 31 addresses */

#define	HP100_REG_SL_EARLY 0x1c /* (32) Enhanced Slave Early Rx */

#define	HP100_REG_STAT_DROPPED 0x20 /* R (12) Dropped Packet Counter */

#define	HP100_REG_STAT_ERRORED 0x22 /* R (8) Errored Packet Counter */

#define	HP100_REG_STAT_ABORT 0x23 /* R (8) Abort Counter/OW Coll. Flag */

#define	HP100_REG_RX_RING 0x24 /* W (32) Slave: RX Ring Pointers */

#define	HP100_REG_32_FRAGMENT_LEN 0x28 /* W (13) Slave: Fragment Length Reg */

#define	HP100_REG_32_OFFSET 0x2c /* W (16) Slave: Offset Register */

#define	HP100_REG_MAC_ADDR 0x08 /* RW: (8) Cards MAC address */

#define	HP100_REG_HASH_BYTE0 0x10 /* RW: (8) Cards multicast filter */

#define	HP100_REG_MEM_MAP_LSW 0x08 /* RW: (16) LSW of cards mem addr */

#define	HP100_REG_MEM_MAP_MSW 0x0a /* RW: (16) MSW of cards mem addr */

#define	HP100_REG_IO_MAP 0x0c /* RW: (8) Cards I/O address */

#define	HP100_REG_IRQ_CHANNEL 0x0d /* RW: (8) IRQ and edge/level int */

#define	HP100_REG_SRAM 0x0e /* RW: (8) How much RAM on card */

#define	HP100_REG_BM 0x0f /* RW: (8) Controls BM functions */

#define	HP100_REG_MODECTRL1 0x10 /* RW: (8) Mode Control 1 */

#define	HP100_REG_MODECTRL2 0x11 /* RW: (8) Mode Control 2 */

#define	HP100_REG_PCICTRL1 0x12 /* RW: (8) PCI Cfg 1 */

#define	HP100_REG_PCICTRL2 0x13 /* RW: (8) PCI Cfg 2 */

#define	HP100_REG_PCIBUSMLAT 0x15 /* RW: (8) PCI Bus Master Latency */

#define	HP100_REG_EARLYTXCFG 0x16 /* RW: (16) Early TX Cfg/Cntrl Reg */

#define	HP100_REG_EARLYRXCFG 0x18 /* RW: (8) Early RX Cfg/Cntrl Reg */

#define	HP100_REG_ISAPNPCFG1 0x1a /* RW: (8) ISA PnP Cfg/Cntrl Reg 1 */

#define	HP100_REG_ISAPNPCFG2 0x1b /* RW: (8) ISA PnP Cfg/Cntrl Reg 2 */

#define	HP100_REG_EEPROM_CTRL 0x08 /* RW: (16) Used to load EEPROM */

#define	HP100_REG_BOOTROM_CTRL 0x0a

#define	HP100_REG_10_LAN_CFG_1 0x08 /* RW: (8) Set 10M XCVR functions */

#define	HP100_REG_10_LAN_CFG_2 0x09 /* RW: (8) 10M XCVR functions */

#define	HP100_REG_VG_LAN_CFG_1 0x0a /* RW: (8) Set 100M XCVR functions */

#define	HP100_REG_VG_LAN_CFG_2 0x0b /* RW: (8) 100M LAN Training cfgregs */

#define	HP100_REG_MAC_CFG_1 0x0c /* RW: (8) Types of pkts to accept */

#define	HP100_REG_MAC_CFG_2 0x0d /* RW: (8) Misc MAC functions */

#define	HP100_REG_MAC_CFG_3 0x0e /* RW: (8) Misc MAC functions */

#define	HP100_REG_MAC_CFG_4 0x0f /* R: (8) Misc MAC states */

#define	HP100_REG_DROPPED 0x10 /* R: (16),11:0 Pkts can't fit in mem */

#define	HP100_REG_CRC 0x12 /* R: (8) Pkts with CRC */

#define	HP100_REG_ABORT 0x13 /* R: (8) Aborted Tx pkts */

#define	HP100_REG_TRAIN_REQUEST 0x14 /* RW: (16) Endnode MAC register. */

#define	HP100_REG_TRAIN_ALLOW 0x16 /* R: (16) Hub allowed register */

#define	HP100_REG_RX_MEM_STOP 0x0c /* RW: (16) End of Rx ring addr */

#define	HP100_REG_TX_MEM_STOP 0x0e /* RW: (16) End of Tx ring addr */

#define	HP100_REG_PDL_MEM_STOP 0x10 /* Not used by 802.12 devices */

#define	HP100_REG_ECB_MEM_STOP 0x14 /* I've no idea what this is */

#define	HP100_REG_BOARD_ID 0x08 /* R: (8) EISA/ISA card ID */

#define	HP100_REG_BOARD_IO_CHCK 0x0c /* R: (8) Added to ID to get FFh */

#define	HP100_REG_SOFT_MODEL 0x0d /* R: (8) Config program defined */

#define	HP100_REG_LAN_ADDR 0x10 /* R: (8) MAC addr of card */

#define	HP100_REG_LAN_ADDR_CHCK 0x16 /* R: (8) Added to addr to get FFh */

#define	HP100_REG_PTR_RXSTART 0x08 /* R: (16) Current begin of Rx ring */

#define	HP100_REG_PTR_RXEND 0x0a /* R: (16) Current end of Rx ring */

#define	HP100_REG_PTR_TXSTART 0x0c /* R: (16) Current begin of Tx ring */

#define	HP100_REG_PTR_TXEND 0x0e /* R: (16) Current end of Rx ring */

#define	HP100_REG_PTR_RPDLSTART 0x10

#define	HP100_REG_PTR_RPDLEND 0x12

#define	HP100_REG_PTR_RINGPTRS 0x14

#define	HP100_REG_PTR_MEMDEBUG 0x1a

#define	HP100_HW_ID_CASCADE 0x4850 /* Identifies Cascade Chip */

#define	HP100_CHIPID_MASK 0xFFF0

#define	HP100_CHIPID_SHASTA 0x5350 /* Not 802.12 compliant */

#define	HP100_CHIPID_RAINIER 0x5360 /* Not 802.12 compliant EISA BM, */

#define	HP100_CHIPID_LASSEN 0x5370 /* 802.12 compliant PCI BM, PCI SL */

#define	HP100_DEBUG_EN 0x8000 /* 0:Dis., 1:Enable Debug Dump Ptr. */

#define	HP100_RX_HDR 0x4000 /* 0:Dis., 1:Enable putting pkt into */

#define	HP100_MMAP_DIS 0x2000 /* 0:Enable, 1:Disable mem.mapping. */

#define	HP100_EE_EN 0x1000 /* 0:Disable,1:Enable EEPROM writing */

#define	HP100_BM_WRITE 0x0800 /* 0:Slave, 1:Bus Master for Tx data */

#define	HP100_BM_READ 0x0400 /* 0:Slave, 1:Bus Master for Rx data */

#define	HP100_TRI_INT 0x0200 /* 0:Don't, 1:Do tri-state the int */

#define	HP100_MEM_EN 0x0040 /* Config program set this to */

#define	HP100_IO_EN 0x0020 /* 1:Enable I/O transfers */

#define	HP100_BOOT_EN 0x0010 /* 1:Enable boot ROM access */

#define	HP100_FAKE_INT 0x0008 /* 1:int */

#define	HP100_INT_EN 0x0004 /* 1:Enable ints from card */

#define	HP100_HW_RST 0x0002 /* 0:Reset, 1:Out of reset */

#define	HP100_PRIORITY_TX 0x0080 /* 1:Do all Tx pkts as priority */

#define	HP100_EE_LOAD 0x0040 /* 1:EEPROM loading, 0 when done */

#define	HP100_ADV_NXT_PKT 0x0004 /* 1:Advance to next pkt in Rx queue */

#define	HP100_TX_CMD 0x0002 /* 1:Tell h/w download done, h/w */

#define	HP100_RX_EARLY_INT 0x2000

#define	HP100_RX_PDA_ZERO 0x1000

#define	HP100_RX_PDL_FILL_COMPL 0x0800

#define	HP100_RX_PACKET 0x0400 /* 0:No, 1:Yes pkt has been Rx */

#define	HP100_RX_ERROR 0x0200 /* 0:No, 1:Yes Rx pkt had error */

#define	HP100_TX_PDA_ZERO 0x0020 /* 1 when PDA count goes to zero */

#define	HP100_TX_SPACE_AVAIL 0x0010 /* 0:<8192, 1:>=8192 Tx free bytes */

#define	HP100_TX_COMPLETE 0x0008 /* 0:No, 1:Yes a Tx has completed */

#define	HP100_MISC_ERROR 0x0004 /* 0:No, 1:Lan Link down or bus error */

#define	HP100_TX_ERROR 0x0002 /* 0:No, 1:Yes Tx pkt had error */

#define	HP100_AUTO_COMPARE 0x80000000 /* Tx Space avail & pkts<255 */

#define	HP100_FREE_SPACE 0x7fffffe0 /* Tx free memory */

#define	HP100_ZERO_WAIT_EN 0x80 /* 0:No, 1:Yes asserts NOWS signal */

#define	HP100_IRQ_SCRAMBLE 0x40

#define	HP100_BOND_HP 0x20

#define	HP100_LEVEL_IRQ 0x10 /* 0:Edge, 1:Level type interrupts. */

#define	HP100_IRQMASK 0x0F /* Isolate the IRQ bits */

#define	HP100_RAM_SIZE_MASK 0xe0 /* AND to get SRAM size index */

#define	HP100_RAM_SIZE_SHIFT 0x05 /* Shift count(put index in lwr bits) */

#define	HP100_BM_BURST_RD 0x01 /* EISA only: 1=Use burst trans. fm system */

#define	HP100_BM_BURST_WR 0x02 /* EISA only: 1=Use burst trans. fm system */

#define	HP100_BM_MASTER 0x04 /* 0:Slave, 1:BM mode */

#define	HP100_BM_PAGE_CK 0x08 /* This bit should be set whenever in */

#define	HP100_BM_PCI_8CLK 0x40 /* ... cycles 8 clocks apart */

#define	HP100_TX_DUALQ 0x10

#define	HP100_ISR_CLRMODE 0x02 /* If set ISR will clear all pending */

#define	HP100_EE_NOLOAD 0x04 /* Status whether res will be loaded */

#define	HP100_TX_CNT_FLG 0x08 /* Controls Early TX Reg Cnt Field */

#define	HP100_PDL_USE3 0x10 /* If set BM engine will read only */

#define	HP100_BUSTYPE_MASK 0xe0 /* Three bit bus type info */

#define	HP100_EE_MASK 0x0f /* Tell EEPROM circuit not to load */

#define	HP100_DIS_CANCEL 0x20 /* For tx dualq mode operation */

#define	HP100_EN_PDL_WB 0x40 /* 1: Status of PDL completion may be */

#define	HP100_EN_BUS_FAIL 0x80 /* Enables bus-fail portion of misc */

#define	HP100_LO_MEM 0x01 /* 1: Mapped Mem requested below 1MB */

#define	HP100_NO_MEM 0x02 /* 1: Disables Req for sysmem to PCI */

#define	HP100_USE_ISA 0x04 /* 1: isa type decodes will occur */

#define	HP100_IRQ_HI_MASK 0xf0 /* pgmed by pci bios */

#define	HP100_PCI_IRQ_HI_MASK 0x78 /* Isolate 4 bits for PCI IRQ */

#define	HP100_RD_LINE_PDL 0x01 /* 1: PCI command Memory Read Line en */

#define	HP100_RD_TX_DATA_MASK 0x06 /* choose PCI memread cmds for TX */

#define	HP100_MWI 0x08 /* 1: en. PCI memory write invalidate */

#define	HP100_ARB_MODE 0x10 /* Select PCI arbitor type */

#define	HP100_STOP_EN 0x20 /* Enables PCI state machine to issue */

#define	HP100_IGNORE_PAR 0x40 /* 1: PCI state machine ignores parity */

#define	HP100_PCI_RESET 0x80 /* 0->1: Reset PCI block */

#define	HP100_EN_EARLY_TX 0x8000 /* 1=Enable Early TX */

#define	HP100_EN_ADAPTIVE 0x4000 /* 1=Enable adaptive mode */

#define	HP100_EN_TX_UR_IRQ 0x2000 /* reserved, must be 0 */

#define	HP100_EN_LOW_TX 0x1000 /* reserved, must be 0 */

#define	HP100_ET_CNT_MASK 0x0fff /* bits 11..0: ET counters */

#define	HP100_EN_EARLY_RX 0x80 /* 1=Enable Early RX */

#define	HP100_EN_LOW_RX 0x40 /* reserved, must be 0 */

#define	HP100_RX_TRIP_MASK

#define	HP100_EEPROM_LOAD 0x0001 /* 0->1 loads EEPROM into registers. */

#define	HP100_MAC10_SEL 0xc0 /* Get bits to indicate MAC */

#define	HP100_AUI_SEL 0x20 /* Status of AUI selection */

#define	HP100_LOW_TH 0x10 /* 0:No, 1:Yes allow better cabling */

#define	HP100_LINK_BEAT_DIS 0x08 /* 0:Enable, 1:Disable link beat */

#define	HP100_LINK_BEAT_ST 0x04 /* 0:No, 1:Yes link beat being Rx */

#define	HP100_R_ROL_ST 0x02 /* 0:No, 1:Yes Rx twisted pair has */

#define	HP100_AUI_ST 0x01 /* 0:No, 1:Yes use AUI on TP card */

#define	HP100_SQU_ST 0x01 /* 0:No, 1:Yes collision signal sent */

#define	HP100_FULLDUP 0x02 /* 1: LXT901 XCVR fullduplx enabled */

#define	HP100_DOT3_MAC 0x04 /* 1: DOT 3 Mac sel. unless Autosel */

#define	HP100_AUTO_SEL_10 0x0 /* Auto select */

#define	HP100_XCVR_LXT901_10 0x1 /* LXT901 10BaseT transceiver */

#define	HP100_XCVR_7213 0x2 /* 7213 transceiver */

#define	HP100_XCVR_82503 0x3 /* 82503 transceiver */

#define	HP100_FRAME_FORMAT 0x08 /* 0:802.3, 1:802.5 frames */

#define	HP100_BRIDGE 0x04 /* 0:No, 1:Yes tell hub i am a bridge */

#define	HP100_PROM_MODE 0x02 /* 0:No, 1:Yes tell hub card is */

#define	HP100_REPEATER 0x01 /* 0:No, 1:Yes tell hub MAC wants to */

#define	HP100_VG_SEL 0x80 /* 0:No, 1:Yes use 100 Mbit MAC */

#define	HP100_LINK_UP_ST 0x40 /* 0:No, 1:Yes endnode logged in */

#define	HP100_LINK_CABLE_ST 0x20 /* 0:No, 1:Yes cable can hear tones */

#define	HP100_LOAD_ADDR 0x10 /* 0->1 card addr will be sent */

#define	HP100_LINK_CMD 0x08 /* 0->1 link will attempt to log in. */

#define	HP100_TRN_DONE 0x04 /* NEW ETR-Chips only: Will be reset */

#define	HP100_LINK_GOOD_ST 0x02 /* 0:No, 1:Yes cable passed training */

#define	HP100_VG_RESET 0x01 /* 0:Yes, 1:No reset the 100VG MAC */

#define	HP100_RX_IDLE 0x80 /* 0:Yes, 1:No currently receiving pkts */

#define	HP100_TX_IDLE 0x40 /* 0:Yes, 1:No currently Txing pkts */

#define	HP100_RX_EN 0x20 /* 1: allow receiving of pkts */

#define	HP100_TX_EN 0x10 /* 1: allow transmitting of pkts */

#define	HP100_ACC_ERRORED 0x08 /* 0:No, 1:Yes allow Rx of errored pkts */

#define	HP100_ACC_MC 0x04 /* 0:No, 1:Yes allow Rx of multicast pkts */

#define	HP100_ACC_BC 0x02 /* 0:No, 1:Yes allow Rx of broadcast pkts */

#define	HP100_ACC_PHY 0x01 /* 0:No, 1:Yes allow Rx of ALL phys. pkts */

#define	HP100_MAC1MODEMASK 0xf0 /* Hide ACC bits */

#define	HP100_MAC1MODE1 0x00 /* Receive nothing, must also disable RX */

#define	HP100_MAC1MODE2 0x00

#define	HP100_MAC1MODE3 HP100_MAC1MODE2 \| HP100_ACC_BC

#define	HP100_MAC1MODE4 HP100_MAC1MODE3 \| HP100_ACC_MC

#define	HP100_MAC1MODE5 HP100_MAC1MODE4 /* set mc hash to all ones also */

#define	HP100_MAC1MODE6 HP100_MAC1MODE5 \| HP100_ACC_PHY /* Promiscuous */

#define	HP100_MAC1MODE7 HP100_MAC1MODE6 \| HP100_ACC_ERRORED

#define	HP100_TR_MODE 0x80 /* 0:No, 1:Yes support Token Ring formats */

#define	HP100_TX_SAME 0x40 /* 0:No, 1:Yes Tx same packet continuous */

#define	HP100_LBK_XCVR 0x20 /* 0:No, 1:Yes loopback through MAC & */

#define	HP100_LBK_MAC 0x10 /* 0:No, 1:Yes loopback through MAC */

#define	HP100_CRC_I 0x08 /* 0:No, 1:Yes inhibit CRC on Tx packets */

#define	HP100_ACCNA

#define	HP100_KEEP_CRC 0x02 /* 0:No, 1:Yes keep CRC on Rx packets. */

#define	HP100_ACCFA

#define	HP100_MAC2MODEMASK 0x02

#define	HP100_MAC2MODE1 0x00

#define	HP100_MAC2MODE2 0x00

#define	HP100_MAC2MODE3 0x00

#define	HP100_MAC2MODE4 0x00

#define	HP100_MAC2MODE5 0x00

#define	HP100_MAC2MODE6 0x00

#define	HP100_MAC2MODE7 KEEP_CRC

#define	HP100_PACKET_PACE

#define	HP100_LRF_EN

#define	HP100_AUTO_MODE 0x10 /* 1: AutoSelect between 10/100 */

#define	HP100_MAC_SEL_ST

#define	HP100_LINK_FAIL_ST

#define	HP100_MACRQ_REPEATER

#define	HP100_MACRQ_PROMSC

#define	HP100_MACRQ_FRAMEFMT_EITHER 0x0018 /* 11: either format allowed */

#define	HP100_MACRQ_FRAMEFMT_802_3 0x0000 /* 00: 802.3 is requested */

#define	HP100_MACRQ_FRAMEFMT_802_5 0x0010 /* 10: 802.5 format is requested */

#define	HP100_CARD_MACVER 0xe000 /* R: 3 bit Cards 100VG MAC version */

#define	HP100_MALLOW_REPEATER

#define	HP100_MALLOW_PROMSC

#define	HP100_MALLOW_FRAMEFMT

#define	HP100_MALLOW_ACCDENIED 0x0400 /* N bit */

#define	HP100_MALLOW_CONFIGURE 0x0f00 /* C bit */

#define	HP100_MALLOW_DUPADDR 0x1000 /* D bit */

#define	HP100_HUB_MACVER 0xe000 /* R: 3 bit 802.12 MAC/RMAC training */

#define	HP100_SET_HB 0x0100 /* 0:Set fields to 0 whose mask is 1 */

#define	HP100_SET_LB 0x0001 /* HB sets upper byte, LB sets lower byte */

#define	HP100_RESET_HB 0x0000 /* For readability when resetting bits */

#define	HP100_RESET_LB 0x0000 /* For readability when resetting bits */

#define	HP100_LAN_100 100 /* lan_type value for VG */

#define	HP100_LAN_10 10 /* lan_type value for 10BaseT */

#define	HP100_LAN_COAX 9 /* lan_type value for Coax */

#define	HP100_LAN_ERR (-1) /* lan_type value for link down */

#define	MAX_RX_PDL 30 /* Card limit = 31 */

#define	MAX_RX_FRAG 2 /* Don't need more... */

#define	MAX_TX_PDL 29

#define	MAX_TX_FRAG 2 /* Limit = 31 */

#define	MAX_RINGSIZE ((MAX_RX_FRAG8+4+4)MAX_RX_PDL+(MAX_TX_FRAG8+4+4)MAX_TX_PDL)+16

#define	MIN_ETHER_SIZE 60

#define	MAX_ETHER_SIZE 1514 /* Needed for preallocation of */

#define	HP100_PKT_LEN_MASK 0x1FFF /* AND with RxLength to get length */

#define	HP100_RX_PRI 0x8000 /* 0:No, 1:Yes packet is priority */

#define	HP100_SDF_ERR 0x4000 /* 0:No, 1:Yes start of frame error */

#define	HP100_SKEW_ERR 0x2000 /* 0:No, 1:Yes skew out of range */

#define	HP100_BAD_SYMBOL_ERR 0x1000 /* 0:No, 1:Yes invalid symbol received */

#define	HP100_RCV_IPM_ERR 0x0800 /* 0:No, 1:Yes pkt had an invalid packet */

#define	HP100_SYMBOL_BAL_ERR 0x0400 /* 0:No, 1:Yes symbol balance error */

#define	HP100_VG_ALN_ERR 0x0200 /* 0:No, 1:Yes non-octet received */

#define	HP100_TRUNC_ERR 0x0100 /* 0:No, 1:Yes the packet was truncated */

#define	HP100_RUNT_ERR 0x0040 /* 0:No, 1:Yes pkt length < Min Pkt */

#define	HP100_ALN_ERR 0x0010 /* 0:No, 1:Yes align error. */

#define	HP100_CRC_ERR 0x0008 /* 0:No, 1:Yes CRC occurred. */

#define	HP100_MULTI_ADDR_HASH 0x0006 /* 110: Addr multicast, matched hash */

#define	HP100_BROADCAST_ADDR 0x0003 /* x11: Addr broadcast */

#define	HP100_MULTI_ADDR_NO_HASH 0x0002 /* 010: Addr multicast, didn't match hash */

#define	HP100_PHYS_ADDR_MATCH 0x0001 /* x01: Addr was physical and mine */

#define	HP100_PHYS_ADDR_NO_MATCH 0x0000 /* x00: Addr was physical but not mine */

#define	hp100_inb(reg) inb( ioaddr + HP100_REG_##reg )

#define	hp100_inw(reg) inw( ioaddr + HP100_REG_##reg )

#define	hp100_inl(reg) inl( ioaddr + HP100_REG_##reg )

#define	hp100_outb(data, reg) outb( data, ioaddr + HP100_REG_##reg )

#define	hp100_outw(data, reg) outw( data, ioaddr + HP100_REG_##reg )

#define	hp100_outl(data, reg) outl( data, ioaddr + HP100_REG_##reg )

#define	hp100_orb(data, reg) outb( inb( ioaddr + HP100_REG_##reg ) \| (data), ioaddr + HP100_REG_##reg )

#define	hp100_orw(data, reg) outw( inw( ioaddr + HP100_REG_##reg ) \| (data), ioaddr + HP100_REG_##reg )

#define	hp100_andb(data, reg) outb( inb( ioaddr + HP100_REG_##reg ) & (data), ioaddr + HP100_REG_##reg )

#define	hp100_andw(data, reg) outw( inw( ioaddr + HP100_REG_##reg ) & (data), ioaddr + HP100_REG_##reg )

#define	hp100_page(page) outw( HP100_PAGE_##page, ioaddr + HP100_REG_PAGING )

#define	hp100_ints_off() outw( HP100_INT_EN \| HP100_RESET_LB, ioaddr + HP100_REG_OPTION_LSW )

#define	hp100_ints_on() outw( HP100_INT_EN \| HP100_SET_LB, ioaddr + HP100_REG_OPTION_LSW )

#define	hp100_mem_map_enable() outw( HP100_MMAP_DIS \| HP100_RESET_HB, ioaddr + HP100_REG_OPTION_LSW )

#define	hp100_mem_map_disable() outw( HP100_MMAP_DIS \| HP100_SET_HB, ioaddr + HP100_REG_OPTION_LSW )

Typedefs
typedef struct hp100_ring	hp100_ring_t

Macro Definition Documentation

#define HP100_ACC_BC 0x02 /* 0:No, 1:Yes allow Rx of broadcast pkts */

Definition at line 407 of file hp100.h.

#define HP100_ACC_ERRORED 0x08 /* 0:No, 1:Yes allow Rx of errored pkts */

Definition at line 405 of file hp100.h.

#define HP100_ACC_MC 0x04 /* 0:No, 1:Yes allow Rx of multicast pkts */

Definition at line 406 of file hp100.h.

#define HP100_ACC_PHY 0x01 /* 0:No, 1:Yes allow Rx of ALL phys. pkts */

Definition at line 408 of file hp100.h.

#define HP100_ACCFA

Value:

0x01 /* 1: For 802.5: Accept only functional

* addrs that match FA mask (page1) */

Definition at line 434 of file hp100.h.

#define HP100_ACCNA

Value:

0x04 /* 1: For 802.5: Accept only token ring

* group addr that maches NA mask */

Definition at line 431 of file hp100.h.

#define HP100_ADV_NXT_PKT 0x0004 /* 1:Advance to next pkt in Rx queue */

Definition at line 195 of file hp100.h.

#define HP100_ALN_ERR 0x0010 /* 0:No, 1:Yes align error. */

Definition at line 542 of file hp100.h.

#define hp100_andb	(	data,
		reg
	)	outb( inb( ioaddr + HP100_REG_##reg ) & (data), ioaddr + HP100_REG_##reg )

Definition at line 573 of file hp100.h.

#define hp100_andw	(	data,
		reg
	)	outw( inw( ioaddr + HP100_REG_##reg ) & (data), ioaddr + HP100_REG_##reg )

Definition at line 575 of file hp100.h.

#define HP100_ARB_MODE 0x10 /* Select PCI arbitor type */

Definition at line 303 of file hp100.h.

#define HP100_AUI_SEL 0x20 /* Status of AUI selection */

Definition at line 340 of file hp100.h.

#define HP100_AUI_ST 0x01 /* 0:No, 1:Yes use AUI on TP card */

Definition at line 346 of file hp100.h.

#define HP100_AUTO_COMPARE 0x80000000 /* Tx Space avail & pkts<255 */

Definition at line 221 of file hp100.h.

#define HP100_AUTO_MODE 0x10 /* 1: AutoSelect between 10/100 */

Definition at line 450 of file hp100.h.

#define HP100_AUTO_SEL_10 0x0 /* Auto select */

Definition at line 360 of file hp100.h.

#define HP100_BAD_SYMBOL_ERR 0x1000 /* 0:No, 1:Yes invalid symbol received */

Definition at line 534 of file hp100.h.

#define HP100_BM_BURST_RD 0x01 /* EISA only: 1=Use burst trans. fm system */

Definition at line 246 of file hp100.h.

#define HP100_BM_BURST_WR 0x02 /* EISA only: 1=Use burst trans. fm system */

Definition at line 248 of file hp100.h.

#define HP100_BM_MASTER 0x04 /* 0:Slave, 1:BM mode */

Definition at line 250 of file hp100.h.

#define HP100_BM_PAGE_CK 0x08 /* This bit should be set whenever in */

Definition at line 251 of file hp100.h.

#define HP100_BM_PCI_8CLK 0x40 /* ... cycles 8 clocks apart */

Definition at line 253 of file hp100.h.

#define HP100_BM_READ 0x0400 /* 0:Slave, 1:Bus Master for Rx data */

Definition at line 177 of file hp100.h.

#define HP100_BM_WRITE 0x0800 /* 0:Slave, 1:Bus Master for Tx data */

Definition at line 176 of file hp100.h.

#define HP100_BOND_HP 0x20

Definition at line 230 of file hp100.h.

#define HP100_BOOT_EN 0x0010 /* 1:Enable boot ROM access */

Definition at line 183 of file hp100.h.

#define HP100_BRIDGE 0x04 /* 0:No, 1:Yes tell hub i am a bridge */

Definition at line 370 of file hp100.h.

#define HP100_BROADCAST_ADDR 0x0003 /* x11: Addr broadcast */

Definition at line 548 of file hp100.h.

#define HP100_BUSTYPE_MASK 0xe0 /* Three bit bus type info */

Definition at line 270 of file hp100.h.

#define HP100_CARD_MACVER 0xe000 /* R: 3 bit Cards 100VG MAC version */

Definition at line 468 of file hp100.h.

#define HP100_CHIPID_LASSEN 0x5370 /* 802.12 compliant PCI BM, PCI SL */

Definition at line 161 of file hp100.h.

#define HP100_CHIPID_MASK 0xFFF0

Definition at line 156 of file hp100.h.

#define HP100_CHIPID_RAINIER 0x5360 /* Not 802.12 compliant EISA BM, */

Definition at line 159 of file hp100.h.

#define HP100_CHIPID_SHASTA 0x5350 /* Not 802.12 compliant */

Definition at line 157 of file hp100.h.

#define HP100_CRC_ERR 0x0008 /* 0:No, 1:Yes CRC occurred. */

Definition at line 543 of file hp100.h.

#define HP100_CRC_I 0x08 /* 0:No, 1:Yes inhibit CRC on Tx packets */

Definition at line 430 of file hp100.h.

#define HP100_DEBUG_EN 0x8000 /* 0:Dis., 1:Enable Debug Dump Ptr. */

Definition at line 168 of file hp100.h.

#define HP100_DIS_CANCEL 0x20 /* For tx dualq mode operation */

Definition at line 278 of file hp100.h.

#define HP100_DOT3_MAC 0x04 /* 1: DOT 3 Mac sel. unless Autosel */

Definition at line 355 of file hp100.h.

#define HP100_EE_EN 0x1000 /* 0:Disable,1:Enable EEPROM writing */

Definition at line 175 of file hp100.h.

#define HP100_EE_LOAD 0x0040 /* 1:EEPROM loading, 0 when done */

Definition at line 194 of file hp100.h.

#define HP100_EE_MASK 0x0f /* Tell EEPROM circuit not to load */

Definition at line 276 of file hp100.h.

#define HP100_EE_NOLOAD 0x04 /* Status whether res will be loaded */

Definition at line 264 of file hp100.h.

#define HP100_EEPROM_LOAD 0x0001 /* 0->1 loads EEPROM into registers. */

Definition at line 331 of file hp100.h.

#define HP100_EN_ADAPTIVE 0x4000 /* 1=Enable adaptive mode */

Definition at line 314 of file hp100.h.

#define HP100_EN_BUS_FAIL 0x80 /* Enables bus-fail portion of misc */

Definition at line 281 of file hp100.h.

#define HP100_EN_EARLY_RX 0x80 /* 1=Enable Early RX */

Definition at line 323 of file hp100.h.

#define HP100_EN_EARLY_TX 0x8000 /* 1=Enable Early TX */

Definition at line 313 of file hp100.h.

#define HP100_EN_LOW_RX 0x40 /* reserved, must be 0 */

Definition at line 324 of file hp100.h.

#define HP100_EN_LOW_TX 0x1000 /* reserved, must be 0 */

Definition at line 316 of file hp100.h.

#define HP100_EN_PDL_WB 0x40 /* 1: Status of PDL completion may be */

Definition at line 279 of file hp100.h.

#define HP100_EN_TX_UR_IRQ 0x2000 /* reserved, must be 0 */

Definition at line 315 of file hp100.h.

#define HP100_ET_CNT_MASK 0x0fff /* bits 11..0: ET counters */

Definition at line 317 of file hp100.h.

#define HP100_FAKE_INT 0x0008 /* 1:int */

Definition at line 184 of file hp100.h.

#define HP100_FRAME_FORMAT 0x08 /* 0:802.3, 1:802.5 frames */

Definition at line 369 of file hp100.h.

#define HP100_FREE_SPACE 0x7fffffe0 /* Tx free memory */

Definition at line 222 of file hp100.h.

#define HP100_FULLDUP 0x02 /* 1: LXT901 XCVR fullduplx enabled */

Definition at line 354 of file hp100.h.

#define HP100_HUB_MACVER 0xe000 /* R: 3 bit 802.12 MAC/RMAC training */

Definition at line 475 of file hp100.h.

#define HP100_HW_ID_CASCADE 0x4850 /* Identifies Cascade Chip */

Definition at line 149 of file hp100.h.

#define HP100_HW_RST 0x0002 /* 0:Reset, 1:Out of reset */

Definition at line 186 of file hp100.h.

#define HP100_IGNORE_PAR 0x40 /* 1: PCI state machine ignores parity */

Definition at line 306 of file hp100.h.

#define hp100_inb ( reg ) inb( ioaddr + HP100_REG_##reg )

Definition at line 557 of file hp100.h.

#define hp100_inl ( reg ) inl( ioaddr + HP100_REG_##reg )

Definition at line 561 of file hp100.h.

#define HP100_INT_EN 0x0004 /* 1:Enable ints from card */

Definition at line 185 of file hp100.h.

#define hp100_ints_off ( ) outw( HP100_INT_EN | HP100_RESET_LB, ioaddr + HP100_REG_OPTION_LSW )

Definition at line 580 of file hp100.h.

#define hp100_ints_on ( ) outw( HP100_INT_EN | HP100_SET_LB, ioaddr + HP100_REG_OPTION_LSW )

Definition at line 582 of file hp100.h.

#define hp100_inw ( reg ) inw( ioaddr + HP100_REG_##reg )

Definition at line 559 of file hp100.h.

#define HP100_IO_EN 0x0020 /* 1:Enable I/O transfers */

Definition at line 182 of file hp100.h.

#define HP100_IRQ_HI_MASK 0xf0 /* pgmed by pci bios */

Definition at line 293 of file hp100.h.

#define HP100_IRQ_SCRAMBLE 0x40

Definition at line 229 of file hp100.h.

#define HP100_IRQMASK 0x0F /* Isolate the IRQ bits */

Definition at line 233 of file hp100.h.

#define HP100_ISR_CLRMODE 0x02 /* If set ISR will clear all pending */

Definition at line 262 of file hp100.h.

#define HP100_KEEP_CRC 0x02 /* 0:No, 1:Yes keep CRC on Rx packets. */

Definition at line 432 of file hp100.h.

#define HP100_LAN_10 10 /* lan_type value for 10BaseT */

Definition at line 492 of file hp100.h.

#define HP100_LAN_100 100 /* lan_type value for VG */

Definition at line 491 of file hp100.h.

#define HP100_LAN_COAX 9 /* lan_type value for Coax */

Definition at line 493 of file hp100.h.

#define HP100_LAN_ERR (-1) /* lan_type value for link down */

Definition at line 494 of file hp100.h.

#define HP100_LBK_MAC 0x10 /* 0:No, 1:Yes loopback through MAC */

Definition at line 429 of file hp100.h.

#define HP100_LBK_XCVR 0x20 /* 0:No, 1:Yes loopback through MAC & */

Definition at line 427 of file hp100.h.

#define HP100_LEVEL_IRQ 0x10 /* 0:Edge, 1:Level type interrupts. */

Definition at line 231 of file hp100.h.

#define HP100_LINK_BEAT_DIS 0x08 /* 0:Enable, 1:Disable link beat */

Definition at line 342 of file hp100.h.

#define HP100_LINK_BEAT_ST 0x04 /* 0:No, 1:Yes link beat being Rx */

Definition at line 343 of file hp100.h.

#define HP100_LINK_CABLE_ST 0x20 /* 0:No, 1:Yes cable can hear tones */

Definition at line 382 of file hp100.h.

#define HP100_LINK_CMD 0x08 /* 0->1 link will attempt to log in. */

Definition at line 387 of file hp100.h.

#define HP100_LINK_FAIL_ST

Value:

0x02 /* (R): Status of Link Fail portion

* of the Misc. Interrupt */

Definition at line 457 of file hp100.h.

#define HP100_LINK_GOOD_ST 0x02 /* 0:No, 1:Yes cable passed training */

Definition at line 393 of file hp100.h.

#define HP100_LINK_UP_ST 0x40 /* 0:No, 1:Yes endnode logged in */

Definition at line 381 of file hp100.h.

#define HP100_LO_MEM 0x01 /* 1: Mapped Mem requested below 1MB */

Definition at line 288 of file hp100.h.

#define HP100_LOAD_ADDR 0x10 /* 0->1 card addr will be sent */

Definition at line 384 of file hp100.h.

#define HP100_LOW_TH 0x10 /* 0:No, 1:Yes allow better cabling */

Definition at line 341 of file hp100.h.

#define HP100_LRF_EN

Value:

0x04 /* 1: External LAN Rcv Filter and

* TCP/IP Checksumming enabled. */

Definition at line 449 of file hp100.h.

#define HP100_MAC10_SEL 0xc0 /* Get bits to indicate MAC */

Definition at line 339 of file hp100.h.

#define HP100_MAC1MODE1 0x00 /* Receive nothing, must also disable RX */

Definition at line 410 of file hp100.h.

#define HP100_MAC1MODE2 0x00

Definition at line 411 of file hp100.h.

#define HP100_MAC1MODE3 HP100_MAC1MODE2 | HP100_ACC_BC

Definition at line 412 of file hp100.h.

#define HP100_MAC1MODE4 HP100_MAC1MODE3 | HP100_ACC_MC

Definition at line 413 of file hp100.h.

#define HP100_MAC1MODE5 HP100_MAC1MODE4 /* set mc hash to all ones also */

Definition at line 414 of file hp100.h.

#define HP100_MAC1MODE6 HP100_MAC1MODE5 | HP100_ACC_PHY /* Promiscuous */

Definition at line 415 of file hp100.h.

#define HP100_MAC1MODE7 HP100_MAC1MODE6 | HP100_ACC_ERRORED

Definition at line 419 of file hp100.h.

#define HP100_MAC1MODEMASK 0xf0 /* Hide ACC bits */

Definition at line 409 of file hp100.h.

#define HP100_MAC2MODE1 0x00

Definition at line 436 of file hp100.h.

#define HP100_MAC2MODE2 0x00

Definition at line 437 of file hp100.h.

#define HP100_MAC2MODE3 0x00

Definition at line 438 of file hp100.h.

#define HP100_MAC2MODE4 0x00

Definition at line 439 of file hp100.h.

#define HP100_MAC2MODE5 0x00

Definition at line 440 of file hp100.h.

#define HP100_MAC2MODE6 0x00

Definition at line 441 of file hp100.h.

#define HP100_MAC2MODE7 KEEP_CRC

Definition at line 442 of file hp100.h.

#define HP100_MAC2MODEMASK 0x02

Definition at line 435 of file hp100.h.

#define HP100_MAC_SEL_ST

Value:

0x01 /* (R): Status of external VGSEL

* Signal, 1=100VG, 0=10Mbit sel. */

Definition at line 456 of file hp100.h.

#define HP100_MACRQ_FRAMEFMT_802_3 0x0000 /* 00: 802.3 is requested */

Definition at line 466 of file hp100.h.

#define HP100_MACRQ_FRAMEFMT_802_5 0x0010 /* 10: 802.5 format is requested */

Definition at line 467 of file hp100.h.

#define HP100_MACRQ_FRAMEFMT_EITHER 0x0018 /* 11: either format allowed */

Definition at line 465 of file hp100.h.

#define HP100_MACRQ_PROMSC

Value:

0x0006  /* 2 bits: Promiscious mode
                         * 00: Rcv only unicast packets
                         *     specifically addr to this
                         *     endnode
                         * 10: Rcv all pckts fwded by
                         *     the local repeater */

Definition at line 464 of file hp100.h.

#define HP100_MACRQ_REPEATER

Value:

0x0001  /* 1: MAC tells HUB it wants to be
                         *    a cascaded repeater
                         * 0: ... wants to be a DTE */

Definition at line 463 of file hp100.h.

#define HP100_MALLOW_ACCDENIED 0x0400 /* N bit */

Definition at line 472 of file hp100.h.

#define HP100_MALLOW_CONFIGURE 0x0f00 /* C bit */

Definition at line 473 of file hp100.h.

#define HP100_MALLOW_DUPADDR 0x1000 /* D bit */

Definition at line 474 of file hp100.h.

#define HP100_MALLOW_FRAMEFMT

Value:

0x00e0  /* 2 bits: Frame Format
                         * 00: 802.3 format will be used
                         * 10: 802.5 format will be used */

Definition at line 471 of file hp100.h.

#define HP100_MALLOW_PROMSC

Value:

0x0004  /* 2 bits: Promiscious mode
                         * 00: Rcv only unicast packets
                         *     specifically addr to this
                         *     endnode
                         * 10: Rcv all pckts fwded by
                         *     the local repeater */

Definition at line 470 of file hp100.h.

#define HP100_MALLOW_REPEATER

Value:

0x0001 /* If reset, requested access as an

* end node is allowed */

Definition at line 469 of file hp100.h.

#define HP100_MEM_EN 0x0040 /* Config program set this to */

Definition at line 179 of file hp100.h.

#define hp100_mem_map_disable ( ) outw( HP100_MMAP_DIS | HP100_SET_HB, ioaddr + HP100_REG_OPTION_LSW )

Definition at line 586 of file hp100.h.

#define hp100_mem_map_enable ( ) outw( HP100_MMAP_DIS | HP100_RESET_HB, ioaddr + HP100_REG_OPTION_LSW )

Definition at line 584 of file hp100.h.

#define HP100_MISC_ERROR 0x0004 /* 0:No, 1:Lan Link down or bus error */

Definition at line 214 of file hp100.h.

#define HP100_MMAP_DIS 0x2000 /* 0:Enable, 1:Disable mem.mapping. */

Definition at line 171 of file hp100.h.

#define HP100_MULTI_ADDR_HASH 0x0006 /* 110: Addr multicast, matched hash */

Definition at line 547 of file hp100.h.

#define HP100_MULTI_ADDR_NO_HASH 0x0002 /* 010: Addr multicast, didn't match hash */

Definition at line 549 of file hp100.h.

#define HP100_MWI 0x08 /* 1: en. PCI memory write invalidate */

Definition at line 302 of file hp100.h.

#define HP100_NO_MEM 0x02 /* 1: Disables Req for sysmem to PCI */

Definition at line 289 of file hp100.h.

#define hp100_orb	(	data,
		reg
	)	outb( inb( ioaddr + HP100_REG_##reg ) \| (data), ioaddr + HP100_REG_##reg )

Definition at line 569 of file hp100.h.

#define hp100_orw	(	data,
		reg
	)	outw( inw( ioaddr + HP100_REG_##reg ) \| (data), ioaddr + HP100_REG_##reg )

Definition at line 571 of file hp100.h.

#define hp100_outb	(	data,
		reg
	)	outb( data, ioaddr + HP100_REG_##reg )

Definition at line 563 of file hp100.h.

#define hp100_outl	(	data,
		reg
	)	outl( data, ioaddr + HP100_REG_##reg )

Definition at line 567 of file hp100.h.

#define hp100_outw	(	data,
		reg
	)	outw( data, ioaddr + HP100_REG_##reg )

Definition at line 565 of file hp100.h.

#define HP100_PACKET_PACE

Value:

0x03    /* Packet Pacing:
                     * 00: No packet pacing
                     * 01: 8 to 16 uS delay
                     * 10: 16 to 32 uS delay
                     * 11: 32 to 64 uS delay
                     */

Definition at line 448 of file hp100.h.

#define hp100_page ( page ) outw( HP100_PAGE_##page, ioaddr + HP100_REG_PAGING )

Definition at line 578 of file hp100.h.

#define HP100_PAGE_EEPROM_CTRL 0x3 /* Page 3 */

Definition at line 29 of file hp100.h.

#define HP100_PAGE_HW_MAP 0x2 /* Page 2 */

Definition at line 28 of file hp100.h.

#define HP100_PAGE_ID_MAC_ADDR 0x6 /* Page 6 */

Definition at line 32 of file hp100.h.

#define HP100_PAGE_MAC_ADDRESS 0x1 /* Page 1 */

Definition at line 27 of file hp100.h.

#define HP100_PAGE_MAC_CTRL 0x4 /* Page 4 */

Definition at line 30 of file hp100.h.

#define HP100_PAGE_MMU_CFG 0x5 /* Page 5 */

Definition at line 31 of file hp100.h.

#define HP100_PAGE_MMU_POINTER 0x7 /* Page 7 */

Definition at line 33 of file hp100.h.

#define HP100_PAGE_PERFORMANCE 0x0 /* Page 0 */

Definition at line 26 of file hp100.h.

#define HP100_PCI_IRQ_HI_MASK 0x78 /* Isolate 4 bits for PCI IRQ */

Definition at line 294 of file hp100.h.

#define HP100_PCI_RESET 0x80 /* 0->1: Reset PCI block */

Definition at line 307 of file hp100.h.

#define HP100_PDL_USE3 0x10 /* If set BM engine will read only */

Definition at line 267 of file hp100.h.

#define HP100_PHYS_ADDR_MATCH 0x0001 /* x01: Addr was physical and mine */

Definition at line 550 of file hp100.h.

#define HP100_PHYS_ADDR_NO_MATCH 0x0000 /* x00: Addr was physical but not mine */

Definition at line 551 of file hp100.h.

#define HP100_PKT_LEN_MASK 0x1FFF /* AND with RxLength to get length */

Definition at line 526 of file hp100.h.

#define HP100_PRIORITY_TX 0x0080 /* 1:Do all Tx pkts as priority */

Definition at line 193 of file hp100.h.

#define HP100_PROM_MODE 0x02 /* 0:No, 1:Yes tell hub card is */

Definition at line 371 of file hp100.h.

#define HP100_R_ROL_ST 0x02 /* 0:No, 1:Yes Rx twisted pair has */

Definition at line 344 of file hp100.h.

#define HP100_RAM_SIZE_MASK 0xe0 /* AND to get SRAM size index */

Definition at line 239 of file hp100.h.

#define HP100_RAM_SIZE_SHIFT 0x05 /* Shift count(put index in lwr bits) */

Definition at line 240 of file hp100.h.

#define HP100_RCV_IPM_ERR 0x0800 /* 0:No, 1:Yes pkt had an invalid packet */

Definition at line 535 of file hp100.h.

#define HP100_RD_LINE_PDL 0x01 /* 1: PCI command Memory Read Line en */

Definition at line 300 of file hp100.h.

#define HP100_RD_TX_DATA_MASK 0x06 /* choose PCI memread cmds for TX */

Definition at line 301 of file hp100.h.

#define HP100_REG_10_LAN_CFG_1 0x08 /* RW: (8) Set 10M XCVR functions */

Definition at line 104 of file hp100.h.

#define HP100_REG_10_LAN_CFG_2 0x09 /* RW: (8) 10M XCVR functions */

Definition at line 105 of file hp100.h.

#define HP100_REG_32_FRAGMENT_LEN 0x28 /* W (13) Slave: Fragment Length Reg */

Definition at line 69 of file hp100.h.

#define HP100_REG_32_OFFSET 0x2c /* W (16) Slave: Offset Register */

Definition at line 70 of file hp100.h.

#define HP100_REG_ABORT 0x13 /* R: (8) Aborted Tx pkts */

Definition at line 114 of file hp100.h.

#define HP100_REG_BM 0x0f /* RW: (8) Controls BM functions */

Definition at line 84 of file hp100.h.

#define HP100_REG_BOARD_ID 0x08 /* R: (8) EISA/ISA card ID */

Definition at line 127 of file hp100.h.

#define HP100_REG_BOARD_IO_CHCK 0x0c /* R: (8) Added to ID to get FFh */

Definition at line 128 of file hp100.h.

#define HP100_REG_BOOTROM_CTRL 0x0a

Definition at line 100 of file hp100.h.

#define HP100_REG_CRC 0x12 /* R: (8) Pkts with CRC */

Definition at line 113 of file hp100.h.

#define HP100_REG_DATA16 0x12 /* RW: WORDs must be read from here */

Definition at line 54 of file hp100.h.

#define HP100_REG_DATA32 0x10 /* RW: (32) I/O mode data port */

Definition at line 53 of file hp100.h.

#define HP100_REG_DROPPED 0x10 /* R: (16),11:0 Pkts can't fit in mem */

Definition at line 112 of file hp100.h.

#define HP100_REG_EARLYRXCFG 0x18 /* RW: (8) Early RX Cfg/Cntrl Reg */

Definition at line 93 of file hp100.h.

#define HP100_REG_EARLYTXCFG 0x16 /* RW: (16) Early TX Cfg/Cntrl Reg */

Definition at line 92 of file hp100.h.

#define HP100_REG_ECB_MEM_STOP 0x14 /* I've no idea what this is */

Definition at line 123 of file hp100.h.

#define HP100_REG_EEPROM_CTRL 0x08 /* RW: (16) Used to load EEPROM */

Definition at line 99 of file hp100.h.

#define HP100_REG_FRAGMENT_LEN 0x0c /* W: (16)12:0 Current fragment len */

Definition at line 49 of file hp100.h.

#define HP100_REG_HASH_BYTE0 0x10 /* RW: (8) Cards multicast filter */

Definition at line 75 of file hp100.h.

#define HP100_REG_HW_ID 0x00 /* R: (16) Unique card ID */

Definition at line 38 of file hp100.h.

#define HP100_REG_IO_MAP 0x0c /* RW: (8) Cards I/O address */

Definition at line 81 of file hp100.h.

#define HP100_REG_IRQ_CHANNEL 0x0d /* RW: (8) IRQ and edge/level int */

Definition at line 82 of file hp100.h.

#define HP100_REG_IRQ_MASK 0x0a /* RW: (16) Select ints to allow */

Definition at line 48 of file hp100.h.

#define HP100_REG_IRQ_STATUS 0x08 /* RW: (16) Which ints are pending */

Definition at line 47 of file hp100.h.

#define HP100_REG_ISAPNPCFG1 0x1a /* RW: (8) ISA PnP Cfg/Cntrl Reg 1 */

Definition at line 94 of file hp100.h.

#define HP100_REG_ISAPNPCFG2 0x1b /* RW: (8) ISA PnP Cfg/Cntrl Reg 2 */

Definition at line 95 of file hp100.h.

#define HP100_REG_LAN_ADDR 0x10 /* R: (8) MAC addr of card */

Definition at line 130 of file hp100.h.

#define HP100_REG_LAN_ADDR_CHCK 0x16 /* R: (8) Added to addr to get FFh */

Definition at line 131 of file hp100.h.

#define HP100_REG_MAC_ADDR 0x08 /* RW: (8) Cards MAC address */

Definition at line 74 of file hp100.h.

#define HP100_REG_MAC_CFG_1 0x0c /* RW: (8) Types of pkts to accept */

Definition at line 108 of file hp100.h.

#define HP100_REG_MAC_CFG_2 0x0d /* RW: (8) Misc MAC functions */

Definition at line 109 of file hp100.h.

#define HP100_REG_MAC_CFG_3 0x0e /* RW: (8) Misc MAC functions */

Definition at line 110 of file hp100.h.

#define HP100_REG_MAC_CFG_4 0x0f /* R: (8) Misc MAC states */

Definition at line 111 of file hp100.h.

#define HP100_REG_MEM_MAP_LSW 0x08 /* RW: (16) LSW of cards mem addr */

Definition at line 79 of file hp100.h.

#define HP100_REG_MEM_MAP_MSW 0x0a /* RW: (16) MSW of cards mem addr */

Definition at line 80 of file hp100.h.

#define HP100_REG_MODECTRL1 0x10 /* RW: (8) Mode Control 1 */

Definition at line 87 of file hp100.h.

#define HP100_REG_MODECTRL2 0x11 /* RW: (8) Mode Control 2 */

Definition at line 88 of file hp100.h.

#define HP100_REG_OFFSET 0x0e /* RW: (16)12:0 Offset to start read */

Definition at line 52 of file hp100.h.

#define HP100_REG_OPTION_LSW 0x04 /* RW: (16) Select card functions */

Definition at line 42 of file hp100.h.

#define HP100_REG_OPTION_MSW 0x06 /* RW: (16) Select card functions */

Definition at line 43 of file hp100.h.

#define HP100_REG_PAGING 0x02 /* R: (16),15:4 Card ID */

Definition at line 40 of file hp100.h.

#define HP100_REG_PCIBUSMLAT 0x15 /* RW: (8) PCI Bus Master Latency */

Definition at line 91 of file hp100.h.

#define HP100_REG_PCICTRL1 0x12 /* RW: (8) PCI Cfg 1 */

Definition at line 89 of file hp100.h.

#define HP100_REG_PCICTRL2 0x13 /* RW: (8) PCI Cfg 2 */

Definition at line 90 of file hp100.h.

#define HP100_REG_PDL_MEM_STOP 0x10 /* Not used by 802.12 devices */

Definition at line 122 of file hp100.h.

#define HP100_REG_PTR_MEMDEBUG 0x1a

Definition at line 142 of file hp100.h.

#define HP100_REG_PTR_RINGPTRS 0x14

Definition at line 141 of file hp100.h.

#define HP100_REG_PTR_RPDLEND 0x12

Definition at line 140 of file hp100.h.

#define HP100_REG_PTR_RPDLSTART 0x10

Definition at line 139 of file hp100.h.

#define HP100_REG_PTR_RXEND 0x0a /* R: (16) Current end of Rx ring */

Definition at line 136 of file hp100.h.

#define HP100_REG_PTR_RXSTART 0x08 /* R: (16) Current begin of Rx ring */

Definition at line 135 of file hp100.h.

#define HP100_REG_PTR_TXEND 0x0e /* R: (16) Current end of Rx ring */

Definition at line 138 of file hp100.h.

#define HP100_REG_PTR_TXSTART 0x0c /* R: (16) Current begin of Tx ring */

Definition at line 137 of file hp100.h.

#define HP100_REG_RX_MEM_STOP 0x0c /* RW: (16) End of Rx ring addr */

Definition at line 120 of file hp100.h.

#define HP100_REG_RX_PDA 0x18 /* W: (32) BM: Up to 31 addresses */

Definition at line 62 of file hp100.h.

#define HP100_REG_RX_PDL 0x1a /* R: (8) BM: # rx pdl not executed */

Definition at line 60 of file hp100.h.

#define HP100_REG_RX_PKT_CNT 0x18 /* RD: (8) Rx count of pkts on card */

Definition at line 58 of file hp100.h.

#define HP100_REG_RX_RING 0x24 /* W (32) Slave: RX Ring Pointers */

Definition at line 68 of file hp100.h.

#define HP100_REG_SL_EARLY 0x1c /* (32) Enhanced Slave Early Rx */

Definition at line 64 of file hp100.h.

#define HP100_REG_SOFT_MODEL 0x0d /* R: (8) Config program defined */

Definition at line 129 of file hp100.h.

#define HP100_REG_SRAM 0x0e /* RW: (8) How much RAM on card */

Definition at line 83 of file hp100.h.

#define HP100_REG_STAT_ABORT 0x23 /* R (8) Abort Counter/OW Coll. Flag */

Definition at line 67 of file hp100.h.

#define HP100_REG_STAT_DROPPED 0x20 /* R (12) Dropped Packet Counter */

Definition at line 65 of file hp100.h.

#define HP100_REG_STAT_ERRORED 0x22 /* R (8) Errored Packet Counter */

Definition at line 66 of file hp100.h.

#define HP100_REG_TRACE 0x00 /* W: (16) Used for debug output */

Definition at line 39 of file hp100.h.

#define HP100_REG_TRAIN_ALLOW 0x16 /* R: (16) Hub allowed register */

Definition at line 116 of file hp100.h.

#define HP100_REG_TRAIN_REQUEST 0x14 /* RW: (16) Endnode MAC register. */

Definition at line 115 of file hp100.h.

#define HP100_REG_TX_MEM_FREE 0x14 /* RD: (32) Amount of free Tx mem */

Definition at line 55 of file hp100.h.

#define HP100_REG_TX_MEM_STOP 0x0e /* RW: (16) End of Tx ring addr */

Definition at line 121 of file hp100.h.

#define HP100_REG_TX_PDA_H 0x1c /* W: (32) BM: Ptr to PDL, High Pri */

Definition at line 57 of file hp100.h.

#define HP100_REG_TX_PDA_L 0x14 /* W: (32) BM: Ptr to PDL, Low Pri */

Definition at line 56 of file hp100.h.

#define HP100_REG_TX_PDL 0x1b /* R: (8) BM: # tx pdl not executed */

Definition at line 61 of file hp100.h.

#define HP100_REG_TX_PKT_CNT 0x19 /* RD: (8) Tx count of pkts on card */

Definition at line 59 of file hp100.h.

#define HP100_REG_VG_LAN_CFG_1 0x0a /* RW: (8) Set 100M XCVR functions */

Definition at line 106 of file hp100.h.

#define HP100_REG_VG_LAN_CFG_2 0x0b /* RW: (8) 100M LAN Training cfgregs */

Definition at line 107 of file hp100.h.

#define HP100_REPEATER 0x01 /* 0:No, 1:Yes tell hub MAC wants to */

Definition at line 373 of file hp100.h.

#define HP100_RESET_HB 0x0000 /* For readability when resetting bits */

Definition at line 485 of file hp100.h.

#define HP100_RESET_LB 0x0000 /* For readability when resetting bits */

Definition at line 486 of file hp100.h.

#define HP100_RUNT_ERR 0x0040 /* 0:No, 1:Yes pkt length < Min Pkt */

Definition at line 540 of file hp100.h.

#define HP100_RX_EARLY_INT 0x2000

Definition at line 206 of file hp100.h.

#define HP100_RX_EN 0x20 /* 1: allow receiving of pkts */

Definition at line 403 of file hp100.h.

#define HP100_RX_ERROR 0x0200 /* 0:No, 1:Yes Rx pkt had error */

Definition at line 210 of file hp100.h.

#define HP100_RX_HDR 0x4000 /* 0:Dis., 1:Enable putting pkt into */

Definition at line 169 of file hp100.h.

#define HP100_RX_IDLE 0x80 /* 0:Yes, 1:No currently receiving pkts */

Definition at line 401 of file hp100.h.

#define HP100_RX_PACKET 0x0400 /* 0:No, 1:Yes pkt has been Rx */

Definition at line 209 of file hp100.h.

#define HP100_RX_PDA_ZERO 0x1000

Definition at line 207 of file hp100.h.

#define HP100_RX_PDL_FILL_COMPL 0x0800

Definition at line 208 of file hp100.h.

#define HP100_RX_PRI 0x8000 /* 0:No, 1:Yes packet is priority */

Definition at line 531 of file hp100.h.

#define HP100_RX_TRIP_MASK

Value:

0x1f    /* bits 4..0: threshold at which the
                     * early rx circuit will start the
                     * dma of received packet into system
                     * memory for BM */

Definition at line 325 of file hp100.h.

#define HP100_SDF_ERR 0x4000 /* 0:No, 1:Yes start of frame error */

Definition at line 532 of file hp100.h.

#define HP100_SET_HB 0x0100 /* 0:Set fields to 0 whose mask is 1 */

Definition at line 483 of file hp100.h.

#define HP100_SET_LB 0x0001 /* HB sets upper byte, LB sets lower byte */

Definition at line 484 of file hp100.h.

#define HP100_SKEW_ERR 0x2000 /* 0:No, 1:Yes skew out of range */

Definition at line 533 of file hp100.h.

#define HP100_SQU_ST 0x01 /* 0:No, 1:Yes collision signal sent */

Definition at line 352 of file hp100.h.

#define HP100_STOP_EN 0x20 /* Enables PCI state machine to issue */

Definition at line 304 of file hp100.h.

#define HP100_SYMBOL_BAL_ERR 0x0400 /* 0:No, 1:Yes symbol balance error */

Definition at line 537 of file hp100.h.

#define HP100_TR_MODE 0x80 /* 0:No, 1:Yes support Token Ring formats */

Definition at line 425 of file hp100.h.

#define HP100_TRI_INT 0x0200 /* 0:Don't, 1:Do tri-state the int */

Definition at line 178 of file hp100.h.

#define HP100_TRN_DONE 0x04 /* NEW ETR-Chips only: Will be reset */

Definition at line 390 of file hp100.h.

#define HP100_TRUNC_ERR 0x0100 /* 0:No, 1:Yes the packet was truncated */

Definition at line 539 of file hp100.h.

#define HP100_TX_CMD 0x0002 /* 1:Tell h/w download done, h/w */

Definition at line 197 of file hp100.h.

#define HP100_TX_CNT_FLG 0x08 /* Controls Early TX Reg Cnt Field */

Definition at line 266 of file hp100.h.

#define HP100_TX_COMPLETE 0x0008 /* 0:No, 1:Yes a Tx has completed */

Definition at line 213 of file hp100.h.

#define HP100_TX_DUALQ 0x10

Definition at line 260 of file hp100.h.

#define HP100_TX_EN 0x10 /* 1: allow transmitting of pkts */

Definition at line 404 of file hp100.h.

#define HP100_TX_ERROR 0x0002 /* 0:No, 1:Yes Tx pkt had error */

Definition at line 215 of file hp100.h.

#define HP100_TX_IDLE 0x40 /* 0:Yes, 1:No currently Txing pkts */

Definition at line 402 of file hp100.h.

#define HP100_TX_PDA_ZERO 0x0020 /* 1 when PDA count goes to zero */

Definition at line 211 of file hp100.h.

#define HP100_TX_SAME 0x40 /* 0:No, 1:Yes Tx same packet continuous */

Definition at line 426 of file hp100.h.

#define HP100_TX_SPACE_AVAIL 0x0010 /* 0:<8192, 1:>=8192 Tx free bytes */

Definition at line 212 of file hp100.h.

#define HP100_USE_ISA 0x04 /* 1: isa type decodes will occur */

Definition at line 291 of file hp100.h.

#define HP100_VG_ALN_ERR 0x0200 /* 0:No, 1:Yes non-octet received */

Definition at line 538 of file hp100.h.

#define HP100_VG_RESET 0x01 /* 0:Yes, 1:No reset the 100VG MAC */

Definition at line 394 of file hp100.h.

#define HP100_VG_SEL 0x80 /* 0:No, 1:Yes use 100 Mbit MAC */

Definition at line 380 of file hp100.h.

#define HP100_XCVR_7213 0x2 /* 7213 transceiver */

Definition at line 362 of file hp100.h.

#define HP100_XCVR_82503 0x3 /* 82503 transceiver */

Definition at line 363 of file hp100.h.

#define HP100_XCVR_LXT901_10 0x1 /* LXT901 10BaseT transceiver */

Definition at line 361 of file hp100.h.

#define HP100_ZERO_WAIT_EN 0x80 /* 0:No, 1:Yes asserts NOWS signal */

Definition at line 228 of file hp100.h.

#define MAX_ETHER_SIZE 1514 /* Needed for preallocation of */

Definition at line 511 of file hp100.h.

#define MAX_RINGSIZE ((MAX_RX_FRAG*8+4+4)*MAX_RX_PDL+(MAX_TX_FRAG*8+4+4)*MAX_TX_PDL)+16

Definition at line 507 of file hp100.h.

#define MAX_RX_FRAG 2 /* Don't need more... */

Definition at line 501 of file hp100.h.

#define MAX_RX_PDL 30 /* Card limit = 31 */

Definition at line 500 of file hp100.h.

#define MAX_TX_FRAG 2 /* Limit = 31 */

Definition at line 503 of file hp100.h.

#define MAX_TX_PDL 29

Definition at line 502 of file hp100.h.

#define MIN_ETHER_SIZE 60

Definition at line 510 of file hp100.h.

Typedef Documentation

typedef struct hp100_ring hp100_ring_t

Data Structures

Macros

Typedefs

Macro Definition Documentation

Typedef Documentation