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Macros | Functions
icswx.h File Reference
#include <asm/mmu_context.h>

Go to the source code of this file.

Macros

#define COP_PID_NONE   0
 
#define get_cop_pid(m)   (COP_PID_NONE)
 
#define disable_cop_pid(m)   (COP_PID_NONE)
 
#define free_cop_pid(p)
 
#define ICSWX_DSI_UCT   0x00004000 /* Unavailable Coprocessor Type */
 
#define ICSWX_DSISR_CTMASK   0x00003f00
 
#define ICSWX_GET_CT_HINT(x)   (((x) & ICSWX_DSISR_CTMASK) >> 8)
 
#define ICSWX_RC_STARTED   0x8 /* The request has been started */
 
#define ICSWX_RC_NOT_IDLE   0x4 /* No coprocessor found idle */
 
#define ICSWX_RC_NOT_FOUND   0x2 /* No coprocessor found */
 
#define ICSWX_RC_UNDEFINED   0x1 /* Reserved */
 

Functions

int acop_handle_fault (struct pt_regs *regs, unsigned long address, unsigned long error_code)
 

Macro Definition Documentation

#define COP_PID_NONE   0

Definition at line 19 of file icswx.h.

#define disable_cop_pid (   m)    (COP_PID_NONE)

Definition at line 35 of file icswx.h.

#define free_cop_pid (   p)

Definition at line 36 of file icswx.h.

#define get_cop_pid (   m)    (COP_PID_NONE)

Definition at line 34 of file icswx.h.

#define ICSWX_DSI_UCT   0x00004000 /* Unavailable Coprocessor Type */

Definition at line 44 of file icswx.h.

#define ICSWX_DSISR_CTMASK   0x00003f00

Definition at line 51 of file icswx.h.

#define ICSWX_GET_CT_HINT (   x)    (((x) & ICSWX_DSISR_CTMASK) >> 8)

Definition at line 52 of file icswx.h.

#define ICSWX_RC_NOT_FOUND   0x2 /* No coprocessor found */

Definition at line 57 of file icswx.h.

#define ICSWX_RC_NOT_IDLE   0x4 /* No coprocessor found idle */

Definition at line 56 of file icswx.h.

#define ICSWX_RC_STARTED   0x8 /* The request has been started */

Definition at line 55 of file icswx.h.

#define ICSWX_RC_UNDEFINED   0x1 /* Reserved */

Definition at line 58 of file icswx.h.

Function Documentation

int acop_handle_fault ( struct pt_regs regs,
unsigned long  address,
unsigned long  error_code 
)

: regsiters at time of interrupt : storage address : Fault code, usually the DSISR or ESR depending on processor type

Return 0 if we are able to resolve the data storage fault that results from a CT miss in the ACOP register.

Definition at line 197 of file icswx.c.