74 #ifdef CONFIG_FB_SIS_300
78 #ifdef CONFIG_FB_SIS_315
82 #define SiS_I2CDELAY 1000
83 #define SiS_I2CDELAYSHORT 150
85 static unsigned short SiS_GetBIOSLCDResInfo(
struct SiS_Private *SiS_Pr);
86 static void SiS_SetCH70xx(
struct SiS_Private *SiS_Pr,
unsigned short reg,
unsigned char val);
120 SiS_SetRegSR11ANDOR(
struct SiS_Private *SiS_Pr,
unsigned short DataAND,
unsigned short DataOR)
133 #ifdef CONFIG_FB_SIS_315
134 static unsigned char *
138 unsigned char *myptr =
NULL;
139 unsigned short romindex = 0,
reg = 0,
idx = 0;
157 myptr = (
unsigned char *)&SiS_LCDStruct661[
idx];
162 myptr = &ROMAddr[romindex];
168 static unsigned short
172 unsigned short romptr = 0;
196 SiS_AdjustCRT2Rate(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
197 unsigned short RRTI,
unsigned short *
i)
199 unsigned short checkmask=0, modeid, infoflag;
262 for(; SiS_Pr->
SiS_RefIndex[RRTI + (*i)].ModeID == modeid; (*i)--) {
263 infoflag = SiS_Pr->
SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag;
264 if(infoflag & checkmask)
return true;
271 for((*i) = 0; ; (*i)++) {
272 if(SiS_Pr->
SiS_RefIndex[RRTI + (*i)].ModeID != modeid)
break;
273 infoflag = SiS_Pr->
SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag;
274 if(infoflag & checkmask)
return true;
286 unsigned short RRTI,
i,backup_i;
287 unsigned short modeflag,
index,
temp,backupindex;
288 static const unsigned short LCDRefreshIndex[] = {
289 0x00, 0x00, 0x01, 0x01,
290 0x01, 0x01, 0x01, 0x01,
291 0x01, 0x01, 0x01, 0x01,
292 0x01, 0x01, 0x01, 0x01,
293 0x00, 0x00, 0x00, 0x00
297 if(ModeNo == 0xfe)
return 0;
311 if(ModeNo < 0x14)
return 0xFFFF;
316 if(index > 0) index--;
326 temp = LCDRefreshIndex[SiS_GetBIOSLCDResInfo(SiS_Pr)];
327 if(index > temp) index =
temp;
345 if(backupindex <= 1) RRTI++;
352 if(SiS_Pr->
SiS_RefIndex[RRTI + i].ModeID != ModeNo)
break;
355 if(temp < SiS_Pr->SiS_ModeType)
break;
358 }
while(index != 0xFFFF);
371 if(!(SiS_AdjustCRT2Rate(SiS_Pr, ModeNo, ModeIdIndex, RRTI, &i))) {
384 SiS_SaveCRT2Info(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo)
399 #ifdef CONFIG_FB_SIS_300
407 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) {
410 if(temp1 & temp)
return true;
423 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) {
426 if(temp1 & temp)
return true;
440 while (delaytime-- > 0)
444 #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
452 #ifdef CONFIG_FB_SIS_315
457 SiS_GenericDelay(SiS_Pr, 6623);
462 #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
464 SiS_ShortDelay(
struct SiS_Private *SiS_Pr,
unsigned short delay)
467 SiS_GenericDelay(SiS_Pr, 66);
473 SiS_PanelDelay(
struct SiS_Private *SiS_Pr,
unsigned short DelayTime)
475 #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
477 unsigned short PanelID, DelayIndex, Delay=0;
482 #ifdef CONFIG_FB_SIS_300
489 DelayIndex = PanelID >> 4;
490 if((DelayTime >= 2) && ((PanelID & 0x0f) == 1)) {
493 if(DelayTime >= 2) DelayTime -= 2;
494 if(!(DelayTime & 0x01)) {
500 if(ROMAddr[0x220] & 0x40) {
501 if(!(DelayTime & 0x01)) Delay = (
unsigned short)ROMAddr[0x225];
502 else Delay = (
unsigned short)ROMAddr[0x226];
506 SiS_ShortDelay(SiS_Pr, Delay);
512 #ifdef CONFIG_FB_SIS_315
519 if(!(DelayTime & 0x01)) {
535 DelayIndex = PanelID & 0x0f;
537 DelayIndex = PanelID >> 4;
539 if((DelayTime >= 2) && ((PanelID & 0x0f) == 1)) {
542 if(DelayTime >= 2) DelayTime -= 2;
543 if(!(DelayTime & 0x01)) {
549 if(ROMAddr[0x13c] & 0x40) {
550 if(!(DelayTime & 0x01)) {
551 Delay = (
unsigned short)ROMAddr[0x17e];
553 Delay = (
unsigned short)ROMAddr[0x17f];
558 SiS_ShortDelay(SiS_Pr, Delay);
564 if(!(DelayTime & 0x01)) {
579 #ifdef CONFIG_FB_SIS_315
581 SiS_PanelDelayLoop(
struct SiS_Private *SiS_Pr,
unsigned short DelayTime,
unsigned short DelayLoop)
584 for(i = 0; i < DelayLoop; i++) {
585 SiS_PanelDelay(SiS_Pr, DelayTime);
608 #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
625 #ifdef CONFIG_FB_SIS_300
632 SiS_WaitRetrace2(SiS_Pr, 0x25);
636 #ifdef CONFIG_FB_SIS_315
640 SiS_WaitRetrace2(SiS_Pr, 0x30);
649 unsigned short tempal,
temp,
i,
j;
652 for(i = 0; i < 3; i++) {
653 for(j = 0; j < 100; j++) {
656 if((tempal & 0x08))
continue;
659 if(!(tempal & 0x08))
continue;
681 #ifdef CONFIG_FB_SIS_300
703 #ifdef CONFIG_FB_SIS_315
716 #ifdef CONFIG_FB_SIS_315
727 #ifdef CONFIG_FB_SIS_315
732 if(SiS_CRT2IsLCD(SiS_Pr))
return true;
740 #ifdef CONFIG_FB_SIS_315
742 if((SiS_CRT2IsLCD(SiS_Pr)) ||
751 #ifdef CONFIG_FB_SIS_315
763 #ifdef CONFIG_FB_SIS_315
772 #ifdef CONFIG_FB_SIS_315
774 SiS_WeHaveBacklightCtrl(
struct SiS_Private *SiS_Pr)
783 #ifdef CONFIG_FB_SIS_315
792 if((flag == 0xe0) || (flag == 0xc0) ||
793 (flag == 0xb0) || (flag == 0x90))
return false;
799 #ifdef CONFIG_FB_SIS_315
811 #ifdef CONFIG_FB_SIS_315
823 #ifdef CONFIG_FB_SIS_315
837 if(flag & SetCRT2ToTV)
return true;
843 #ifdef CONFIG_FB_SIS_315
856 if(flag & SetCRT2ToLCD)
return true;
871 if((flag == 1) || (flag == 2))
return true;
881 if(SiS_HaveBridge(SiS_Pr)) {
885 if((flag == 0x80) || (flag == 0x20))
return true;
888 if((flag == 0x40) || (flag == 0x10))
return true;
897 unsigned short flag1;
909 #ifdef CONFIG_FB_SIS_300
913 unsigned int acpibase;
918 acpibase = sisfb_read_lpc_pci_dword(SiS_Pr, 0x74);
920 if(!acpibase)
return;
927 if(!(myvbinfo & SetCRT2ToTV)) temp |= 0x0100;
935 unsigned short ModeIdIndex,
int checkcrt2mode)
937 unsigned short tempax, tempbx,
temp;
938 unsigned short modeflag, resinfo = 0;
952 if(SiS_HaveBridge(SiS_Pr)) {
960 #ifdef CONFIG_FB_SIS_315
1003 if(temp & EnableCHYPbPr) {
1047 if(!(tempbx & temp)) {
1065 if(tempbx & SetCRT2ToLCD) tempbx &= (clearmask |
SetCRT2ToLCD);
1078 if(tempbx & SetCRT2ToTV) {
1082 if(tempbx & SetCRT2ToLCD) {
1111 if((!(modeflag &
CRT2Mode)) && (checkcrt2mode)) {
1117 if(SiS_BridgeIsEnabled(SiS_Pr)) {
1118 if(!(tempbx & DriverMode)) {
1119 if(SiS_BridgeInSlavemode(SiS_Pr)) {
1127 if(!(tempbx & DisableCRT2Display)) {
1128 if(tempbx & DriverMode) {
1129 if(tempbx & SetSimuScanMode) {
1130 if((!(modeflag &
CRT2Mode)) && (checkcrt2mode)) {
1145 #ifdef CONFIG_FB_SIS_300
1188 switch((temp >> 4)) {
1208 unsigned short temp,
temp1, resinfo = 0, romindex = 0;
1213 if(!(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV))
return;
1239 OutputSelect = ROMAddr[romindex];
1308 }
else if(temp1 & 0x04) {
1404 static unsigned short
1420 #ifdef CONFIG_FB_SIS_315
1421 unsigned char *ROMAddr;
1422 unsigned short temp;
1424 if((ROMAddr = GetLCDStructPtr661(SiS_Pr))) {
1450 SiS_CheckScaling(
struct SiS_Private *SiS_Pr,
unsigned short resinfo,
1451 const unsigned char *nonscalingmodes)
1454 while(nonscalingmodes[i] != 0xff) {
1455 if(nonscalingmodes[i++] == resinfo) {
1468 unsigned short temp,modeflag,resinfo=0,modexres=0,modeyres=0;
1469 bool panelcanscale =
false;
1470 #ifdef CONFIG_FB_SIS_300
1472 static const unsigned char SiS300SeriesLCDRes[] =
1473 { 0, 1, 2, 3, 7, 4, 5, 8,
1474 0, 0, 10, 0, 0, 0, 0, 15 };
1476 #ifdef CONFIG_FB_SIS_315
1477 unsigned char *myptr =
NULL;
1505 if(temp == 0) temp = 0x02;
1515 #ifdef CONFIG_FB_SIS_300
1519 if(temp < 0x0f) temp &= 0x07;
1522 temp = SiS300SeriesLCDRes[
temp];
1527 #ifdef CONFIG_FB_SIS_315
1550 #ifdef CONFIG_FB_SIS_300
1592 #ifdef CONFIG_FB_SIS_315
1600 }
else if((myptr = GetLCDStructPtr661(SiS_Pr))) {
1687 SiS_GetLCDInfoBIOS(SiS_Pr);
1708 SiS_GetLCDInfoBIOS(SiS_Pr);
1728 SiS_GetLCDInfoBIOS(SiS_Pr);
1735 SiS_GetLCDInfoBIOS(SiS_Pr);
1742 SiS_GetLCDInfoBIOS(SiS_Pr);
1749 SiS_GetLCDInfoBIOS(SiS_Pr);
1766 SiS_GetLCDInfoBIOS(SiS_Pr);
1773 SiS_GetLCDInfoBIOS(SiS_Pr);
1793 SiS_GetLCDInfoBIOS(SiS_Pr);
1800 SiS_GetLCDInfoBIOS(SiS_Pr);
1884 static const unsigned char nonscalingmodes[] = {
1887 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1891 static const unsigned char nonscalingmodes[] = {
1896 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1900 static const unsigned char nonscalingmodes[] = {
1905 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1912 static const unsigned char nonscalingmodes[] = {
1917 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1927 static const unsigned char nonscalingmodes[] = {
1932 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1936 static const unsigned char nonscalingmodes[] = {
1941 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1952 static const unsigned char nonscalingmodes[] = {
1957 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1969 static const unsigned char nonscalingmodes[] = {
1975 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1979 static const unsigned char nonscalingmodes[] = {
1985 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1989 static const unsigned char nonscalingmodes[] = {
1995 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
2007 static const unsigned char nonscalingmodes[] = {
2013 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
2017 static const unsigned char nonscalingmodes[] = {
2023 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
2029 #ifdef CONFIG_FB_SIS_300
2039 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) {
2040 if(!(ROMAddr[0x235] & 0x02)) {
2096 if(ModeNo == 0x12) {
2100 }
else if(ModeNo > 0x13) {
2119 }
else if(ModeNo > 0x13) {
2140 printk(
KERN_DEBUG "sisfb: (LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x)\n",
2151 unsigned short RefreshRateTableIndex)
2153 unsigned short CRT2Index, VCLKIndex = 0, VCLKIndexGEN = 0, VCLKIndexGENCRT = 0;
2154 unsigned short modeflag, resinfo, tempbx;
2155 const unsigned char *CHTVVCLKPtr =
NULL;
2157 if(ModeNo <= 0x13) {
2162 VCLKIndexGENCRT = VCLKIndexGEN;
2166 CRT2Index = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
2167 VCLKIndexGEN = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
2182 VCLKIndex = VCLKIndexGEN;
2199 default: VCLKIndex = VCLKIndexGEN;
2202 if(ModeNo <= 0x13) {
2204 if(SiS_Pr->
SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x42;
2206 if(SiS_Pr->
SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x00;
2210 if(VCLKIndex == 0) VCLKIndex = 0x41;
2211 if(VCLKIndex == 1) VCLKIndex = 0x43;
2212 if(VCLKIndex == 4) VCLKIndex = 0x44;
2217 }
else if(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV) {
2233 VCLKIndex = VCLKIndexGENCRT;
2238 if(VCLKIndex == 0x14) VCLKIndex = 0x34;
2241 if(VCLKIndex == 0x17) VCLKIndex = 0x45;
2248 VCLKIndex = VCLKIndexGENCRT;
2253 if(VCLKIndex == 0x1b) VCLKIndex = 0x48;
2261 VCLKIndex = CRT2Index;
2295 VCLKIndex = CHTVVCLKPtr[VCLKIndex];
2297 }
else if(SiS_Pr->
SiS_VBInfo & SetCRT2ToLCD) {
2305 #ifdef CONFIG_FB_SIS_300
2323 VCLKIndex = VCLKIndexGENCRT;
2328 if(VCLKIndex == 0x14) VCLKIndex = 0x2e;
2336 VCLKIndex = VCLKIndexGENCRT;
2341 if(VCLKIndex == 0x1b) VCLKIndex = 0x48;
2345 if(VCLKIndex == 0x0b) VCLKIndex = 0x40;
2346 if(VCLKIndex == 0x0d) VCLKIndex = 0x41;
2364 SiS_SetCRT2ModeRegs(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
2366 unsigned short i,
j, modeflag, tempah=0;
2368 #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
2369 unsigned short tempbl;
2371 #ifdef CONFIG_FB_SIS_315
2373 unsigned short tempah2, tempbl2;
2394 #ifdef CONFIG_FB_SIS_300
2411 tempah = ((0x10 >> tempcl) | 0x80);
2413 }
else tempah = 0x80;
2421 #ifdef CONFIG_FB_SIS_315
2426 tempah = (0x08 >> tempcl);
2427 if (tempah == 0) tempah = 1;
2430 }
else tempah = 0x40;
2443 #ifdef CONFIG_FB_SIS_315
2473 tempah = (tempah << 5) & 0xFF;
2475 tempah = (tempah >> 5) & 0xFF;
2510 if(SiS_IsDualLink(SiS_Pr)) tempah |= 0x40;
2524 #ifdef CONFIG_FB_SIS_315
2535 if(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV) tempah ^= 0x01;
2544 #ifdef CONFIG_FB_SIS_300
2566 #ifdef CONFIG_FB_SIS_315
2605 ((SiS_Pr->
SiS_ROMNew) && (!(ROMAddr[0x5b] & 0x04)))) {
2619 tempah = 0x30; tempah2 = 0xc0;
2620 tempbl = 0xcf; tempbl2 = 0x3f;
2622 tempah = tempah2 = 0x00;
2626 tempah = tempah2 = 0x00;
2632 tempah = 0x30; tempah2 = 0xc0;
2633 tempbl = 0xcf; tempbl2 = 0x3f;
2635 tempah = tempah2 = 0x00;
2637 tempbl = tempbl2 = 0xff;
2662 #ifdef CONFIG_FB_SIS_300
2685 #ifdef CONFIG_FB_SIS_315
2728 return ((
unsigned short)SiS_Pr->
SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO);
2732 SiS_GetCRT2ResInfo(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
2734 unsigned short xres, yres, modeflag=0, resindex;
2747 if(ModeNo <= 0x13) {
2760 if(yres == 350) yres = 400;
2763 if(ModeNo == 0x12) yres = 400;
2767 if(modeflag &
HalfDCLK) xres <<= 1;
2779 if(yres == 350) yres = 357;
2780 if(yres == 400) yres = 420;
2781 if(yres == 480) yres = 525;
2788 if(yres == 400) yres = 405;
2790 if(yres == 350) yres = 360;
2792 if(yres == 360) yres = 375;
2797 if(yres == 1024) yres = 1056;
2807 if(xres == 720) xres = 640;
2809 }
else if(xres == 720) xres = 640;
2831 SiS_GetCRT2Ptr(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
2832 unsigned short RefreshRateTableIndex,
unsigned short *CRT2Index,
2833 unsigned short *ResIndex)
2835 unsigned short tempbx=0, tempal=0, resinfo=0;
2837 if(ModeNo <= 0x13) {
2840 tempal = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
2866 if(ModeNo >= 0x13) {
2867 tempal = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC_NS;
2871 #ifdef CONFIG_FB_SIS_315
2940 *CRT2Index = tempbx;
2976 #ifdef CONFIG_FB_SIS_300
2993 #ifdef CONFIG_FB_SIS_300
3005 (*CRT2Index) = tempbx;
3006 (*ResIndex) = tempal & 0x1F;
3011 SiS_GetRAMDAC2DATA(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
3012 unsigned short RefreshRateTableIndex)
3014 unsigned short tempax=0, tempbx=0,
index, dotclock;
3015 unsigned short temp1=0, modeflag=0, tempcx=0;
3020 if(ModeNo <= 0x13) {
3029 dotclock = (modeflag &
Charx8Dot) ? 8 : 9;
3050 if(temp1 & 0x01) tempbx |= 0x0100;
3051 if(temp1 & 0x20) tempbx |= 0x0200;
3055 if(modeflag & HalfDCLK) tempax <<= 1;
3064 SiS_CalcPanelLinkTiming(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
3065 unsigned short ModeIdIndex,
unsigned short RefreshRateTableIndex)
3067 unsigned short ResIndex;
3073 if(SiS_Pr->
CModeFlag & HalfDCLK) ResIndex <<= 1;
3080 ResIndex = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC_NS;
3082 if(ResIndex == 0x09) {
3107 SiS_GetCRT2DataLVDS(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
3108 unsigned short RefreshRateTableIndex)
3110 unsigned short CRT2Index, ResIndex, backup;
3113 SiS_GetCRT2ResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3129 #ifdef CONFIG_FB_SIS_315
3130 SiS_CalcPanelLinkTiming(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3142 SiS_GetCRT2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex,
3143 &CRT2Index, &ResIndex);
3154 #ifdef CONFIG_FB_SIS_300
3178 SiS_CalcPanelLinkTiming(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3188 #ifdef CONFIG_FB_SIS_300
3190 if(ResIndex < 0x08) {
3202 SiS_GetCRT2Data301(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
3203 unsigned short RefreshRateTableIndex)
3205 unsigned char *ROMAddr =
NULL;
3206 unsigned short tempax, tempbx, modeflag, romptr=0;
3207 unsigned short resinfo, CRT2Index, ResIndex;
3210 #ifdef CONFIG_FB_SIS_315
3214 if(ModeNo <= 0x13) {
3223 #ifdef CONFIG_FB_SIS_315
3227 (resinfo661 >= 0) &&
3229 if((ROMAddr = GetLCDStructPtr661(SiS_Pr))) {
3231 romptr += (resinfo661 * 10);
3247 SiS_GetCRT2ResInfo(SiS_Pr,ModeNo,ModeIdIndex);
3259 if(modeflag & HalfDCLK) tempax <<= 1;
3265 SiS_GetRAMDAC2DATA(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3269 }
else if(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV) {
3271 SiS_GetCRT2Ptr(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
3272 &CRT2Index,&ResIndex);
3298 if(modeflag & HalfDCLK) {
3302 tempax = ((TVPtr+ResIndex)->
RVBHRS2 >> 12) & 0x07;
3303 if((TVPtr+ResIndex)->RVBHRS2 & 0x8000) SiS_Pr->
SiS_RVBHRS2 -= tempax;
3353 if(modeflag & HalfDCLK) {
3371 }
else if(SiS_Pr->
SiS_VBInfo & SetCRT2ToLCD) {
3382 if(modeflag & HalfDCLK) tempax <<= 1;
3400 #ifdef CONFIG_FB_SIS_315
3403 SiS_Pr->
SiS_VGAHT = ROMAddr[romptr+2] | ((ROMAddr[romptr+3] & 0x0f) << 8);
3404 SiS_Pr->
SiS_VGAVT = (ROMAddr[romptr+4] << 4) | ((ROMAddr[romptr+3] & 0xf0) >> 4);
3405 SiS_Pr->
SiS_HT = ROMAddr[romptr+5] | ((ROMAddr[romptr+6] & 0x0f) << 8);
3406 SiS_Pr->
SiS_VT = (ROMAddr[romptr+7] << 4) | ((ROMAddr[romptr+6] & 0xf0) >> 4);
3407 SiS_Pr->
SiS_RVBHRS2 = ROMAddr[romptr+8] | ((ROMAddr[romptr+9] & 0x0f) << 8);
3410 tempax = (ROMAddr[romptr+9] >> 4) & 0x07;
3411 if(ROMAddr[romptr+9] & 0x80) SiS_Pr->
SiS_RVBHRS2 -= tempax;
3433 SiS_GetCRT2Ptr(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
3434 &CRT2Index,&ResIndex);
3460 #ifdef CONFIG_FB_SIS_315
3461 case 200 : LCDPtr = SiS310_ExtCompaq1280x1024Data;
break;
3471 SiS_Pr->
SiS_HT = (LCDPtr+ResIndex)->LCDHT;
3472 SiS_Pr->
SiS_VT = (LCDPtr+ResIndex)->LCDVT;
3484 else if(SiS_Pr->
SiS_VGAVDE == 400) tempbx = 640;
3488 else if(SiS_Pr->
SiS_VGAVDE == 420) tempbx = 620;
3489 else if(SiS_Pr->
SiS_VGAVDE == 525) tempbx = 775;
3490 else if(SiS_Pr->
SiS_VGAVDE == 600) tempbx = 775;
3491 else if(SiS_Pr->
SiS_VGAVDE == 350) tempbx = 560;
3492 else if(SiS_Pr->
SiS_VGAVDE == 400) tempbx = 640;
3497 else if(SiS_Pr->
SiS_VGAVDE == 400) tempbx = 800;
3498 else if(SiS_Pr->
SiS_VGAVDE == 1024) tempbx = 960;
3502 else if(SiS_Pr->
SiS_VGAVDE == 375) tempbx = 800;
3503 else if(SiS_Pr->
SiS_VGAVDE == 405) tempbx = 864;
3508 else if(SiS_Pr->
SiS_VGAVDE == 400) tempbx = 1000;
3525 SiS_GetCRT2Data(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
3526 unsigned short RefreshRateTableIndex)
3532 SiS_GetCRT2DataLVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3536 SiS_GetCRT2DataLVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3538 SiS_GetCRT2Data301(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3544 SiS_GetCRT2DataLVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3558 #ifdef CONFIG_FB_SIS_300
3582 SiS_GetLVDSDesData(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
3583 unsigned short RefreshRateTableIndex)
3585 unsigned short modeflag, ResIndex;
3625 if(ModeNo <= 0x13) ResIndex = SiS_Pr->
SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
3626 else ResIndex = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
3630 #ifdef CONFIG_FB_SIS_315
3673 }
else if((PanelDesPtr = SiS_GetLVDSDesPtr(SiS_Pr))) {
3705 #ifdef CONFIG_FB_SIS_300
3750 #ifdef CONFIG_FB_SIS_315
3771 if(!(modeflag & HalfDCLK)) SiS_Pr->
SiS_LCDHDES = 632;
3776 if(!(modeflag & HalfDCLK)) SiS_Pr->
SiS_LCDHDES = 320;
3778 #ifdef CONFIG_FB_SIS_315
3782 if(!(modeflag & HalfDCLK)) {
3800 #ifdef CONFIG_FB_SIS_315
3807 unsigned short romptr = GetLCDStructPtr661_2(SiS_Pr);
3809 unsigned short temp;
3820 if((ROMAddr[romptr + 2] & (0x06 << 1)) && !drivermode) {
3838 #ifdef CONFIG_FB_SIS_315
3839 unsigned short tempah, pushax=0, modenum;
3841 unsigned short temp=0;
3849 #ifdef CONFIG_FB_SIS_300
3851 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
3855 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08);
3857 SiS_PanelDelay(SiS_Pr, 3);
3859 if(SiS_Is301B(SiS_Pr)) {
3861 SiS_ShortDelay(SiS_Pr,1);
3872 if( (!(SiS_CRT2IsLCD(SiS_Pr))) ||
3873 (!(SiS_CR36BIOSWord23d(SiS_Pr))) ) {
3874 SiS_PanelDelay(SiS_Pr, 2);
3878 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x04);
3886 #ifdef CONFIG_FB_SIS_315
3904 didpwd = SiS_HandlePWD(SiS_Pr);
3906 if( (modenum <= 0x13) ||
3911 if(custom1) SiS_PanelDelay(SiS_Pr, 3);
3925 SiS_PanelDelay(SiS_Pr, 3);
3930 if(!(SiS_IsNotM650orLater(SiS_Pr))) {
3954 SiS_PanelDelay(SiS_Pr, 2);
3971 SiS_PanelDelay(SiS_Pr, 2);
3982 if(SiS_IsNotM650orLater(SiS_Pr)) {
3989 (!(SiS_CRT2IsLCD(SiS_Pr))) &&
3992 if(custom1) SiS_PanelDelay(SiS_Pr, 2);
3996 if(custom1) SiS_PanelDelay(SiS_Pr, 4);
4002 if(SiS_IsVAorLCD(SiS_Pr)) {
4003 SiS_PanelDelayLoop(SiS_Pr, 3, 20);
4017 #ifdef CONFIG_FB_SIS_300
4018 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4019 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08);
4020 SiS_PanelDelay(SiS_Pr, 3);
4040 #ifdef CONFIG_FB_SIS_300
4042 if( (!(SiS_CRT2IsLCD(SiS_Pr))) ||
4043 (!(SiS_CR36BIOSWord23d(SiS_Pr))) ) {
4044 SiS_PanelDelay(SiS_Pr, 2);
4045 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x04);
4056 #ifdef CONFIG_FB_SIS_300
4064 SiS_WaitVBRetrace(SiS_Pr);
4066 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4067 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08);
4068 SiS_PanelDelay(SiS_Pr, 3);
4073 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4074 SiS_WaitVBRetrace(SiS_Pr);
4078 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08);
4079 SiS_PanelDelay(SiS_Pr, 3);
4094 if( (!(SiS_CRT2IsLCD(SiS_Pr))) ||
4095 (!(SiS_CR36BIOSWord23d(SiS_Pr))) ) {
4096 SiS_PanelDelay(SiS_Pr, 2);
4097 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x04);
4104 #ifdef CONFIG_FB_SIS_315
4106 if(!(SiS_IsNotM650orLater(SiS_Pr))) {
4122 (SiS_IsTVOrYPbPrOrScart(SiS_Pr)) ) {
4129 SiS_Chrontel701xBLOff(SiS_Pr);
4130 SiS_Chrontel701xOff(SiS_Pr);
4135 (SiS_IsTVOrYPbPrOrScart(SiS_Pr)) ) {
4143 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08);
4144 SiS_PanelDelay(SiS_Pr, 3);
4149 (!(SiS_IsTVOrYPbPrOrScart(SiS_Pr))) ) {
4172 if(SiS_CRT2IsLCD(SiS_Pr)) {
4181 if(SiS_IsLCDOrLCDA(SiS_Pr)) {
4209 if(SiS_CRT2IsLCD(SiS_Pr)) {
4210 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4211 SiS_PanelDelay(SiS_Pr, 2);
4212 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x04);
4237 unsigned short temp=0, tempah;
4238 #ifdef CONFIG_FB_SIS_315
4239 unsigned short temp1, pushax=0;
4240 bool delaylong =
false;
4249 #ifdef CONFIG_FB_SIS_300
4251 if(SiS_CRT2IsLCD(SiS_Pr)) {
4255 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x00);
4258 if(!(SiS_CR36BIOSWord23d(SiS_Pr))) {
4259 SiS_PanelDelay(SiS_Pr, 0);
4265 (SiS_CRT2IsLCD(SiS_Pr))) {
4271 if(SiS_BridgeInSlavemode(SiS_Pr)) {
4278 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4279 SiS_PanelDelay(SiS_Pr, 1);
4281 SiS_WaitVBRetrace(SiS_Pr);
4282 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x00);
4289 if(SiS_BridgeInSlavemode(SiS_Pr)) {
4299 if(SiS_CRT2IsLCD(SiS_Pr)) {
4301 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4302 SiS_PanelDelay(SiS_Pr, 1);
4316 #ifdef CONFIG_FB_SIS_315
4319 unsigned char r30=0,
r31=0, r32=0, r33=0, cr36=0;
4333 if(!(SiS_IsNotM650orLater(SiS_Pr))) {
4336 if(SiS_LCDAEnabled(SiS_Pr)) {
4337 if(SiS_TVEnabled(SiS_Pr)) tempah = 0x18;
4353 didpwd = SiS_HandlePWD(SiS_Pr);
4355 if(SiS_IsVAorLCD(SiS_Pr)) {
4358 SiS_PanelDelayLoop(SiS_Pr, 3, 2);
4360 SiS_PanelDelayLoop(SiS_Pr, 3, 2);
4362 SiS_GenericDelay(SiS_Pr, 17664);
4366 SiS_PanelDelayLoop(SiS_Pr, 3, 2);
4368 SiS_GenericDelay(SiS_Pr, 17664);
4374 SiS_PanelDelayLoop(SiS_Pr, 3, 10);
4383 if(SiS_BridgeInSlavemode(SiS_Pr)) {
4386 if(!(SiS_LCDAEnabled(SiS_Pr))) temp |= 0x20;
4397 SiS_PanelDelay(SiS_Pr, 2);
4410 if( (SiS_LCDAEnabled(SiS_Pr)) ||
4411 (SiS_CRT2IsLCD(SiS_Pr)) ) {
4428 SiS_PanelDelay(SiS_Pr, 2);
4437 SiS_GenericDelay(SiS_Pr, 2048);
4448 unsigned short romptr = GetLCDStructPtr661_2(SiS_Pr);
4455 if(ROMAddr[romptr + 1] & 0x10) SiS_Pr->
EMI_30 = 0x40;
4487 switch((cr36 & 0x0f)) {
4492 r31 = 0x05; r32 = 0x60; r33 = 0x33;
4493 if((cr36 & 0xf0) == 0x30) {
4494 r31 = 0x0d; r32 = 0x70; r33 = 0x40;
4501 r31 = 0x12; r32 = 0xd0; r33 = 0x6b;
4503 r31 = 0x0d; r32 = 0x70; r33 = 0x6b;
4510 r31 = 0x05; r32 = 0x60; r33 = 0x00;
4512 r31 = 0x0d; r32 = 0x70; r33 = 0x40;
4519 r31 = 0x05; r32 = 0x60; r33 = 0x00;
4528 if((cr36 & 0x0f) == 0x09) {
4529 r30 = 0x60;
r31 = 0x05; r32 = 0x60; r33 = 0x00;
4535 if((cr36 & 0x0f) == 0x03) {
4536 r30 = 0x20;
r31 = 0x12; r32 = 0xd0; r33 = 0x6b;
4542 if((cr36 & 0x0f) == 0x02) {
4552 if(!(SiS_Pr->
OverruleEMI && (!r30) && (!
r31) && (!r32) && (!r33))) {
4554 SiS_GenericDelay(SiS_Pr, 2048);
4564 if( (SiS_LCDAEnabled(SiS_Pr)) ||
4565 (SiS_CRT2IsLCD(SiS_Pr)) ) {
4568 SiS_PanelDelayLoop(SiS_Pr, 3, 5);
4570 SiS_PanelDelayLoop(SiS_Pr, 3, 5);
4573 SiS_WaitVBRetrace(SiS_Pr);
4574 SiS_WaitVBRetrace(SiS_Pr);
4576 SiS_GenericDelay(SiS_Pr, 1280);
4586 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4587 if(SiS_IsVAorLCD(SiS_Pr)) {
4588 SiS_PanelDelayLoop(SiS_Pr, 3, 10);
4590 SiS_PanelDelayLoop(SiS_Pr, 3, 10);
4592 SiS_WaitVBRetrace(SiS_Pr);
4594 SiS_GenericDelay(SiS_Pr, 2048);
4595 SiS_WaitVBRetrace(SiS_Pr);
4611 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4622 if(SiS_CRT2IsLCD(SiS_Pr)) {
4623 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x00);
4624 SiS_PanelDelay(SiS_Pr, 0);
4629 if(SiS_BridgeInSlavemode(SiS_Pr)) {
4631 if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20;
4639 if(!(temp & 0x80)) {
4646 SiS_VBLongWait(SiS_Pr);
4651 SiS_VBLongWait(SiS_Pr);
4654 if(SiS_CRT2IsLCD(SiS_Pr)) {
4655 SiS_PanelDelay(SiS_Pr, 1);
4656 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x00);
4666 #ifdef CONFIG_FB_SIS_300
4668 if(SiS_CRT2IsLCD(SiS_Pr)) {
4670 SiS_PanelDelay(SiS_Pr, 1);
4671 SiS_PanelDelay(SiS_Pr, 1);
4672 SiS_PanelDelay(SiS_Pr, 1);
4674 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x00);
4675 if(!(SiS_CR36BIOSWord23d(SiS_Pr))) {
4676 SiS_PanelDelay(SiS_Pr, 0);
4684 if(SiS_BridgeInSlavemode(SiS_Pr)) {
4691 if(!(SiS_CRT2IsLCD(SiS_Pr))) {
4692 SiS_WaitVBRetrace(SiS_Pr);
4697 if(SiS_CRT2IsLCD(SiS_Pr)) {
4700 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4701 SiS_PanelDelay(SiS_Pr, 1);
4702 SiS_PanelDelay(SiS_Pr, 1);
4704 SiS_WaitVBRetrace(SiS_Pr);
4705 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x00);
4714 #ifdef CONFIG_FB_SIS_315
4716 if(!(SiS_IsNotM650orLater(SiS_Pr))) {
4723 if(SiS_CRT2IsLCD(SiS_Pr)) {
4724 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x00);
4725 SiS_PanelDelay(SiS_Pr, 0);
4737 SiS_Chrontel701xBLOff(SiS_Pr);
4746 if(SiS_IsLCDOrLCDA(SiS_Pr)) {
4753 if(!(temp1 & 0x80)) {
4759 SiS_Chrontel701xBLOn(SiS_Pr);
4764 if(SiS_CRT2IsLCD(SiS_Pr)) {
4777 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4782 if(SiS_IsTVOrYPbPrOrScart(SiS_Pr)) {
4783 SiS_Chrontel701xOn(SiS_Pr);
4786 (SiS_IsLCDOrLCDA(SiS_Pr)) ) {
4787 SiS_ChrontelDoSomething1(SiS_Pr);
4792 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4794 (SiS_IsLCDOrLCDA(SiS_Pr)) ) {
4795 SiS_Chrontel701xBLOn(SiS_Pr);
4796 SiS_ChrontelInitTVVSync(SiS_Pr);
4800 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4801 if(SiS_CRT2IsLCD(SiS_Pr)) {
4802 SiS_PanelDelay(SiS_Pr, 1);
4803 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x00);
4822 SiS_SetCRT2Offset(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
4823 unsigned short RRTI)
4835 temp = (
unsigned char)(((offset >> 3) & 0xFF) + 1);
4836 if(offset & 0x07) temp++;
4842 SiS_SetCRT2Sync(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short RefreshRateTableIndex)
4844 unsigned short tempah=0, tempbl, infoflag;
4851 infoflag = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
4860 }
else tempah = infoflag >> 8;
4898 #ifdef CONFIG_FB_SIS_300
4902 tempah = infoflag >> 8;
4907 tempbl = (tempah >> 6) & 0x03;
4921 tempah = ((infoflag >> 8) & 0xc0) | 0x20;
4931 #ifdef CONFIG_FB_SIS_315
4938 tempah = infoflag >> 8;
4944 tempah = infoflag >> 8;
4948 tempbl = (tempah >> 6) & 0x03;
4965 tempah = tempbl = infoflag >> 8;
4969 if(ModeNo <= 0x13) {
4977 tempbl = (tempah >> 6) & 0x03;
4987 if(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV) tempah |= 0xc0;
5009 #ifdef CONFIG_FB_SIS_300
5011 SiS_SetCRT2FIFO_300(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo)
5014 unsigned short temp,
index, modeidindex, refreshratetableindex;
5015 unsigned short VCLK = 0,
MCLK, colorth = 0,
data2 = 0;
5016 unsigned short tempbx, tempcl, CRT1ModeNo, CRT2ModeNo, SelectRate_backup;
5017 unsigned int data, pci50, pciA0;
5018 static const unsigned char colortharray[] = {
5030 refreshratetableindex =
SiS_GetRatePtr(SiS_Pr, CRT1ModeNo, modeidindex);
5032 if(CRT1ModeNo >= 0x13) {
5039 if(!colorth) colorth++;
5054 if(CRT1ModeNo >= 0x13) {
5068 data2 = temp - ((colorth * VCLK) /
MCLK);
5070 temp = (28 * 16) %
data2;
5076 SiS_GetFIFOThresholdIndex300(SiS_Pr, &tempbx, &tempcl);
5077 data = SiS_GetFIFOThresholdB300(tempbx, tempcl);
5081 pci50 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50);
5082 pciA0 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xa0);
5086 index = (
unsigned short)(((pciA0 >> 28) & 0x0f) * 3);
5087 index += (
unsigned short)(((pci50 >> 9)) & 0x03);
5097 index = (pci50 >> 1) & 0x07;
5099 if(pci50 & 0x01) index += 6;
5100 if(!(pciA0 & 0x01)) index += 24;
5106 data = SiS_GetLatencyFactor630(SiS_Pr, index) + 15;
5118 CRT2ModeNo = ModeNo;
5121 refreshratetableindex =
SiS_GetRatePtr(SiS_Pr, CRT2ModeNo, modeidindex);
5124 index =
SiS_GetVCLK2Ptr(SiS_Pr, CRT2ModeNo, modeidindex, refreshratetableindex);
5129 if(ROMAddr[0x220] & 0x01) {
5130 VCLK = ROMAddr[0x229] | (ROMAddr[0x22a] << 8);
5145 if(!colorth) colorth++;
5147 data = data * VCLK * colorth;
5148 temp = data % (
MCLK << 4);
5149 data = data / (
MCLK << 4);
5152 if(data < 6) data = 6;
5153 else if(data > 0x14) data = 0x14;
5170 if(data > 0x13) data = 0x13;
5184 #ifdef CONFIG_FB_SIS_315
5207 static unsigned short
5210 unsigned int tempax,tempbx;
5214 tempax = (tempax * SiS_Pr->
SiS_HT) / tempbx;
5215 return (
unsigned short)tempax;
5220 SiS_SetGroup1_301(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
5221 unsigned short RefreshRateTableIndex)
5223 unsigned short temp, modeflag,
i,
j, xres=0, VGAVDE;
5224 static const unsigned short CRTranslation[] = {
5226 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a,
5228 0x00, 0x0b, 0x17, 0x18, 0x19, 0x00, 0x1a, 0x00,
5230 0x0c, 0x0d, 0x0e, 0x00, 0x0f, 0x10, 0x11, 0x00
5233 if(ModeNo <= 0x13) {
5240 xres = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].XRes;
5254 if(modeflag & HalfDCLK) SiS_Pr->
CHDisplay >>= 1;
5267 if(!(modeflag & HalfDCLK)) temp -= 32;
5283 if (VGAVDE == 357) VGAVDE = 350;
5284 else if(VGAVDE == 360) VGAVDE = 350;
5285 else if(VGAVDE == 375) VGAVDE = 350;
5286 else if(VGAVDE == 405) VGAVDE = 400;
5287 else if(VGAVDE == 420) VGAVDE = 400;
5288 else if(VGAVDE == 525) VGAVDE = 480;
5289 else if(VGAVDE == 1056) VGAVDE = 1024;
5297 temp = (SiS_Pr->
SiS_VGAVT - VGAVDE) >> 1;
5306 for(i = 0; i <= 7; i++) {
5309 for(i = 0x10, j = 8; i <= 0x12; i++, j++) {
5312 for(i = 0x15, j = 11; i <= 0x16; i++, j++) {
5315 for(i = 0x0a, j = 13; i <= 0x0c; i++, j++) {
5322 temp = (SiS_Pr->
CCRT1CRTC[16] & 0x01) << 5;
5328 if(modeflag & HalfDCLK) temp |= 0x08;
5349 SiS_SetGroup1_LVDS(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
5350 unsigned short RefreshRateTableIndex)
5352 unsigned short modeflag, resinfo = 0;
5353 unsigned short push2, tempax, tempbx, tempcx,
temp;
5354 unsigned int tempeax = 0, tempebx, tempecx, tempvcfact = 0;
5355 bool islvds =
false, issis =
false, chkdclkfirst =
false;
5356 #ifdef CONFIG_FB_SIS_300
5357 unsigned short crt2crtc = 0;
5359 #ifdef CONFIG_FB_SIS_315
5360 unsigned short pushcx;
5363 if(ModeNo <= 0x13) {
5366 #ifdef CONFIG_FB_SIS_300
5374 #ifdef CONFIG_FB_SIS_300
5375 crt2crtc = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
5391 chkdclkfirst =
true;
5395 #ifdef CONFIG_FB_SIS_315
5437 temp = (tempax & 0x0007);
5439 temp = (tempax >> 3) & 0x00FF;
5458 if(temp & 0x07) temp += 8;
5462 tempcx = (SiS_Pr->
SiS_HT - tempbx) >> 2;
5473 temp = (tempcx >> 3) & 0x00FF;
5480 case 0x0d: temp = 0x56;
break;
5481 case 0x10: temp = 0x60;
break;
5482 case 0x13: temp = 0x5f;
break;
5492 case 0x5e: temp = 0x54;
break;
5514 temp |= ((tempcx & 0x07) << 5);
5539 if(islvds) tempcx >>= 1;
5551 else if(issis) tempbx++;
5556 temp = tempbx & 0x00FF;
5559 if(ModeNo == 0x10) temp = 0xa9;
5574 temp = tempcx & 0x000F;
5577 temp = ((tempbx >> 8) & 0x07) << 3;
5635 temp = ((tempbx >> 8) & 0x07) << 3;
5636 temp |= ((tempcx >> 8) & 0x07);
5645 #ifdef CONFIG_FB_SIS_300
5647 temp = (tempeax % (
unsigned int)SiS_Pr->
SiS_VDE);
5648 tempeax = tempeax / (
unsigned int)SiS_Pr->
SiS_VDE;
5653 temp = (
unsigned short)(tempeax & 0x00FF);
5660 #ifdef CONFIG_FB_SIS_315
5663 temp = (tempeax % tempebx);
5664 tempeax = tempeax / tempebx;
5666 tempvcfact = tempeax;
5668 temp = (
unsigned short)(tempeax & 0x00FF);
5670 temp = (
unsigned short)((tempeax & 0x00FF00) >> 8);
5672 temp = (
unsigned short)((tempeax & 0x00030000) >> 16);
5677 temp = (
unsigned short)(tempeax & 0x00FF);
5679 temp = (
unsigned short)((tempeax & 0x00FF00) >> 8);
5681 temp = (
unsigned short)(((tempeax & 0x00030000) >> 16) << 6);
5695 if(modeflag & HalfDCLK) tempeax >>= 1;
5697 tempebx = tempeax << 16;
5698 if(SiS_Pr->
SiS_HDE == tempeax) {
5701 tempecx = tempebx / SiS_Pr->
SiS_HDE;
5703 if(tempebx % SiS_Pr->
SiS_HDE) tempecx++;
5708 tempeax = (tempebx / tempecx) - 1;
5710 tempeax = ((SiS_Pr->
SiS_VGAHT << 16) / tempecx) - 1;
5712 tempecx = (tempecx << 16) | (tempeax & 0xFFFF);
5713 temp = (
unsigned short)(tempecx & 0x00FF);
5717 tempeax = (SiS_Pr->
SiS_VGAVDE << 18) / tempvcfact;
5718 tempbx = (
unsigned short)(tempeax & 0xFFFF);
5721 tempbx = tempvcfact & 0x3f;
5722 if(tempbx == 0) tempbx = 64;
5724 tempbx = (
unsigned short)(tempeax & 0xFFFF);
5732 temp = ((tempbx >> 8) & 0x07) << 3;
5733 temp = temp | ((tempecx >> 8) & 0x07);
5739 if(modeflag & HalfDCLK) tempecx >>= 1;
5741 temp = (
unsigned short)((tempecx & 0xFF00) >> 8);
5743 temp = (
unsigned short)(tempecx & 0x00FF);
5746 #ifdef CONFIG_FB_SIS_315
5764 #ifdef CONFIG_FB_SIS_300
5767 unsigned char *trumpdata;
5768 int i, j = crt2crtc;
5769 unsigned char TrumpMode13[4] = { 0x01, 0x10, 0x2c, 0x00 };
5770 unsigned char TrumpMode10_1[4] = { 0x01, 0x10, 0x27, 0x00 };
5771 unsigned char TrumpMode10_2[4] = { 0x01, 0x16, 0x10, 0x00 };
5774 trumpdata = &ROMAddr[0x8001 + (j * 80)];
5777 trumpdata = &SiS300_TrumpionData[
j][0];
5781 for(i=0; i<5; i++) {
5782 SiS_SetTrumpionBlock(SiS_Pr, trumpdata);
5785 if(ModeNo == 0x13) {
5786 for(i=0; i<4; i++) {
5787 SiS_SetTrumpionBlock(SiS_Pr, &TrumpMode13[0]);
5789 }
else if(ModeNo == 0x10) {
5790 for(i=0; i<4; i++) {
5791 SiS_SetTrumpionBlock(SiS_Pr, &TrumpMode10_1[0]);
5792 SiS_SetTrumpionBlock(SiS_Pr, &TrumpMode10_2[0]);
5800 #ifdef CONFIG_FB_SIS_315
5815 temp = (tempax >> 8) << 3;
5828 temp = (tempax >> 8) << 3;
5836 temp = tempeax & 0x7f;
5839 temp = tempeax & 0x3f;
5852 temp = tempax & 0x00FF;
5854 temp = ((tempax & 0xFF00) >> 8) << 3;
5861 tempeax = tempax * pushcx;
5862 temp = tempeax & 0xFF;
5864 temp = (tempeax & 0xFF00) >> 8;
5866 temp = ((tempeax & 0xFF0000) >> 16) | 0x10;
5868 temp = ((tempeax & 0x01000000) >> 24) << 7;
5905 SiS_SetGroup1(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
5906 unsigned short RefreshRateTableIndex)
5908 #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
5911 unsigned short temp=0, tempax=0, tempbx=0, tempcx=0, bridgeadd=0;
5912 unsigned short pushbx=0, CRT1Index=0, modeflag, resinfo=0;
5913 #ifdef CONFIG_FB_SIS_315
5914 unsigned short tempbl=0;
5918 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
5922 if(ModeNo <= 0x13) {
5932 SiS_SetCRT2Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
5939 #ifdef CONFIG_FB_SIS_300
5940 SiS_SetCRT2FIFO_300(SiS_Pr, ModeNo);
5943 #ifdef CONFIG_FB_SIS_315
5944 SiS_SetCRT2FIFO_310(SiS_Pr);
5952 #ifdef CONFIG_FB_SIS_300
5957 temp = (((SiS_Pr->
SiS_VGAHT - 1) & 0xFF00) >> 8) << 4;
5965 tempbx = pushbx + tempcx;
5975 #ifdef CONFIG_FB_SIS_315
5978 if(modeflag & HalfDCLK) {
5985 tempcx = SiS_Pr->
SiS_HT - tempax;
5991 temp = (tempcx >> 4) & 0xF0;
5998 if(modeflag & HalfDCLK) {
6018 tempcx = (tempcx & 0xff00) | 0x30;
6020 tempcx = (tempcx & 0xff00) | 0xff;
6036 if(modeflag & HalfDCLK) tempax >>= 1;
6038 if(tempcx > tempax) tempcx = tempax;
6042 unsigned char cr4, cr14,
cr5, cr15;
6054 tempbx = ((cr4 | ((cr14 & 0xC0) << 2)) - 3) << 3;
6055 tempcx = (((cr5 & 0x1f) | ((cr15 & 0x04) << (5-2))) - 3) << 3;
6057 tempcx |= (tempbx & 0xFF00);
6058 tempbx += bridgeadd;
6059 tempcx += bridgeadd;
6061 if(modeflag & HalfDCLK) tempax >>= 1;
6063 if(tempcx > tempax) tempcx = tempax;
6077 temp = ((tempbx >> 8) & 0x0F) | ((pushbx >> 4) & 0xF0);
6083 temp = tempcx & 0x00FF;
6105 temp = ((tempbx >> 5) & 0x38) | ((tempcx >> 8) & 0x07);
6115 if(tempcx < 4) tempcx = 4;
6130 unsigned char cr8,
cr7, cr13;
6143 if(cr7 & 0x04) tempbx |= 0x0100;
6144 if(cr7 & 0x80) tempbx |= 0x0200;
6145 if(cr13 & 0x08) tempbx |= 0x0400;
6150 temp = ((tempbx >> 4) & 0x70) | (tempcx & 0x0F);
6157 #ifdef CONFIG_FB_SIS_300
6171 if(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV) temp = 0x08;
6177 if(ROMAddr[0x220] & 0x80) {
6179 temp = ROMAddr[0x221];
6181 temp = ROMAddr[0x222];
6183 temp = ROMAddr[0x223];
6185 temp = ROMAddr[0x224];
6189 if(SiS_Pr->
PDC != -1) temp = SiS_Pr->
PDC;
6198 if(ROMAddr[0x220] & 0x80) {
6199 temp = ROMAddr[0x220];
6203 if(SiS_Pr->
PDC != -1) temp = SiS_Pr->
PDC;
6215 #ifdef CONFIG_FB_SIS_315
6224 if(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV) temp = 0x0a;
6228 if(!(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV)) tempbl = 0x0F;
6236 if(ROMAddr[0x13c] & 0x80) tempbl = 0xf0;
6246 if(modeflag & DoubleScanMode) tempax |= 0x80;
6247 if(modeflag & HalfDCLK) tempax |= 0x40;
6259 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
6261 SiS_SetGroup1_301(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
6265 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
6269 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo,ModeIdIndex,RefreshRateTableIndex);
6272 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo,ModeIdIndex,RefreshRateTableIndex);
6282 #ifdef CONFIG_FB_SIS_315
6283 static unsigned char *
6284 SiS_GetGroup2CLVXPtr(
struct SiS_Private *SiS_Pr,
int tabletype)
6286 const unsigned char *tableptr =
NULL;
6287 unsigned short a,
b,
p = 0;
6297 tableptr = SiS_Part2CLVX_1;
6299 tableptr = SiS_Part2CLVX_2;
6302 tableptr = SiS_Part2CLVX_4;
6304 tableptr = SiS_Part2CLVX_3;
6309 else tableptr = SiS_Part2CLVX_5;
6311 tableptr = SiS_Part2CLVX_6;
6314 if((tableptr[p] | tableptr[p+1] << 8) == a)
break;
6316 }
while((tableptr[p] | tableptr[p+1] << 8) != 0xffff);
6317 if((tableptr[p] | tableptr[p+1] << 8) == 0xffff) p -= 0x42;
6320 return ((
unsigned char *)&tableptr[p]);
6324 SiS_SetGroup2_C_ELV(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
6325 unsigned short RefreshRateTableIndex)
6327 unsigned char *tableptr;
6333 tableptr = SiS_GetGroup2CLVXPtr(SiS_Pr, 0);
6334 for(i = 0x80, j = 0; i <= 0xbf; i++, j++) {
6338 tableptr = SiS_GetGroup2CLVXPtr(SiS_Pr, 1);
6339 for(i = 0xc0, j = 0; i <= 0xff; i++, j++) {
6344 if(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV) temp |= 0x04;
6349 SiS_GetCRT2Part2Ptr(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
6350 unsigned short RefreshRateTableIndex,
unsigned short *CRT2Index,
6351 unsigned short *ResIndex)
6359 (*ResIndex) = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
6361 (*ResIndex) &= 0x3f;
6375 return (((*CRT2Index) != 0));
6379 #ifdef CONFIG_FB_SIS_300
6381 SiS_Group2LCDSpecial(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short crt2crtc)
6383 unsigned short tempcx;
6384 static const unsigned char atable[] = {
6385 0xc3,0x9e,0xc3,0x9e,0x02,0x02,0x02,
6386 0xab,0x87,0xab,0x9e,0xe7,0x02,0x02
6396 if(ModeNo == 0x13) {
6400 }
else if((crt2crtc & 0x3F) == 4) {
6439 SiS_Set300Part2Regs(
struct SiS_Private *SiS_Pr,
unsigned short ModeIdIndex,
unsigned short RefreshRateTableIndex,
6440 unsigned short ModeNo)
6443 unsigned short crt2crtc, resindex;
6450 if(ModeNo <= 0x13) {
6453 crt2crtc = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
6456 resindex = crt2crtc & 0x3F;
6468 for(i = 2, j = 0x04; j <= 0x06; i++, j++ ) {
6471 for(j = 0x1c; j <= 0x1d; i++, j++ ) {
6474 for(j = 0x1f; j <= 0x21; i++, j++ ) {
6483 SiS_SetTVSpecial(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo)
6491 const unsigned char specialtv[] = {
6492 0xa7,0x07,0xf2,0x6e,0x17,0x8b,0x73,0x53,
6493 0x13,0x40,0x34,0xf4,0x63,0xbb,0xcc,0x7a,
6494 0x58,0xe4,0x73,0xda,0x13
6497 for(i = 0x1c, j = 0; i <= 0x30; i++, j++) {
6512 if((ModeNo == 0x38) || (ModeNo == 0x4a) || (ModeNo == 0x64) ||
6513 (ModeNo == 0x52) || (ModeNo == 0x58) || (ModeNo == 0x5c)) {
6524 SiS_SetGroup2_Tail(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo)
6526 unsigned short temp;
6554 if(ModeNo <= 0x13) temp = 3;
6559 if((SiS_Pr->SiS_PanelXRes == 1280) && (SiS_Pr->SiS_PanelYRes == 768)) {
6583 SiS_SetGroup2(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
6584 unsigned short RefreshRateTableIndex)
6586 unsigned short i,
j, tempax, tempbx, tempcx, tempch, tempcl,
temp;
6587 unsigned short push2, modeflag, crt2crtc, bridgeoffset;
6588 unsigned int longtemp, PhaseIndex;
6590 const unsigned char *TimingPoint;
6591 #ifdef CONFIG_FB_SIS_315
6592 unsigned short resindex, CRT2Index;
6598 if(ModeNo <= 0x13) {
6606 crt2crtc = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
6645 TimingPoint = &SiS_YPbPrTable[
i][0];
6651 if(newtvphase) PhaseIndex = 0x09;
6657 if(newtvphase) PhaseIndex += 8;
6663 if(newtvphase) PhaseIndex += 8;
6676 for(i = 0x31, j = 0; i <= 0x34; i++, j++) {
6680 for(i = 0x01, j = 0; i <= 0x2D; i++, j++) {
6683 for(i = 0x39; i <= 0x45; i++, j++) {
6716 temp = tempax + (
unsigned short)TimingPoint[0];
6719 temp = tempax + (
unsigned short)TimingPoint[1];
6735 if(SiS_IsDualLink(SiS_Pr)) tempcx >>= 1;
6741 tempcx = SiS_Pr->
SiS_HT >> 1;
6742 if(SiS_IsDualLink(SiS_Pr)) tempcx >>= 1;
6747 tempbx = TimingPoint[
j] | (TimingPoint[j+1] << 8);
6760 tempcx += (TimingPoint[
j] | (TimingPoint[j+1] << 8));
6768 tempcx = SiS_Pr->
SiS_HT >> 1;
6769 if(SiS_IsDualLink(SiS_Pr)) tempcx >>= 1;
6771 tempcx -= (TimingPoint[
j] | ((TimingPoint[j+1]) << 8));
6776 tempcx = SiS_GetVGAHT2(SiS_Pr) - 1;
6785 }
else if( (SiS_Pr->
SiS_VBInfo & SetCRT2ToTV) &&
6790 if((ModeNo <= 0x13) && (crt2crtc == 1)) tempbx++;
6793 if(crt2crtc == 4) tempbx++;
6799 if((ModeNo == 0x2f) || (ModeNo == 0x5d) || (ModeNo == 0x5e)) tempbx++;
6802 if(ModeNo == 0x03) tempbx++;
6809 temp = (tempcx >> 8) & 0x0F;
6810 temp |= ((tempbx >> 2) & 0xC0);
6828 temp = ((tempbx >> 3) & 0x60) | 0x18;
6838 if(!(modeflag & HalfDCLK)) {
6845 tempch = tempcl = 0x01;
6862 if(!(tempbx & 0x20)) {
6863 if(modeflag & HalfDCLK) tempcl <<= 1;
6864 longtemp = ((SiS_Pr->
SiS_VGAHDE * tempch) / tempcl) << 13;
6866 tempax = longtemp / SiS_Pr->
SiS_HDE;
6867 if(longtemp % SiS_Pr->
SiS_HDE) tempax++;
6868 tempbx |= ((tempax >> 8) & 0x1F);
6869 tempcx = tempax >> 13;
6878 if(tempbx & 0x20) tempcx = 0;
6890 temp = (tempcx & 0x0300) >> 6;
6891 temp |= ((tempbx >> 8) & 0x03);
6902 SiS_SetTVSpecial(SiS_Pr, ModeNo);
6931 if(SiS_IsDualLink(SiS_Pr)) tempbx >>= 1;
6953 tempcx = SiS_Pr->
SiS_VT - 1;
6955 temp = (tempcx >> 3) & 0xE0;
6970 #ifdef CONFIG_FB_SIS_315
6971 if(SiS_GetCRT2Part2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex,
6972 &CRT2Index, &resindex)) {
6974 case 206: CRT2Part2Ptr = SiS310_CRT2Part2_Asus1024x768_3;
break;
6981 for(i = 2, j = 0x04; j <= 0x06; i++, j++ ) {
6984 for(j = 0x1c; j <= 0x1d; i++, j++ ) {
6987 for(j = 0x1f; j <= 0x21; i++, j++ ) {
6993 SiS_SetGroup2_Tail(SiS_Pr, ModeNo);
7006 tempcx = SiS_Pr->
SiS_VT - 1;
7019 tempax = tempcx = 0;
7034 temp = (tempbx >> 5) & 0x38;
7035 temp |= ((tempcx >> 8) & 0x07);
7042 tempcx = (SiS_Pr->
SiS_VT - tempax) >> 4;
7045 tempcx = (SiS_Pr->
SiS_VT - tempax) / 10;
7054 if(tempax % 4) { tempax >>= 2; tempax++; }
7055 else { tempax >>= 2; }
7056 tempbx -= (tempax - 1);
7059 if(tempbx <= SiS_Pr->SiS_VDE) tempbx = SiS_Pr->
SiS_VDE + 1;
7081 temp = (tempbx >> 4) & 0xF0;
7082 tempbx += (tempcx + 1);
7083 temp |= (tempbx & 0x0F);
7092 #ifdef CONFIG_FB_SIS_300
7093 SiS_Group2LCDSpecial(SiS_Pr, ModeNo, crt2crtc);
7099 if(SiS_IsDualLink(SiS_Pr)) bridgeoffset++;
7107 if(SiS_IsDualLink(SiS_Pr)) temp >>= 1;
7110 temp += bridgeoffset;
7115 tempax = tempbx = SiS_Pr->
SiS_HDE;
7122 if(SiS_IsDualLink(SiS_Pr)) {
7128 tempbx += bridgeoffset;
7133 tempcx = (tempcx - tempax) >> 2;
7141 if(SiS_Pr->
SiS_HDE == 1280) tempbx = (tempbx & 0xff00) | 0x47;
7148 if(modeflag & HalfDCLK) tempbx <<= 1;
7149 if(SiS_IsDualLink(SiS_Pr)) tempbx >>= 1;
7150 tempbx += bridgeoffset;
7166 if(modeflag & HalfDCLK) tempbx <<= 1;
7167 if(SiS_IsDualLink(SiS_Pr)) tempbx >>= 1;
7168 tempbx += bridgeoffset;
7173 SiS_SetGroup2_Tail(SiS_Pr, ModeNo);
7175 #ifdef CONFIG_FB_SIS_300
7176 SiS_Set300Part2Regs(SiS_Pr, ModeIdIndex, RefreshRateTableIndex, ModeNo);
7178 #ifdef CONFIG_FB_SIS_315
7188 SiS_SetGroup3(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
7191 const unsigned char *tempdi;
7223 tempdi = SiS_HiTVGroup3_1;
7228 for(i=0; i<=0x3E; i++) {
7247 #ifdef CONFIG_FB_SIS_315
7250 SiS_ShiftXPos(
struct SiS_Private *SiS_Pr,
int shift)
7256 temp = (
unsigned short)((
int)((temp1 | ((temp2 & 0xf0) << 4))) + shift);
7260 temp = (
unsigned short)((
int)(
temp) + shift);
7264 temp = (
unsigned short)((
int)((temp1 | ((temp2 & 0xf0) << 4))) + shift);
7271 SiS_SetGroup4_C_ELV(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
7273 unsigned short temp,
temp1, resinfo = 0;
7282 if(!(ROMAddr[0x61] & 0x04))
return;
7291 if(!(temp & 0x01)) {
7314 if(temp1 == 0x01) temp |= 0x01;
7315 if(temp1 == 0x03) temp |= 0x04;
7328 SiS_ShiftXPos(SiS_Pr, 97);
7330 SiS_ShiftXPos(SiS_Pr, 111);
7333 SiS_ShiftXPos(SiS_Pr, 136);
7345 SiS_SetCRT2VCLK(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
7346 unsigned short RefreshRateTableIndex)
7351 reg1 = SiS_Pr->
CSR2B;
7352 reg2 = SiS_Pr->
CSR2C;
7354 vclkindex =
SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
7375 if(SiS_Pr->
SiS_VBInfo & SetCRT2ToRAMDAC) temp |= 0x20;
7384 if((SiS_CRT2IsLCD(SiS_Pr)) ||
7404 SiS_SetGroup4(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
7405 unsigned short RefreshRateTableIndex)
7407 unsigned short tempax, tempcx, tempbx, modeflag,
temp, resinfo;
7408 unsigned int tempebx, tempeax, templong;
7410 if(ModeNo <= 0x13) {
7437 SiS_SetDualLinkEtc(SiS_Pr);
7447 temp = (tempbx >> 1) & 0x80;
7452 temp |= ((tempcx >> 5) & 0x78);
7455 if(!(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV)) tempcx -= 5;
7458 temp |= ((tempcx >> 8) & 0x07);
7462 if(modeflag & HalfDCLK) tempbx >>= 1;
7463 if(SiS_IsDualLink(SiS_Pr)) tempbx >>= 1;
7467 if(tempbx > 800) temp = 0x60;
7470 if(tempbx > 1024) temp = 0xC0;
7471 else if(tempbx >= 960) temp = 0xA0;
7474 if(tempbx >= 1280) temp = 0x40;
7475 else if(tempbx >= 1024) temp = 0x20;
7478 if(tempbx >= 1024) temp = 0xA0;
7495 if(!(temp & 0xE0)) tempebx >>=1;
7503 if(tempeax <= tempebx) {
7509 tempeax *= (256 * 1024);
7510 templong = tempeax % tempebx;
7512 if(templong) tempeax++;
7514 temp = (
unsigned short)(tempeax & 0x000000FF);
7516 temp = (
unsigned short)((tempeax & 0x0000FF00) >> 8);
7518 temp = (
unsigned short)((tempeax >> 12) & 0x70);
7519 temp |= (tempcx & 0x4F);
7530 if(modeflag & HalfDCLK) tempax >>= 1;
7531 if(SiS_IsDualLink(SiS_Pr)) tempax >>= 1;
7537 if(tempax == 960) tempax *= 25;
7538 else if(tempax == 1024) tempax *= 25;
7550 tempax = (tempax & 0xff00) | 0x20;
7556 temp = ((tempax >> 4) & 0x30) | tempbx;
7560 temp = 0x0036; tempbx = 0xD0;
7562 temp = 0x0026; tempbx = 0xC0;
7576 tempbx = SiS_Pr->
SiS_HT >> 1;
7577 if(SiS_IsDualLink(SiS_Pr)) tempbx >>= 1;
7580 temp = (tempbx >> 5) & 0x38;
7590 SiS_SetDualLinkEtc(SiS_Pr);
7594 SiS_SetCRT2VCLK(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
7602 SiS_SetGroup5(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
7620 SiS_GetLVDSCRT1Ptr(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
7621 unsigned short RefreshRateTableIndex,
unsigned short *ResIndex,
7622 unsigned short *DisplayType)
7624 unsigned short modeflag = 0;
7625 bool checkhd =
true;
7629 if(ModeNo <= 0x13) {
7634 (*ResIndex) = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
7637 (*ResIndex) &= 0x3F;
7641 (*DisplayType) = 80;
7643 (*DisplayType) = 82;
7648 if((*DisplayType) != 84) {
7667 default:
return true;
7671 if(modeflag & HalfDCLK) (*DisplayType)++;
7684 SiS_ModCRT1CRTC(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
7685 unsigned short RefreshRateTableIndex)
7687 unsigned short tempah,
i, modeflag,
j, ResIndex, DisplayType;
7689 static const unsigned short CRIdx[] = {
7690 0x00, 0x02, 0x03, 0x04, 0x05, 0x06,
7691 0x07, 0x10, 0x11, 0x15, 0x16
7714 if(!(SiS_GetLVDSCRT1Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex,
7715 &ResIndex, &DisplayType))) {
7719 switch(DisplayType) {
7728 case 26: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_1;
break;
7729 case 27: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_1_H;
break;
7730 case 28: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_2;
break;
7731 case 29: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_2_H;
break;
7744 for(i = 0; i <= 10; i++) {
7745 tempah = (LVDSCRT1Ptr + ResIndex)->
CR[i];
7749 for(i = 0x0A, j = 11; i <= 0x0C; i++, j++) {
7750 tempah = (LVDSCRT1Ptr + ResIndex)->
CR[j];
7754 tempah = (LVDSCRT1Ptr + ResIndex)->
CR[14] & 0xE0;
7757 if(ModeNo <= 0x13) modeflag = SiS_Pr->
SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
7760 tempah = ((LVDSCRT1Ptr + ResIndex)->
CR[14] & 0x01) << 5;
7761 if(modeflag & DoubleScanMode) tempah |= 0x80;
7776 SiS_SetCRT2ECLK(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
7777 unsigned short RefreshRateTableIndex)
7780 unsigned short clkbase, vclkindex = 0;
7781 unsigned char sr2b, sr2c;
7785 if(SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK == 2) {
7786 RefreshRateTableIndex--;
7789 RefreshRateTableIndex);
7793 RefreshRateTableIndex);
7801 if(ROMAddr[0x220] & 0x01) {
7802 sr2b = ROMAddr[0x227];
7803 sr2c = ROMAddr[0x228];
7831 SiS_SetCHTVReg(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
7832 unsigned short RefreshRateTableIndex)
7834 unsigned short TVType, resindex;
7840 resindex = SiS_Pr->
SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
7876 #ifdef CONFIG_FB_SIS_300
7881 if (resindex > 5)
return;
7917 SiS_SetCH70xx(SiS_Pr,0x3d,0x00);
7936 if(resindex == 0x04) {
7939 }
else if(resindex == 0x05) {
7952 if(resindex == 0x04) {
7955 }
else if(resindex == 0x05) {
7974 if(resindex == 0x04) {
7989 #ifdef CONFIG_FB_SIS_315
7991 unsigned short temp;
7994 if (resindex > 6)
return;
7996 temp = CHTVRegData[resindex].
Reg[0];
8007 temp = CHTVRegData[resindex].
Reg[7];
8040 #ifdef CONFIG_FB_SIS_315
8045 unsigned short temp;
8062 unsigned short temp;
8073 SiS_ChrontelPowerSequencing(
struct SiS_Private *SiS_Pr)
8075 static const unsigned char regtable[] = { 0x67, 0x68, 0x69, 0x6a, 0x6b };
8076 static const unsigned char table1024_740[] = { 0x01, 0x02, 0x01, 0x01, 0x01 };
8077 static const unsigned char table1400_740[] = { 0x01, 0x6e, 0x01, 0x01, 0x01 };
8078 static const unsigned char asus1024_740[] = { 0x19, 0x6e, 0x01, 0x19, 0x09 };
8079 static const unsigned char asus1400_740[] = { 0x19, 0x6e, 0x01, 0x19, 0x09 };
8080 static const unsigned char table1024_650[] = { 0x01, 0x02, 0x01, 0x01, 0x02 };
8081 static const unsigned char table1400_650[] = { 0x01, 0x02, 0x01, 0x01, 0x02 };
8082 const unsigned char *tableptr =
NULL;
8090 else tableptr = table1024_740;
8095 else tableptr = table1400_740;
8099 tableptr = table1024_650;
8103 tableptr = table1400_650;
8107 for(i=0; i<5; i++) {
8115 const unsigned char *tableptr =
NULL;
8116 unsigned short tempbh;
8118 static const unsigned char regtable[] = {
8119 0x1c, 0x5f, 0x64, 0x6f, 0x70, 0x71,
8120 0x72, 0x73, 0x74, 0x76, 0x78, 0x7d, 0x66
8122 static const unsigned char table1024_740[] = {
8123 0x60, 0x02, 0x00, 0x07, 0x40, 0xed,
8124 0xa3, 0xc8, 0xc7, 0xac, 0xe0, 0x02, 0x44
8126 static const unsigned char table1280_740[] = {
8127 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,
8128 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02, 0x44
8130 static const unsigned char table1400_740[] = {
8131 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,
8132 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02, 0x44
8134 static const unsigned char table1600_740[] = {
8135 0x60, 0x04, 0x11, 0x00, 0x40, 0xe3,
8136 0xad, 0xde, 0xf6, 0xac, 0x60, 0x1a, 0x44
8138 static const unsigned char table1024_650[] = {
8139 0x60, 0x02, 0x00, 0x07, 0x40, 0xed,
8140 0xa3, 0xc8, 0xc7, 0xac, 0x60, 0x02
8142 static const unsigned char table1280_650[] = {
8143 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,
8144 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02
8146 static const unsigned char table1400_650[] = {
8147 0x60, 0x03, 0x11, 0x00, 0x40, 0xef,
8148 0xad, 0xdb, 0xf6, 0xac, 0x60, 0x02
8150 static const unsigned char table1600_650[] = {
8151 0x60, 0x04, 0x11, 0x00, 0x40, 0xe3,
8152 0xad, 0xde, 0xf6, 0xac, 0x60, 0x1a
8170 if((tempbh == 0xf6) || (tempbh == 0xc7)) {
8172 if(tempbh == 0xc8) {
8174 }
else if(tempbh == 0xdb) {
8177 }
else if(tempbh == 0xde) {
8185 for(i = 0; i < tempbh; i++) {
8188 SiS_ChrontelPowerSequencing(SiS_Pr);
8208 SiS_ChrontelResetVSync(
struct SiS_Private *SiS_Pr)
8217 SiS_LongDelay(SiS_Pr, 3);
8227 unsigned short temp;
8235 if(SiS_IsYPbPr(SiS_Pr)) {
8241 if(SiS_IsChScart(SiS_Pr)) {
8248 SiS_ChrontelResetVSync(SiS_Pr);
8253 if(SiS_IsYPbPr(SiS_Pr)) {
8261 SiS_LongDelay(SiS_Pr, 2);
8272 unsigned short temp;
8277 SiS_LongDelay(SiS_Pr, 1);
8278 SiS_GenericDelay(SiS_Pr, 5887);
8282 SiS_LongDelay(SiS_Pr, 2);
8294 unsigned short temp;
8302 if(SiS_WeHaveBacklightCtrl(SiS_Pr)) {
8309 SiS_LongDelay(SiS_Pr, 1);
8312 if(SiS_WeHaveBacklightCtrl(SiS_Pr)) {
8313 SiS_ChrontelResetVSync(SiS_Pr);
8331 SiS_SetCH701xForLCD(SiS_Pr);
8338 SiS_LongDelay(SiS_Pr, 1);
8344 SiS_ChrontelInitTVVSync(
struct SiS_Private *SiS_Pr)
8346 unsigned short temp;
8350 if(SiS_WeHaveBacklightCtrl(SiS_Pr)) {
8351 SiS_ChrontelResetVSync(SiS_Pr);
8363 SiS_LongDelay(SiS_Pr, 3);
8373 SiS_ChrontelDoSomething3(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo)
8386 SiS_LongDelay(SiS_Pr, 1);
8387 SiS_GenericDelay(SiS_Pr, 5887);
8403 if(SiS_WeHaveBacklightCtrl(SiS_Pr)) {
8404 SiS_GenericDelay(SiS_Pr, 1023);
8406 SiS_GenericDelay(SiS_Pr, 767);
8410 SiS_GenericDelay(SiS_Pr, 767);
8418 SiS_LongDelay(SiS_Pr, 1);
8424 SiS_ChrontelDoSomething2(
struct SiS_Private *SiS_Pr)
8426 unsigned short temp;
8428 SiS_LongDelay(SiS_Pr, 1);
8433 if(temp == 0x04)
break;
8440 SiS_SetCH701xForLCD(SiS_Pr);
8445 SiS_LongDelay(SiS_Pr, 2);
8454 SiS_LongDelay(SiS_Pr, 2);
8461 SiS_ChrontelDoSomething1(
struct SiS_Private *SiS_Pr)
8463 unsigned short temp;
8488 SiS_LongDelay(SiS_Pr, 1);
8490 SiS_ChrontelResetDB(SiS_Pr);
8491 SiS_ChrontelDoSomething2(SiS_Pr);
8492 SiS_ChrontelDoSomething3(SiS_Pr, 0);
8496 SiS_ChrontelResetDB(SiS_Pr);
8497 SiS_ChrontelDoSomething2(SiS_Pr);
8498 SiS_ChrontelDoSomething3(SiS_Pr, 0);
8504 SiS_ChrontelResetDB(SiS_Pr);
8505 SiS_ChrontelDoSomething2(SiS_Pr);
8507 SiS_ChrontelDoSomething3(SiS_Pr,temp);
8522 #ifdef CONFIG_FB_SIS_300
8525 unsigned short ModeIdIndex, RefreshRateTableIndex;
8540 RefreshRateTableIndex =
SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex);
8542 SiS_SaveCRT2Info(SiS_Pr,ModeNo);
8549 SiS_SetCRT2ModeRegs(SiS_Pr, ModeNo, ModeIdIndex);
8553 SiS_LockCRT2(SiS_Pr);
8558 SiS_GetCRT2Data(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8565 SiS_GetLVDSDesData(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8569 SiS_SetGroup1(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8576 SiS_SetGroup2(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8577 #ifdef CONFIG_FB_SIS_315
8578 SiS_SetGroup2_C_ELV(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8580 SiS_SetGroup3(SiS_Pr, ModeNo, ModeIdIndex);
8581 SiS_SetGroup4(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8582 #ifdef CONFIG_FB_SIS_315
8583 SiS_SetGroup4_C_ELV(SiS_Pr, ModeNo, ModeIdIndex);
8585 SiS_SetGroup5(SiS_Pr, ModeNo, ModeIdIndex);
8587 SiS_SetCRT2Sync(SiS_Pr, ModeNo, RefreshRateTableIndex);
8594 SiS_ModCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8597 SiS_SetCRT2ECLK(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8603 SiS_SetCRT2Sync(SiS_Pr, ModeNo, RefreshRateTableIndex);
8605 SiS_ModCRT1CRTC(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex);
8607 SiS_SetCRT2ECLK(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex);
8613 #ifdef CONFIG_FB_SIS_315
8614 SiS_SetCH701xForLCD(SiS_Pr);
8619 SiS_SetCHTVReg(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex);
8626 #ifdef CONFIG_FB_SIS_300
8631 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) {
8632 SiS_OEM300Setting(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8635 SiS_OEM300Setting(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8641 SetOEMLCDData2(SiS_Pr, ModeNo, ModeIdIndex,RefreshRateTableIndex);
8649 #ifdef CONFIG_FB_SIS_315
8653 SiS_FinalizeLCD(SiS_Pr, ModeNo, ModeIdIndex);
8654 SiS_OEM310Setting(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8656 SiS_OEM661Setting(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8664 SiS_EnableBridge(SiS_Pr);
8672 SiS_SetRegSR11ANDOR(SiS_Pr,0xFF,0x0C);
8680 SiS_LockCRT2(SiS_Pr);
8698 SiS_WaitVBRetrace(SiS_Pr);
8728 #ifdef CONFIG_FB_SIS_300
8729 static unsigned char *
8730 SiS_SetTrumpBlockLoop(
struct SiS_Private *SiS_Pr,
unsigned char *dataptr)
8733 unsigned short tempah,
temp;
8734 unsigned char *mydataptr;
8736 for(i=0; i<20; i++) {
8737 mydataptr = dataptr;
8739 if(!num)
return mydataptr;
8741 SiS_SetStop(SiS_Pr);
8744 if(SiS_SetStart(SiS_Pr))
continue;
8746 temp = SiS_WriteDDC2Data(SiS_Pr,tempah);
8748 tempah = *mydataptr++;
8749 temp = SiS_WriteDDC2Data(SiS_Pr,tempah);
8751 for(j=0; j<num; j++) {
8752 tempah = *mydataptr++;
8753 temp = SiS_WriteDDC2Data(SiS_Pr,tempah);
8757 if(SiS_SetStop(SiS_Pr))
continue;
8764 SiS_SetTrumpionBlock(
struct SiS_Private *SiS_Pr,
unsigned char *dataptr)
8770 SiS_SetupDDCN(SiS_Pr);
8772 SiS_SetSwitchDDC2(SiS_Pr);
8775 dataptr = SiS_SetTrumpBlockLoop(SiS_Pr, dataptr);
8776 if(!dataptr)
return false;
8790 SiS_SetChReg(
struct SiS_Private *SiS_Pr,
unsigned short reg,
unsigned char val,
unsigned short myor)
8792 unsigned short temp,
i;
8794 for(i=0; i<20; i++) {
8796 SiS_SetStop(SiS_Pr);
8799 if(SiS_SetStart(SiS_Pr))
continue;
8802 temp = SiS_WriteDDC2Data(SiS_Pr, (reg | myor));
8804 temp = SiS_WriteDDC2Data(SiS_Pr, val);
8806 if(SiS_SetStop(SiS_Pr))
continue;
8825 SiS_SetupDDCN(SiS_Pr);
8828 if( (!(SiS_SetChReg(SiS_Pr, reg, val, 0x80))) &&
8833 SiS_SetupDDCN(SiS_Pr);
8835 SiS_SetChReg(SiS_Pr, reg, val, 0x80);
8847 SiS_SetupDDCN(SiS_Pr);
8849 SiS_SetChReg(SiS_Pr, reg, val, 0);
8854 SiS_SetCH70xx(
struct SiS_Private *SiS_Pr,
unsigned short reg,
unsigned char val)
8862 static unsigned short
8863 SiS_GetChReg(
struct SiS_Private *SiS_Pr,
unsigned short myor)
8865 unsigned short tempah,
temp,
i;
8867 for(i=0; i<20; i++) {
8869 SiS_SetStop(SiS_Pr);
8872 if(SiS_SetStart(SiS_Pr))
continue;
8877 if (SiS_SetStart(SiS_Pr))
continue;
8880 tempah = SiS_ReadDDC2Data(SiS_Pr);
8881 if(SiS_SetStop(SiS_Pr))
continue;
8903 SiS_SetupDDCN(SiS_Pr);
8908 if( ((result = SiS_GetChReg(SiS_Pr,0x80)) == 0xFFFF) &&
8914 SiS_SetupDDCN(SiS_Pr);
8916 result = SiS_GetChReg(SiS_Pr,0x80);
8929 SiS_SetupDDCN(SiS_Pr);
8934 return SiS_GetChReg(SiS_Pr,0);
8941 SiS_GetCH70xx(
struct SiS_Private *SiS_Pr,
unsigned short tempbx)
8951 unsigned char myor,
unsigned short myand)
8953 unsigned short tempbl;
8955 tempbl = (SiS_GetCH70xx(SiS_Pr, (reg & 0xFF)) & myand) | myor;
8956 SiS_SetCH70xx(SiS_Pr, reg, tempbl);
8962 SiS_InitDDCRegs(
struct SiS_Private *SiS_Pr,
unsigned int VBFlags,
int VGAEngine,
8963 unsigned short adaptnum,
unsigned short DDCdatatype,
bool checkcr32,
8964 unsigned int VBFlags2)
8966 unsigned char ddcdtype[] = { 0xa0, 0xa0, 0xa0, 0xa2, 0xa6 };
8967 unsigned char flag, cr32;
8968 unsigned short temp = 0, myadaptnum = adaptnum;
8972 if((VBFlags2 &
VB2_30xBDH) && (adaptnum == 1))
return 0xFFFF;
8989 if(myadaptnum == 0) {
8990 if(!(cr32 & 0x20)) {
8992 if(!(cr32 & 0x10)) {
8994 if(!(cr32 & 0x08)) {
9003 if(VGAEngine == SIS_300_VGA) {
9005 if(myadaptnum != 0) {
9007 if(VBFlags2 & VB2_SISBRIDGE) {
9014 if((cr32 & 0x80) && (checkcr32)) {
9015 if(myadaptnum >= 1) {
9016 if(!(cr32 & 0x08)) {
9018 if(!(cr32 & 0x10))
return 0xFFFF;
9024 temp = 4 - (myadaptnum * 2);
9031 if(VBFlags2 & VB2_SISBRIDGE) {
9032 if(myadaptnum == 2) {
9037 if(myadaptnum == 1) {
9039 if(VBFlags2 & VB2_SISBRIDGE) {
9045 if((cr32 & 0x80) && (checkcr32)) {
9046 if(myadaptnum >= 1) {
9047 if(!(cr32 & 0x08)) {
9049 if(!(cr32 & 0x10))
return 0xFFFF;
9055 if(myadaptnum == 1) {
9057 if(VBFlags2 &
VB2_LVDS) flag = 0xff;
9066 SiS_SetupDDCN(SiS_Pr);
9071 static unsigned short
9074 if(SiS_SetStart(SiS_Pr))
return 0xFFFF;
9084 static unsigned short
9087 if(SiS_SetStart(SiS_Pr))
return 0xFFFF;
9094 static unsigned short
9097 if(SiS_WriteDABDDC(SiS_Pr)) SiS_WriteDABDDC(SiS_Pr);
9098 if(SiS_PrepareReadDDC(SiS_Pr))
return (SiS_PrepareReadDDC(SiS_Pr));
9103 SiS_SendACK(
struct SiS_Private *SiS_Pr,
unsigned short yesno)
9105 SiS_SetSCLKLow(SiS_Pr);
9117 SiS_SetSCLKHigh(SiS_Pr);
9120 static unsigned short
9124 unsigned short temp, ret=0;
9125 bool failed =
false;
9127 SiS_SetSwitchDDC2(SiS_Pr);
9128 if(SiS_PrepareDDC(SiS_Pr)) {
9129 SiS_SetStop(SiS_Pr);
9135 temp = (
unsigned char)SiS_ReadDDC2Data(SiS_Pr);
9136 SiS_SendACK(SiS_Pr, 0);
9146 temp = (
unsigned char)SiS_ReadDDC2Data(SiS_Pr);
9147 SiS_SendACK(SiS_Pr, 1);
9149 if(temp == value) ret = 0;
9153 if(temp == 0x30) ret = 0;
9157 SiS_SetStop(SiS_Pr);
9165 unsigned short flag;
9169 if(!(SiS_DoProbeDDC(SiS_Pr))) flag |= 0x02;
9171 if(!(SiS_DoProbeDDC(SiS_Pr))) flag |= 0x08;
9173 if(!(SiS_DoProbeDDC(SiS_Pr))) flag |= 0x10;
9174 if(!(flag & 0x1a)) flag = 0;
9180 SiS_ReadDDC(
struct SiS_Private *SiS_Pr,
unsigned short DDCdatatype,
unsigned char *
buffer)
9183 unsigned char chksum,gotcha;
9185 if(DDCdatatype > 4)
return 0xFFFF;
9188 SiS_SetSwitchDDC2(SiS_Pr);
9189 if(!(SiS_PrepareDDC(SiS_Pr))) {
9191 if(DDCdatatype != 1) length = 255;
9194 for(i=0; i<
length; i++) {
9195 buffer[
i] = (
unsigned char)SiS_ReadDDC2Data(SiS_Pr);
9196 chksum += buffer[
i];
9197 gotcha |= buffer[
i];
9198 SiS_SendACK(SiS_Pr, 0);
9200 buffer[
i] = (
unsigned char)SiS_ReadDDC2Data(SiS_Pr);
9201 chksum += buffer[
i];
9202 SiS_SendACK(SiS_Pr, 1);
9203 if(gotcha) flag = (
unsigned short)chksum;
9208 SiS_SetStop(SiS_Pr);
9235 unsigned short adaptnum,
unsigned short DDCdatatype,
unsigned char *buffer,
9236 unsigned int VBFlags2)
9238 unsigned char sr1f, cr17=1;
9250 if(SiS_InitDDCRegs(SiS_Pr, VBFlags, VGAEngine, adaptnum, DDCdatatype,
false, VBFlags2) == 0xFFFF)
9255 if(VGAEngine == SIS_300_VGA) {
9263 if((sr1f) || (!cr17)) {
9270 if(DDCdatatype == 0) {
9271 result = SiS_ProbeDDC(SiS_Pr);
9273 result = SiS_ReadDDC(SiS_Pr, DDCdatatype, buffer);
9274 if((!result) && (DDCdatatype == 1)) {
9275 if((buffer[0] == 0x00) && (buffer[1] == 0xff) &&
9276 (buffer[2] == 0xff) && (buffer[3] == 0xff) &&
9277 (buffer[4] == 0xff) && (buffer[5] == 0xff) &&
9278 (buffer[6] == 0xff) && (buffer[7] == 0x00) &&
9279 (buffer[0x12] == 1)) {
9282 if(!(buffer[0x14] & 0x80)) result = 0xFFFE;
9284 if(buffer[0x14] & 0x80) result = 0xFFFE;
9291 if(VGAEngine == SIS_300_VGA) {
9302 SiS_SetSCLKHigh(SiS_Pr);
9305 SiS_SetSCLKLow(SiS_Pr);
9318 static unsigned short
9321 if(SiS_SetSCLKLow(SiS_Pr))
return 0xFFFF;
9326 if(SiS_SetSCLKHigh(SiS_Pr))
return 0xFFFF;
9331 if(SiS_SetSCLKHigh(SiS_Pr))
return 0xFFFF;
9337 static unsigned short
9340 if(SiS_SetSCLKLow(SiS_Pr))
return 0xFFFF;
9345 if(SiS_SetSCLKHigh(SiS_Pr))
return 0xFFFF;
9350 if(SiS_SetSCLKHigh(SiS_Pr))
return 0xFFFF;
9355 static unsigned short
9356 SiS_WriteDDC2Data(
struct SiS_Private *SiS_Pr,
unsigned short tempax)
9361 for(i = 0; i < 8; i++) {
9362 SiS_SetSCLKLow(SiS_Pr);
9374 SiS_SetSCLKHigh(SiS_Pr);
9377 temp = SiS_CheckACK(SiS_Pr);
9381 static unsigned short
9384 unsigned short i,
temp, getdata;
9387 for(i = 0; i < 8; i++) {
9389 SiS_SetSCLKLow(SiS_Pr);
9394 SiS_SetSCLKHigh(SiS_Pr);
9401 static unsigned short
9412 static unsigned short
9415 unsigned short temp, watchdog=1000;
9423 }
while((!(temp & SiS_Pr->
SiS_DDC_Clk)) && --watchdog);
9433 static unsigned short
9436 unsigned short tempah;
9438 SiS_SetSCLKLow(SiS_Pr);
9443 SiS_SetSCLKHigh(SiS_Pr);
9445 SiS_SetSCLKLow(SiS_Pr);
9455 #ifdef CONFIG_FB_SIS_315
9457 static unsigned short
9461 unsigned short romptr;
9475 static unsigned short
9479 unsigned short romptr;
9493 static unsigned short
9497 unsigned short romptr;
9511 static unsigned short
9514 unsigned short index;
9517 if(!(SiS_IsNotM650orLater(SiS_Pr))) {
9528 index = SiS_GetBIOSLCDResInfo(SiS_Pr) & 0x0F;
9543 static unsigned short
9546 unsigned short index;
9548 index = ((SiS_GetBIOSLCDResInfo(SiS_Pr) & 0x0F) - 1) * 3;
9554 static unsigned short
9557 unsigned short index;
9576 GetOEMTVPtr661_2_GEN(
struct SiS_Private *SiS_Pr,
int addme)
9578 unsigned short index = 0, temp = 0;
9598 return (
unsigned int)(index | (temp << 16));
9604 return (GetOEMTVPtr661_2_GEN(SiS_Pr, 8));
9611 return (GetOEMTVPtr661_2_GEN(SiS_Pr, 6));
9639 SetDelayComp(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo)
9642 unsigned short delay=0,
index,myindex,
temp,romptr=0;
9643 bool dochiptest =
true;
9656 romptr = GetRAMDACromptr(SiS_Pr);
9658 if(romptr) delay = ROMAddr[romptr];
9678 bool gotitfrompci =
false;
9683 if(SiS_Pr->
PDC != -1) {
9689 if(SiS_Pr->
PDCA != -1) {
9730 gotitfrompci =
true;
9737 gotitfrompci =
true;
9744 gotitfrompci =
true;
9757 index = GetLCDPtrIndexBIOS(SiS_Pr);
9758 myindex = GetLCDPtrIndex(SiS_Pr);
9762 if(SiS_IsNotM650orLater(SiS_Pr)) {
9771 delay = ROMAddr[(romptr +
index)];
9773 delay = SiS310_LCDDelayCompensation_650301LV[myindex];
9778 delay = SiS310_LCDDelayCompensation_651301LV[myindex];
9780 delay = SiS310_LCDDelayCompensation_651302LV[myindex];
9790 ((romptr = GetLCDromptr(SiS_Pr)))) {
9794 delay = ROMAddr[(romptr +
index)];
9803 delay = SiS310_LCDDelayCompensation_301[myindex];
9806 else if(SiS_Pr->
ChipType <=
SIS_315PRO) delay = SiS310_LCDDelayCompensation_3xx301LV[myindex];
9807 else delay = SiS310_LCDDelayCompensation_650301LV[myindex];
9814 else delay = SiS310_LCDDelayCompensation_3xx301B[myindex];
9826 }
else if(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV) {
9828 index = GetTVPtrIndex(SiS_Pr);
9832 if(SiS_IsNotM650orLater(SiS_Pr)) {
9841 delay = ROMAddr[romptr +
index];
9845 delay = SiS310_TVDelayCompensation_301B[
index];
9865 delay = SiS310_TVDelayCompensation_651301LV[
index];
9867 delay = SiS310_TVDelayCompensation_651302LV[
index];
9874 romptr = GetTVromptr(SiS_Pr);
9876 delay = ROMAddr[romptr +
index];
9880 delay = SiS310_TVDelayCompensation_LVDS[
index];
9884 delay = SiS310_TVDelayCompensation_301[
index];
9887 delay = SiS310_TVDelayCompensation_740301B[
index];
9890 delay = SiS310_TVDelayCompensation_301B[
index];
9897 if(SiS_LCDAEnabled(SiS_Pr)) {
9914 }
else if(temp == 6) {
9917 }
else if(temp > 7) {
9946 SetAntiFlicker(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
9958 temp = GetTVPtrIndex(SiS_Pr);
9964 temp1 = GetOEMTVPtr661(SiS_Pr);
9979 temp = ROMAddr[romptr + temp1 +
index];
9981 temp = SiS310_TVAntiFlick1[
temp][
index];
9989 SetEdgeEnhance(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
9994 temp = temp1 = GetTVPtrIndex(SiS_Pr) >> 1;
10007 temp1 = GetOEMTVPtr661(SiS_Pr);
10018 temp = ROMAddr[romptr + temp1 +
index];
10027 SetYFilter(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
10031 if(ModeNo <= 0x13) {
10037 temp = GetTVPtrIndex(SiS_Pr) >> 1;
10045 for(i=0x35, j=0; i<=0x38; i++, j++) {
10048 for(i=0x48; i<=0x4A; i++, j++) {
10052 for(i=0x35, j=0; i<=0x38; i++, j++) {
10059 SetPhaseIncr(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
10063 unsigned int lindex;
10065 if(!(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV))
return;
10071 lindex = GetOEMTVPtr661_2_OLD(SiS_Pr) & 0xffff;
10073 for(j=0, i=0x31; i<=0x34; i++, j++) {
10088 temp = GetTVPtrIndex(SiS_Pr);
10111 romptr += (temp << 2);
10112 for(j=0, i=0x31; i<=0x34; i++, j++) {
10118 for(j=0, i=0x31; i<=0x34; i++, j++) {
10147 SetDelayComp661(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
10148 unsigned short ModeIdIndex,
unsigned short RTI)
10150 unsigned short delay = 0, romptr = 0,
index, lcdpdcindex;
10160 if((SiS_Pr->
SiS_VBInfo & SetCRT2ToRAMDAC) ||
10166 }
else if(ModeNo > 0x13) {
10170 if(index < 25) index = 25;
10171 index = ((index / 25) - 1) << 1;
10176 delay = ROMAddr[romptr +
index];
10177 if(SiS_Pr->
SiS_VBInfo & (SetCRT2ToRAMDAC | SetCRT2ToLCD)) {
10191 else if(ModeNo <= 0x13) delay = 0x04;
10192 else delay = (SiS_Pr->
SiS_RefIndex[RTI].Ext_PDC >> 4);
10193 delay |= (delay << 8);
10202 index = GetTVPtrIndex(SiS_Pr);
10204 delay = (ROMAddr[romptr +
index] & 0x0f) << 1;
10205 delay |= (delay << 8);
10224 }
else if(SiS_Pr->
SiS_VBInfo & SetCRT2ToTV) {
10228 index = GetOEMTVPtr661(SiS_Pr);
10232 delay = ROMAddr[romptr +
index];
10235 if(index > 3) delay = 0;
10243 ((romptr = GetLCDStructPtr661_2(SiS_Pr))) ) {
10248 delay = ROMAddr[romptr + lcdpdcindex + 1];
10249 delay |= (ROMAddr[romptr + lcdpdcindex] << 8);
10285 if((SiS_Pr->
SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->
PDC != -1)) {
10286 delay = SiS_Pr->
PDC & 0x1f;
10289 delay = (SiS_Pr->
PDCA & 0x1f) << 8;
10307 SetCRT2SyncDither661(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short RTI)
10309 unsigned short infoflag;
10310 unsigned char temp;
10314 if(ModeNo <= 0x13) {
10329 temp = (infoflag >> 6) | 0x0c;
10361 if(SiS_Pr->
LVDSHL != -1) {
10368 if((romptr = GetLCDStructPtr661_2(SiS_Pr))) {
10370 temp1 = (ROMAddr[romptr] & 0x03) | 0x0c;
10372 if(SiS_Pr->
LVDSHL != -1) {
10379 temp1 = (ROMAddr[romptr + 1] & 0x80) >> 1;
10388 SiS_OEM310Setting(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
unsigned short RRTI)
10391 SetDelayComp661(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
10393 SetCRT2SyncDither661(SiS_Pr, ModeNo, RRTI);
10394 SetPanelParms661(SiS_Pr);
10397 SetDelayComp(SiS_Pr,ModeNo);
10401 SetAntiFlicker(SiS_Pr,ModeNo,ModeIdIndex);
10402 SetPhaseIncr(SiS_Pr,ModeNo,ModeIdIndex);
10403 SetYFilter(SiS_Pr,ModeNo,ModeIdIndex);
10405 SetEdgeEnhance(SiS_Pr,ModeNo,ModeIdIndex);
10411 SiS_OEM661Setting(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
10412 unsigned short ModeIdIndex,
unsigned short RRTI)
10416 SetDelayComp661(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
10419 SetCRT2SyncDither661(SiS_Pr, ModeNo, RRTI);
10420 SetPanelParms661(SiS_Pr);
10424 SetPhaseIncr(SiS_Pr, ModeNo, ModeIdIndex);
10425 SetYFilter(SiS_Pr, ModeNo, ModeIdIndex);
10426 SetAntiFlicker(SiS_Pr, ModeNo, ModeIdIndex);
10428 SetEdgeEnhance(SiS_Pr, ModeNo, ModeIdIndex);
10442 SiS_FinalizeLCD(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
10444 unsigned short tempcl,tempch,tempbl,tempbh,tempbx,tempax,
temp;
10445 unsigned short resinfo,modeflag;
10451 if(SiS_Pr->
LVDSHL != -1) {
10467 if(ModeNo <= 0x13) {
10488 if(SiS_Pr->
LVDSHL == -1) {
10498 if(SiS_Pr->
LVDSHL == -1) {
10526 if(SiS_Pr->
LVDSHL == -1) {
10536 if(tempch == 0x03) {
10555 if(ModeNo <= 0x13) {
10557 if((resinfo == 0) || (resinfo == 2))
return;
10559 if((resinfo == 1) || (resinfo == 3))
return;
10567 temp = tempbx & 0xff;
10569 temp = (tempbx >> 8) & 0x03;
10573 }
else if(ModeNo <= 0x13) {
10580 if(!(modeflag & HalfDCLK)) {
10587 if(ModeNo == 0x12) {
10615 tempbx = (tempbh << 8) | tempbl;
10621 if(tempbx > 770) tempbx = 770;
10631 temp = tempbx & 0xff;
10633 temp = ((tempbx & 0xff00) >> 4) | tempcl;
10643 #ifdef CONFIG_FB_SIS_300
10646 SetOEMLCDData2(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
10647 unsigned short RefTabIndex)
10649 unsigned short crt2crtc=0, modeflag, myindex=0;
10650 unsigned char temp;
10653 if(ModeNo <= 0x13) {
10658 crt2crtc = SiS_Pr->
SiS_RefIndex[RefTabIndex].Ext_CRT2CRTC;
10668 if(modeflag & HalfDCLK) myindex = 1;
10671 for(i=0; i<7; i++) {
10672 if(barco_p1[myindex][crt2crtc][i][0]) {
10674 barco_p1[myindex][crt2crtc][i][0],
10675 barco_p1[myindex][crt2crtc][i][2],
10676 barco_p1[myindex][crt2crtc][i][1]);
10689 static unsigned short
10690 GetOEMLCDPtr(
struct SiS_Private *SiS_Pr,
int Flag)
10693 unsigned short tempbx=0,romptr=0;
10694 static const unsigned char customtable300[] = {
10695 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
10696 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff
10698 static const unsigned char customtable630[] = {
10699 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
10700 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff
10713 if(ROMAddr[0x235] & 0x80) {
10719 if(tempbx == 0xFF)
return 0xFFFF;
10732 else tempbx = 0xff;
10736 if(tempbx == 0xFF)
return 0xFFFF;
10752 SetOEMLCDDelay(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
10760 if(!(ROMAddr[0x237] & 0x01))
return;
10761 if(!(ROMAddr[0x237] & 0x02))
return;
10772 if(SiS_Pr->
PDC != -1)
return;
10774 temp = GetOEMLCDPtr(SiS_Pr, 0);
10783 romptr += (temp * 2);
10786 temp = ROMAddr[romptr];
10789 temp = SiS300_OEMLCDDelay2[
temp][
index];
10791 temp = SiS300_OEMLCDDelay3[
temp][
index];
10795 if(SiS_Pr->
SiS_UseROM && (ROMAddr[0x235] & 0x80)) {
10797 romptr += (temp * 2);
10800 temp = ROMAddr[romptr];
10802 temp = SiS300_OEMLCDDelay5[
temp][
index];
10806 romptr = ROMAddr[0x249] | (ROMAddr[0x24a] << 8);
10808 romptr += (temp * 2);
10811 temp = ROMAddr[romptr];
10813 temp = SiS300_OEMLCDDelay4[
temp][
index];
10816 temp = SiS300_OEMLCDDelay4[
temp][
index];
10825 SetOEMLCDData(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
10832 if(!(ROMAddr[0x237] & 0x01))
return;
10833 if(!(ROMAddr[0x237] & 0x04))
return;
10837 temp = GetOEMLCDPtr(SiS_Pr, 1);
10838 if(temp == 0xFFFF)
return;
10841 for(i=0x14, j=0; i<=0x17; i++, j++) {
10844 SiS_SetRegANDOR(SiS_SiS_Part1Port,0x1a, 0xf8, (SiS300_LCDHData[temp][index][j] & 0x07));
10847 SiS_SetReg(SiS_SiS_Part1Port,0x18, SiS300_LCDVData[temp][index][0]);
10848 SiS_SetRegANDOR(SiS_SiS_Part1Port,0x19, 0xF0, SiS300_LCDVData[temp][index][1]);
10849 SiS_SetRegANDOR(SiS_SiS_Part1Port,0x1A, 0xC7, (SiS300_LCDVData[temp][index][2] & 0x38));
10850 for(i=0x1b, j=3; i<=0x1d; i++, j++) {
10856 static unsigned short
10859 unsigned short index;
10875 SetOEMTVDelay(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
10881 if(!(ROMAddr[0x238] & 0x01))
return;
10882 if(!(ROMAddr[0x238] & 0x02))
return;
10886 temp = GetOEMTVPtr(SiS_Pr);
10891 romptr += (temp * 2);
10894 temp = ROMAddr[romptr];
10897 temp = SiS300_OEMTVDelay301[
temp][
index];
10899 temp = SiS300_OEMTVDelayLVDS[
temp][
index];
10907 SetOEMAntiFlicker(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
10913 if(!(ROMAddr[0x238] & 0x01))
return;
10914 if(!(ROMAddr[0x238] & 0x04))
return;
10918 temp = GetOEMTVPtr(SiS_Pr);
10923 romptr += (temp * 2);
10926 temp = ROMAddr[romptr];
10928 temp = SiS300_OEMTVFlicker[
temp][
index];
10935 SetOEMPhaseIncr(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
10945 if(!(ROMAddr[0x238] & 0x01))
return;
10946 if(!(ROMAddr[0x238] & 0x08))
return;
10950 temp = GetOEMTVPtr(SiS_Pr);
10955 for(i=0x31, j=0; i<=0x34; i++, j++) {
10960 romptr += (temp * 2);
10962 romptr += (index * 4);
10963 for(i=0x31, j=0; i<=0x34; i++, j++) {
10967 for(i=0x31, j=0; i<=0x34; i++, j++) {
10975 SetOEMYFilter(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
10983 if(!(ROMAddr[0x238] & 0x01))
return;
10984 if(!(ROMAddr[0x238] & 0x10))
return;
10988 temp = GetOEMTVPtr(SiS_Pr);
10997 for(i=0x35, j=0; i<=0x38; i++, j++) {
11000 for(i=0x48; i<=0x4A; i++, j++) {
11005 romptr += (temp * 2);
11007 romptr += (index * 4);
11008 for(i=0x35, j=0; i<=0x38; i++, j++) {
11012 for(i=0x35, j=0; i<=0x38; i++, j++) {
11019 static unsigned short
11020 SiS_SearchVBModeID(
struct SiS_Private *SiS_Pr,
unsigned short *ModeNo)
11022 unsigned short ModeIdIndex;
11025 if(*ModeNo <= 5) *ModeNo |= 1;
11027 for(ModeIdIndex=0; ; ModeIdIndex++) {
11032 if(*ModeNo != 0x07) {
11033 if(*ModeNo > 0x03)
return ModeIdIndex;
11034 if(VGAINFO & 0x80)
return ModeIdIndex;
11038 if(VGAINFO & 0x10) ModeIdIndex++;
11040 return ModeIdIndex;
11044 SiS_OEM300Setting(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex,
11045 unsigned short RefTableIndex)
11047 unsigned short OEMModeIdIndex = 0;
11050 OEMModeIdIndex = SiS_SearchVBModeID(SiS_Pr,&ModeNo);
11051 if(!(OEMModeIdIndex))
return;
11055 SetOEMLCDDelay(SiS_Pr, ModeNo, OEMModeIdIndex);
11057 SetOEMLCDData(SiS_Pr, ModeNo, OEMModeIdIndex);
11062 SetOEMTVDelay(SiS_Pr, ModeNo,OEMModeIdIndex);
11064 SetOEMAntiFlicker(SiS_Pr, ModeNo, OEMModeIdIndex);
11065 SetOEMPhaseIncr(SiS_Pr, ModeNo, OEMModeIdIndex);
11066 SetOEMYFilter(SiS_Pr, ModeNo, OEMModeIdIndex);