Linux Kernel
3.7.1
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#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/traps.h>
Go to the source code of this file.
Macros | |
#define | MCFSIM_ICR_LEVEL(l) ((l)<<3) /* Level l intr */ |
#define | MCFSIM_ICR_PRI(p) (p) /* Priority p intr */ |
#define | EINT0 64 /* Is not actually used, but spot reserved for it */ |
#define | EINT1 65 /* EDGE Port interrupt 1 */ |
#define | EINT7 71 /* EDGE Port interrupt 7 */ |
#define | NR_VECS 64 |
Functions | |
void __init | init_IRQ (void) |
The hexagon core comes with a first-level interrupt controller with 32 total possible interrupts. When the core is embedded into different systems/platforms, it is typically wrapped by macro cells that provide one or more second-level interrupt controllers that are cascaded into one or more of the first-level interrupts handled here. The precise wiring of these other irqs varies from platform to platform, and are set up & configured in the platform-specific files.
The first-level interrupt controller is wrapped by the VM, which virtualizes the interrupt controller for us. It provides a very simple, fast & efficient API, and so the fasteoi handler is appropriate for this case.