Linux Kernel
3.7.1
|
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/workqueue.h>
#include <linux/jiffies.h>
#include <linux/param.h>
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/platform_device.h>
#include <linux/power_supply.h>
#include <asm/intel_scu_ipc.h>
Go to the source code of this file.
Data Structures | |
struct | pmic_power_module_info |
struct | battery_property |
Macros | |
#define | DRIVER_NAME "pmic_battery" |
#define | PMIC_BATT_DRV_INFO_UPDATED 1 |
#define | PMIC_BATT_PRESENT 1 |
#define | PMIC_BATT_NOT_PRESENT 0 |
#define | PMIC_USB_PRESENT PMIC_BATT_PRESENT |
#define | PMIC_USB_NOT_PRESENT PMIC_BATT_NOT_PRESENT |
#define | PMIC_BATT_CHR_SCHRGINT_ADDR 0xD2 |
#define | PMIC_BATT_CHR_SBATOVP_MASK (1 << 1) |
#define | PMIC_BATT_CHR_STEMP_MASK (1 << 2) |
#define | PMIC_BATT_CHR_SCOMP_MASK (1 << 3) |
#define | PMIC_BATT_CHR_SUSBDET_MASK (1 << 4) |
#define | PMIC_BATT_CHR_SBATDET_MASK (1 << 5) |
#define | PMIC_BATT_CHR_SDCLMT_MASK (1 << 6) |
#define | PMIC_BATT_CHR_SUSBOVP_MASK (1 << 7) |
#define | PMIC_BATT_CHR_EXCPT_MASK 0x86 |
#define | PMIC_BATT_ADC_ACCCHRG_MASK (1 << 31) |
#define | PMIC_BATT_ADC_ACCCHRGVAL_MASK 0x7FFFFFFF |
#define | PMIC_BATT_CHR_IPC_FCHRG_SUBID 0x4 |
#define | PMIC_BATT_CHR_IPC_TCHRG_SUBID 0x6 |
#define | IPCMSG_BATTERY 0xEF |
#define | IPC_CMD_CC_WR 0 /* Update coulomb counter value */ |
#define | IPC_CMD_CC_RD 1 /* Read coulomb counter value */ |
#define | IPC_CMD_BATTERY_PROPERTY 2 /* Read Battery property */ |
Functions | |
module_param (debug, int, 0444) | |
MODULE_PARM_DESC (debug,"Flag to enable PMIC Battery debug messages.") | |
module_platform_driver (platform_pmic_battery_driver) | |
MODULE_AUTHOR ("Nithish Mahalingam <[email protected]>") | |
MODULE_DESCRIPTION ("Intel Moorestown PMIC Battery Driver") | |
MODULE_LICENSE ("GPL") | |
#define DRIVER_NAME "pmic_battery" |
Definition at line 39 of file intel_mid_battery.c.
Definition at line 158 of file intel_mid_battery.c.
Definition at line 157 of file intel_mid_battery.c.
Definition at line 156 of file intel_mid_battery.c.
#define IPCMSG_BATTERY 0xEF |
Definition at line 153 of file intel_mid_battery.c.
#define PMIC_BATT_ADC_ACCCHRG_MASK (1 << 31) |
Definition at line 66 of file intel_mid_battery.c.
#define PMIC_BATT_ADC_ACCCHRGVAL_MASK 0x7FFFFFFF |
Definition at line 67 of file intel_mid_battery.c.
#define PMIC_BATT_CHR_EXCPT_MASK 0x86 |
Definition at line 64 of file intel_mid_battery.c.
#define PMIC_BATT_CHR_IPC_FCHRG_SUBID 0x4 |
Definition at line 70 of file intel_mid_battery.c.
#define PMIC_BATT_CHR_IPC_TCHRG_SUBID 0x6 |
Definition at line 71 of file intel_mid_battery.c.
#define PMIC_BATT_CHR_SBATDET_MASK (1 << 5) |
Definition at line 61 of file intel_mid_battery.c.
#define PMIC_BATT_CHR_SBATOVP_MASK (1 << 1) |
Definition at line 57 of file intel_mid_battery.c.
#define PMIC_BATT_CHR_SCHRGINT_ADDR 0xD2 |
Definition at line 56 of file intel_mid_battery.c.
#define PMIC_BATT_CHR_SCOMP_MASK (1 << 3) |
Definition at line 59 of file intel_mid_battery.c.
#define PMIC_BATT_CHR_SDCLMT_MASK (1 << 6) |
Definition at line 62 of file intel_mid_battery.c.
#define PMIC_BATT_CHR_STEMP_MASK (1 << 2) |
Definition at line 58 of file intel_mid_battery.c.
#define PMIC_BATT_CHR_SUSBDET_MASK (1 << 4) |
Definition at line 60 of file intel_mid_battery.c.
#define PMIC_BATT_CHR_SUSBOVP_MASK (1 << 7) |
Definition at line 63 of file intel_mid_battery.c.
#define PMIC_BATT_DRV_INFO_UPDATED 1 |
Definition at line 49 of file intel_mid_battery.c.
#define PMIC_BATT_NOT_PRESENT 0 |
Definition at line 51 of file intel_mid_battery.c.
#define PMIC_BATT_PRESENT 1 |
Definition at line 50 of file intel_mid_battery.c.
#define PMIC_USB_NOT_PRESENT PMIC_BATT_NOT_PRESENT |
Definition at line 53 of file intel_mid_battery.c.
#define PMIC_USB_PRESENT PMIC_BATT_PRESENT |
Definition at line 52 of file intel_mid_battery.c.
enum batt_charge_type |
Definition at line 74 of file intel_mid_battery.c.
enum batt_event |
BATT_EVENT_BATOVP_EXCPT | |
BATT_EVENT_USBOVP_EXCPT | |
BATT_EVENT_TEMP_EXCPT | |
BATT_EVENT_DCLMT_EXCPT | |
BATT_EVENT_EXCPT |
Definition at line 80 of file intel_mid_battery.c.
MODULE_AUTHOR | ( | "Nithish Mahalingam <[email protected]>" | ) |
MODULE_DESCRIPTION | ( | "Intel Moorestown PMIC Battery Driver" | ) |
MODULE_LICENSE | ( | "GPL" | ) |
module_platform_driver | ( | platform_pmic_battery_driver | ) |