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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Macros | |
| #define | IO_INR_SCC0A_TXDMA 31 /* SCC0A transmit page end */ |
| #define | IO_INR_SCC0A_TXERR 30 /* SCC0A transmit memory read error */ |
| #define | IO_INR_SCC0A_RXDMA 29 /* SCC0A receive half page */ |
| #define | IO_INR_SCC0A_RXERR 28 /* SCC0A receive overrun */ |
| #define | IO_INR_ASC_DMA 19 /* ASC buffer pointer loaded */ |
| #define | IO_INR_ASC_ERR 18 /* ASC page overrun */ |
| #define | IO_INR_ASC_MERR 17 /* ASC memory read error */ |
| #define | IO_INR_LANCE_MERR 16 /* LANCE memory read error */ |
| #define | IO_INR_SCC1A_TXDMA 27 /* SCC1A transmit page end */ |
| #define | IO_INR_SCC1A_TXERR 26 /* SCC1A transmit memory read error */ |
| #define | IO_INR_SCC1A_RXDMA 25 /* SCC1A receive half page */ |
| #define | IO_INR_SCC1A_RXERR 24 /* SCC1A receive overrun */ |
| #define | IO_INR_RES_23 23 /* unused */ |
| #define | IO_INR_RES_22 22 /* unused */ |
| #define | IO_INR_RES_21 21 /* unused */ |
| #define | IO_INR_RES_20 20 /* unused */ |
| #define | IO_INR_AB_TXDMA 27 /* ACCESS.bus transmit page end */ |
| #define | IO_INR_AB_TXERR 26 /* ACCESS.bus xmit memory read error */ |
| #define | IO_INR_AB_RXDMA 25 /* ACCESS.bus receive half page */ |
| #define | IO_INR_AB_RXERR 24 /* ACCESS.bus receive overrun */ |
| #define | IO_INR_FLOPPY_ERR 23 /* FDC error */ |
| #define | IO_INR_ISDN_TXDMA 22 /* ISDN xmit buffer pointer loaded */ |
| #define | IO_INR_ISDN_RXDMA 21 /* ISDN recv buffer pointer loaded */ |
| #define | IO_INR_ISDN_ERR 20 /* ISDN memory read/overrun error */ |
| #define | IO_INR_DMA 16 /* first DMA IRQ */ |
| #define | IO_IRQ_BASE 8 /* first IRQ assigned to I/O ASIC */ |
| #define | IO_IRQ_LINES 32 /* number of I/O ASIC interrupts */ |
| #define | IO_IRQ_NR(n) ((n) + IO_IRQ_BASE) |
| #define | IO_IRQ_MASK(n) (1 << (n)) |
| #define | IO_IRQ_ALL 0x0000ffff |
| #define | IO_IRQ_DMA 0xffff0000 |
| #define IO_INR_AB_RXDMA 25 /* ACCESS.bus receive half page */ |
Definition at line 51 of file ioasic_ints.h.
| #define IO_INR_AB_RXERR 24 /* ACCESS.bus receive overrun */ |
Definition at line 52 of file ioasic_ints.h.
| #define IO_INR_AB_TXDMA 27 /* ACCESS.bus transmit page end */ |
Definition at line 49 of file ioasic_ints.h.
| #define IO_INR_AB_TXERR 26 /* ACCESS.bus xmit memory read error */ |
Definition at line 50 of file ioasic_ints.h.
Definition at line 33 of file ioasic_ints.h.
Definition at line 34 of file ioasic_ints.h.
Definition at line 58 of file ioasic_ints.h.
Definition at line 53 of file ioasic_ints.h.
Definition at line 56 of file ioasic_ints.h.
Definition at line 55 of file ioasic_ints.h.
Definition at line 54 of file ioasic_ints.h.
Definition at line 36 of file ioasic_ints.h.
| #define IO_INR_RES_20 20 /* unused */ |
Definition at line 46 of file ioasic_ints.h.
| #define IO_INR_RES_21 21 /* unused */ |
Definition at line 45 of file ioasic_ints.h.
| #define IO_INR_RES_22 22 /* unused */ |
Definition at line 44 of file ioasic_ints.h.
| #define IO_INR_RES_23 23 /* unused */ |
Definition at line 43 of file ioasic_ints.h.
Definition at line 31 of file ioasic_ints.h.
| #define IO_INR_SCC0A_RXERR 28 /* SCC0A receive overrun */ |
Definition at line 32 of file ioasic_ints.h.
Definition at line 29 of file ioasic_ints.h.
Definition at line 30 of file ioasic_ints.h.
Definition at line 41 of file ioasic_ints.h.
| #define IO_INR_SCC1A_RXERR 24 /* SCC1A receive overrun */ |
Definition at line 42 of file ioasic_ints.h.
Definition at line 39 of file ioasic_ints.h.
Definition at line 40 of file ioasic_ints.h.
| #define IO_IRQ_ALL 0x0000ffff |
Definition at line 71 of file ioasic_ints.h.
Definition at line 66 of file ioasic_ints.h.
| #define IO_IRQ_DMA 0xffff0000 |
Definition at line 72 of file ioasic_ints.h.
Definition at line 67 of file ioasic_ints.h.
Definition at line 70 of file ioasic_ints.h.
| #define IO_IRQ_NR | ( | n | ) | ((n) + IO_IRQ_BASE) |
Definition at line 69 of file ioasic_ints.h.
1.8.2