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Macros
iomux-mx50.h File Reference
#include <mach/iomux-v3.h>

Go to the source code of this file.

Macros

#define MX50_ELCDIF_PAD_CTRL   (PAD_CTL_PKE | PAD_CTL_DSE_HIGH)
 
#define MX50_SD_PAD_CTRL
 
#define MX50_UART_PAD_CTRL   (PAD_CTL_DSE_HIGH | PAD_CTL_PKE)
 
#define MX50_I2C_PAD_CTRL
 
#define MX50_USB_PAD_CTRL
 
#define MX50_FEC_PAD_CTRL
 
#define MX50_OWIRE_PAD_CTRL
 
#define MX50_KEYPAD_CTRL
 
#define MX50_CSPI_SS_PAD
 
#define MX50_PAD_KEY_COL0__KEY_COL0   IOMUX_PAD(0x2CC, 0x20, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_COL0__GPIO_4_0   IOMUX_PAD(0x2CC, 0x20, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_COL0__NANDF_CLE   IOMUX_PAD(0x2CC, 0x20, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_KEY_ROW0__KEY_ROW0   IOMUX_PAD(0x2D0, 0x24, 0, 0x0, 0, MX50_KEYPAD_CTRL)
 
#define MX50_PAD_KEY_ROW0__GPIO_4_1   IOMUX_PAD(0x2D0, 0x24, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_ROW0__NANDF_ALE   IOMUX_PAD(0x2D0, 0x24, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_KEY_COL1__KEY_COL1   IOMUX_PAD(0x2D4, 0x28, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_COL1__GPIO_4_2   IOMUX_PAD(0x2D4, 0x28, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_COL1__NANDF_CE0   IOMUX_PAD(0x2D4, 0x28, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_KEY_ROW1__KEY_ROW1   IOMUX_PAD(0x2D8, 0x2C, 0, 0x0, 0, MX50_KEYPAD_CTRL)
 
#define MX50_PAD_KEY_ROW1__GPIO_4_3   IOMUX_PAD(0x2D8, 0x2C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_ROW1__NANDF_CE1   IOMUX_PAD(0x2D8, 0x2C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_KEY_COL2__KEY_COL2   IOMUX_PAD(0x2DC, 0x30, 0, 0x0, 0, MX50_KEYPAD_CTRL)
 
#define MX50_PAD_KEY_COL2__GPIO_4_4   IOMUX_PAD(0x2DC, 0x30, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_COL2__NANDF_CE2   IOMUX_PAD(0x2DC, 0x30, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_KEY_ROW2__KEY_ROW2   IOMUX_PAD(0x2E0, 0x34, 0, 0x0, 0, MX50_KEYPAD_CTRL)
 
#define MX50_PAD_KEY_ROW2__GPIO_4_5   IOMUX_PAD(0x2E0, 0x34, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_ROW2__NANDF_CE3   IOMUX_PAD(0x2E0, 0x34, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_KEY_COL3__KEY_COL3   IOMUX_PAD(0x2E4, 0x38, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_COL3__GPIO_4_6   IOMUX_PAD(0x2E4, 0x38, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_COL3__NANDF_READY
 
#define MX50_PAD_KEY_COL3__SDMA_EXT0   IOMUX_PAD(0x2E4, 0x38, 6, 0x7b8, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_ROW3__KEY_ROW3   IOMUX_PAD(0x2E8, 0x3C, 0, 0x0, 0, MX50_KEYPAD_CTRL)
 
#define MX50_PAD_KEY_ROW3__GPIO_4_7   IOMUX_PAD(0x2E8, 0x3C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_KEY_ROW3__NANDF_DQS   IOMUX_PAD(0x2E8, 0x3C, 2, 0x7b0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_KEY_ROW3__SDMA_EXT1   IOMUX_PAD(0x2E8, 0x3C, 6, 0x7bc, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C1_SCL__I2C1_SCL
 
#define MX50_PAD_I2C1_SCL__GPIO_6_18   IOMUX_PAD(0x2EC, 0x40, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C1_SCL__UART2_TXD   IOMUX_PAD(0x2EC, 0x40, 2, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_I2C1_SDA__I2C1_SDA
 
#define MX50_PAD_I2C1_SDA__GPIO_6_19   IOMUX_PAD(0x2F0, 0x44, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C1_SDA__UART2_RXD   IOMUX_PAD(0x2F0, 0x44, 2, 0x7cc, 1, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_I2C2_SCL__I2C2_SCL
 
#define MX50_PAD_I2C2_SCL__GPIO_6_20   IOMUX_PAD(0x2F4, 0x48, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C2_SCL__UART2_CTS   IOMUX_PAD(0x2F4, 0x48, 2, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_I2C2_SCL__DCDC_OK   IOMUX_PAD(0x2F4, 0x48, 7, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C2_SDA__I2C2_SDA
 
#define MX50_PAD_I2C2_SDA__GPIO_6_21   IOMUX_PAD(0x2F8, 0x4C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C2_SDA__UART2_RTS   IOMUX_PAD(0x2F8, 0x4C, 2, 0x7c8, 1, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_I2C2_SDA__PWRSTABLE   IOMUX_PAD(0x2F8, 0x4C, 7, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C3_SCL__I2C3_SCL
 
#define MX50_PAD_I2C3_SCL__GPIO_6_22   IOMUX_PAD(0x2FC, 0x50, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C3_SCL__FEC_MDC   IOMUX_PAD(0x2FC, 0x50, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_I2C3_SCL__PMIC_RDY   IOMUX_PAD(0x2FC, 0x50, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C3_SCL__GPT_CAPIN1   IOMUX_PAD(0x2FC, 0x50, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C3_SCL__USBOTG_OC   IOMUX_PAD(0x2FC, 0x50, 7, 0x7E8, 0, MX50_USB_PAD_CTRL)
 
#define MX50_PAD_I2C3_SDA__I2C3_SDA
 
#define MX50_PAD_I2C3_SDA__GPIO_6_23   IOMUX_PAD(0x300, 0x54, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C3_SDA__FEC_MDIO   IOMUX_PAD(0x300, 0x54, 2, 0x774, 0, MX50_FEC_PAD_CTRL)
 
#define MX50_PAD_I2C3_SDA__PWRFAIL_INT   IOMUX_PAD(0x300, 0x54, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C3_SDA__ALARM_DEB   IOMUX_PAD(0x300, 0x54, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C3_SDA__GPT_CAPIN1   IOMUX_PAD(0x300, 0x54, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_I2C3_SDA__USBOTG_PWR
 
#define MX50_PAD_PWM1__PWM1_PWMO   IOMUX_PAD(0x304, 0x58, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PWM1__GPIO_6_24   IOMUX_PAD(0x304, 0x58, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PWM1__USBOTG_OC   IOMUX_PAD(0x304, 0x58, 2, 0x7E8, 1, MX50_USB_PAD_CTRL)
 
#define MX50_PAD_PWM1__GPT_CMPOUT1   IOMUX_PAD(0x304, 0x58, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PWM2__PWM2_PWMO   IOMUX_PAD(0x308, 0x5C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PWM2__GPIO_6_25   IOMUX_PAD(0x308, 0x5C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PWM2__USBOTG_PWR
 
#define MX50_PAD_PWM2__DCDC_PWM   IOMUX_PAD(0x308, 0x5C, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PWM2__GPT_CMPOUT2   IOMUX_PAD(0x308, 0x5C, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PWM2__ANY_PU_RST   IOMUX_PAD(0x308, 0x5C, 7, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_OWIRE__OWIRE   IOMUX_PAD(0x30C, 0x60, 0, 0x0, 0, MX50_OWIRE_PAD_CTRL)
 
#define MX50_PAD_OWIRE__GPIO_6_26   IOMUX_PAD(0x30C, 0x60, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_OWIRE__USBH1_OC   IOMUX_PAD(0x30C, 0x60, 2, 0x0, 0, MX50_USB_PAD_CTRL)
 
#define MX50_PAD_OWIRE__SSI_EXT1_CLK   IOMUX_PAD(0x30C, 0x60, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_OWIRE__EPDC_PWRIRQ   IOMUX_PAD(0x30C, 0x60, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_OWIRE__GPT_CMPOUT3   IOMUX_PAD(0x30C, 0x60, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPITO__EPITO   IOMUX_PAD(0x310, 0x64, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPITO__GPIO_6_27   IOMUX_PAD(0x310, 0x64, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPITO__USBH1_PWR
 
#define MX50_PAD_EPITO__SSI_EXT2_CLK   IOMUX_PAD(0x310, 0x64, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPITO__TOG_EN   IOMUX_PAD(0x310, 0x64, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPITO__GPT_CLKIN   IOMUX_PAD(0x310, 0x64, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_WDOG__WDOG   IOMUX_PAD(0x314, 0x68, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_WDOG__GPIO_6_28   IOMUX_PAD(0x314, 0x68, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_WDOG__WDOG_RST   IOMUX_PAD(0x314, 0x68, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_WDOG__XTAL32K   IOMUX_PAD(0x314, 0x68, 6, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_TXFS__SSI_TXFS   IOMUX_PAD(0x318, 0x6C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_TXFS__GPIO_6_0   IOMUX_PAD(0x318, 0x6C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_TXC__SSI_TXC   IOMUX_PAD(0x31C, 0x70, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_TXC__GPIO_6_1   IOMUX_PAD(0x31C, 0x70, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_TXD__SSI_TXD   IOMUX_PAD(0x320, 0x74, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_TXD__GPIO_6_2   IOMUX_PAD(0x320, 0x74, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_TXD__CSPI_RDY   IOMUX_PAD(0x320, 0x74, 4, 0x6e8, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_RXD__SSI_RXD   IOMUX_PAD(0x324, 0x78, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_RXD__GPIO_6_3   IOMUX_PAD(0x324, 0x78, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_RXD__CSPI_SS3   IOMUX_PAD(0x324, 0x78, 4, 0x6f4, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_SSI_RXFS__AUD3_RXFS   IOMUX_PAD(0x328, 0x7C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_RXFS__GPIO_6_4   IOMUX_PAD(0x328, 0x7C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_RXFS__UART5_TXD   IOMUX_PAD(0x328, 0x7C, 2, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_SSI_RXFS__WEIM_D6   IOMUX_PAD(0x328, 0x7C, 3, 0x804, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_RXFS__CSPI_SS2   IOMUX_PAD(0x328, 0x7C, 4, 0x6f0, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_SSI_RXFS__FEC_COL   IOMUX_PAD(0x328, 0x7C, 5, 0x770, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SSI_RXFS__FEC_MDC   IOMUX_PAD(0x328, 0x7C, 6, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SSI_RXC__AUD3_RXC   IOMUX_PAD(0x32C, 0x80, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_RXC__GPIO_6_5   IOMUX_PAD(0x32C, 0x80, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_RXC__UART5_RXD   IOMUX_PAD(0x32C, 0x80, 2, 0x7e4, 1, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_SSI_RXC__WEIM_D7   IOMUX_PAD(0x32C, 0x80, 3, 0x808, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_RXC__CSPI_SS1   IOMUX_PAD(0x32C, 0x80, 4, 0x6ec, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_SSI_RXC__FEC_RX_CLK   IOMUX_PAD(0x32C, 0x80, 5, 0x780, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SSI_RXC__FEC_MDIO   IOMUX_PAD(0x32C, 0x80, 6, 0x774, 1, MX50_FEC_PAD_CTRL)
 
#define MX50_PAD_UART1_TXD__UART1_TXD   IOMUX_PAD(0x330, 0x84, 0, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART1_TXD__GPIO_6_6   IOMUX_PAD(0x330, 0x84, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART1_RXD__UART1_RXD   IOMUX_PAD(0x334, 0x88, 0, 0x7c4, 1, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART1_RXD__GPIO_6_7   IOMUX_PAD(0x334, 0x88, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART1_CTS__UART1_CTS   IOMUX_PAD(0x338, 0x8C, 0, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART1_CTS__GPIO_6_8   IOMUX_PAD(0x338, 0x8C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART1_CTS__UART5_TXD   IOMUX_PAD(0x338, 0x8C, 2, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART1_CTS__SD4_D4   IOMUX_PAD(0x338, 0x8C, 4, 0x760, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART1_CTS__SD4_CMD   IOMUX_PAD(0x338, 0x8C, 5, 0x74c, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART1_RTS__UART1_RTS   IOMUX_PAD(0x33C, 0x90, 0, 0x7c0, 1, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART1_RTS__GPIO_6_9   IOMUX_PAD(0x33C, 0x90, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART1_RTS__UART5_RXD   IOMUX_PAD(0x33C, 0x90, 2, 0x7e4, 3, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART1_RTS__SD4_D5   IOMUX_PAD(0x33C, 0x90, 4, 0x764, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART1_RTS__SD4_CLK   IOMUX_PAD(0x33C, 0x90, 5, 0x748, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART2_TXD__UART2_TXD   IOMUX_PAD(0x340, 0x94, 0, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART2_TXD__GPIO_6_10   IOMUX_PAD(0x340, 0x94, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART2_TXD__SD4_D6   IOMUX_PAD(0x340, 0x94, 4, 0x768, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART2_TXD__SD4_D4   IOMUX_PAD(0x340, 0x94, 5, 0x760, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART2_RXD__UART2_RXD   IOMUX_PAD(0x344, 0x98, 0, 0x7cc, 3, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART2_RXD__GPIO_6_11   IOMUX_PAD(0x344, 0x98, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART2_RXD__SD4_D7   IOMUX_PAD(0x344, 0x98, 4, 0x76c, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART2_RXD__SD4_D5   IOMUX_PAD(0x344, 0x98, 5, 0x764, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART2_CTS__UART2_CTS   IOMUX_PAD(0x348, 0x9C, 0, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART2_CTS__GPIO_6_12   IOMUX_PAD(0x348, 0x9C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART2_CTS__SD4_CMD   IOMUX_PAD(0x348, 0x9C, 4, 0x74c, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART2_CTS__SD4_D6   IOMUX_PAD(0x348, 0x9C, 5, 0x768, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART2_RTS__UART2_RTS   IOMUX_PAD(0x34C, 0xA0, 0, 0x7c8, 3, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART2_RTS__GPIO_6_13   IOMUX_PAD(0x34C, 0xA0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART2_RTS__SD4_CLK   IOMUX_PAD(0x34C, 0xA0, 4, 0x748, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART2_RTS__SD4_D7   IOMUX_PAD(0x34C, 0xA0, 5, 0x76c, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART3_TXD__UART3_TXD   IOMUX_PAD(0x350, 0xA4, 0, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART3_TXD__GPIO_6_14   IOMUX_PAD(0x350, 0xA4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART3_TXD__SD1_D4   IOMUX_PAD(0x350, 0xA4, 3, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART3_TXD__SD4_D0   IOMUX_PAD(0x350, 0xA4, 4, 0x750, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART3_TXD__SD2_WP   IOMUX_PAD(0x350, 0xA4, 5, 0x744, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART3_TXD__WEIM_D12   IOMUX_PAD(0x350, 0xA4, 6, 0x81c, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART3_RXD__UART3_RXD   IOMUX_PAD(0x354, 0xA8, 0, 0x7d4, 1, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART3_RXD__GPIO_6_15   IOMUX_PAD(0x354, 0xA8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART3_RXD__SD1_D5   IOMUX_PAD(0x354, 0xA8, 3, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART3_RXD__SD4_D1   IOMUX_PAD(0x354, 0xA8, 4, 0x754, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART3_RXD__SD2_CD   IOMUX_PAD(0x354, 0xA8, 5, 0x740, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART3_RXD__WEIM_D13   IOMUX_PAD(0x354, 0xA8, 6, 0x820, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART4_TXD__UART4_TXD   IOMUX_PAD(0x358, 0xAC, 0, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART4_TXD__GPIO_6_16   IOMUX_PAD(0x358, 0xAC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART4_TXD__UART3_CTS   IOMUX_PAD(0x358, 0xAC, 2, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART4_TXD__SD1_D6   IOMUX_PAD(0x358, 0xAC, 3, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART4_TXD__SD4_D2   IOMUX_PAD(0x358, 0xAC, 4, 0x758, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART4_TXD__SD2_LCTL   IOMUX_PAD(0x358, 0xAC, 5, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART4_TXD__WEIM_D14   IOMUX_PAD(0x358, 0xAC, 6, 0x824, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART4_RXD__UART4_RXD   IOMUX_PAD(0x35C, 0xB0, 0, 0x7dc, 1, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART4_RXD__GPIO_6_17   IOMUX_PAD(0x35C, 0xB0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_UART4_RXD__UART3_RTS   IOMUX_PAD(0x35C, 0xB0, 2, 0x7d0, 1, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_UART4_RXD__SD1_D7   IOMUX_PAD(0x35C, 0xB0, 3, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART4_RXD__SD4_D3   IOMUX_PAD(0x35C, 0xB0, 4, 0x75c, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART4_RXD__SD1_LCTL   IOMUX_PAD(0x35C, 0xB0, 5, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_UART4_RXD__WEIM_D15   IOMUX_PAD(0x35C, 0xB0, 6, 0x828, 0, NO_PAD_CTRL)
 
#define MX50_PAD_CSPI_SCLK__CSPI_SCLK   IOMUX_PAD(0x360, 0xB4, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_CSPI_SCLK__GPIO_4_8   IOMUX_PAD(0x360, 0xB4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_CSPI_MOSI__CSPI_MOSI   IOMUX_PAD(0x364, 0xB8, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_CSPI_MOSI__GPIO_4_9   IOMUX_PAD(0x364, 0xB8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_CSPI_MISO__CSPI_MISO   IOMUX_PAD(0x368, 0xBC, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_CSPI_MISO__GPIO_4_10   IOMUX_PAD(0x368, 0xBC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_CSPI_SS0__CSPI_SS0   IOMUX_PAD(0x36C, 0xC0, 0, 0x0, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_CSPI_SS0__GPIO_4_11   IOMUX_PAD(0x36C, 0xC0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_SCLK__ECSPI1_SCLK   IOMUX_PAD(0x370, 0xC4, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_SCLK__GPIO_4_12   IOMUX_PAD(0x370, 0xC4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_SCLK__CSPI_RDY   IOMUX_PAD(0x370, 0xC4, 2, 0x6e8, 1, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_SCLK__ECSPI2_RDY   IOMUX_PAD(0x370, 0xC4, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_SCLK__UART3_RTS   IOMUX_PAD(0x370, 0xC4, 4, 0x7d0, 2, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_SCLK__EPDC_SDCE6   IOMUX_PAD(0x370, 0xC4, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_SCLK__WEIM_D8   IOMUX_PAD(0x370, 0xC4, 7, 0x80c, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_MOSI__ECSPI1_MOSI   IOMUX_PAD(0x374, 0xC8, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_MOSI__GPIO_4_13   IOMUX_PAD(0x374, 0xC8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_MOSI__CSPI_SS1   IOMUX_PAD(0x374, 0xC8, 2, 0x6ec, 1, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_ECSPI1_MOSI__ECSPI2_SS1   IOMUX_PAD(0x374, 0xC8, 3, 0x0, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_ECSPI1_MOSI__UART3_CTS   IOMUX_PAD(0x374, 0xC8, 4, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_MOSI__EPDC_SDCE7   IOMUX_PAD(0x374, 0xC8, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_MOSI__WEIM_D9   IOMUX_PAD(0x374, 0xC8, 7, 0x810, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_MISO__ECSPI1_MISO   IOMUX_PAD(0x378, 0xCC, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_MISO__GPIO_4_14   IOMUX_PAD(0x378, 0xCC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_MISO__CSPI_SS2   IOMUX_PAD(0x378, 0xCC, 2, 0x6f0, 1, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_ECSPI1_MISO__ECSPI2_SS2   IOMUX_PAD(0x378, 0xCC, 3, 0x0, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_ECSPI1_MISO__UART4_RTS   IOMUX_PAD(0x378, 0xCC, 4, 0x7d8, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_MISO__EPDC_SDCE8   IOMUX_PAD(0x378, 0xCC, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_MISO__WEIM_D10   IOMUX_PAD(0x378, 0xCC, 7, 0x814, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_SS0__ECSPI1_SS0   IOMUX_PAD(0x37C, 0xD0, 0, 0x0, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_ECSPI1_SS0__GPIO_4_15   IOMUX_PAD(0x37C, 0xD0, 1, 0x0, 0, PAD_CTL_PUS_100K_UP)
 
#define MX50_PAD_ECSPI1_SS0__CSPI_SS3   IOMUX_PAD(0x37C, 0xD0, 2, 0x6f4, 1, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_ECSPI1_SS0__ECSPI2_SS3   IOMUX_PAD(0x37C, 0xD0, 3, 0x0, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_ECSPI1_SS0__UART4_CTS   IOMUX_PAD(0x37C, 0xD0, 4, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_SS0__EPDC_SDCE9   IOMUX_PAD(0x37C, 0xD0, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI1_SS0__WEIM_D11   IOMUX_PAD(0x37C, 0xD0, 7, 0x818, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SCLK__ECSPI2_SCLK   IOMUX_PAD(0x380, 0xD4, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SCLK__GPIO_4_16   IOMUX_PAD(0x380, 0xD4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SCLK__ELCDIF_WR   IOMUX_PAD(0x380, 0xD4, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SCLK__ECSPI1_RDY   IOMUX_PAD(0x380, 0xD4, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SCLK__UART5_RTS   IOMUX_PAD(0x380, 0xD4, 4, 0x7e0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SCLK__ELCDIF_DOTCLK   IOMUX_PAD(0x380, 0xD4, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SCLK__NANDF_CEN4   IOMUX_PAD(0x380, 0xD4, 6, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SCLK__WEIM_D8   IOMUX_PAD(0x380, 0xD4, 7, 0x80c, 1, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MOSI__ECSPI2_MOSI   IOMUX_PAD(0x384, 0xD8, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MOSI__GPIO_4_17   IOMUX_PAD(0x384, 0xD8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MOSI__ELCDIF_RD   IOMUX_PAD(0x384, 0xD8, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MOSI__ECSPI1_SS1   IOMUX_PAD(0x384, 0xD8, 3, 0x0, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_ECSPI2_MOSI__UART5_CTS   IOMUX_PAD(0x384, 0xD8, 4, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MOSI__ELCDIF_EN   IOMUX_PAD(0x384, 0xD8, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MOSI__NANDF_CEN5   IOMUX_PAD(0x384, 0xD8, 6, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MOSI__WEIM_D9   IOMUX_PAD(0x384, 0xD8, 7, 0x810, 1, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MISO__ECSPI2_MISO   IOMUX_PAD(0x388, 0xDC, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MISO__GPIO_4_18   IOMUX_PAD(0x388, 0xDC, 1, 0x0, 0, PAD_CTL_PUS_100K_UP)
 
#define MX50_PAD_ECSPI2_MISO__ELCDIF_RS   IOMUX_PAD(0x388, 0xDC, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MISO__ECSPI1_SS2   IOMUX_PAD(0x388, 0xDC, 3, 0x0, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_ECSPI2_MISO__UART5_TXD   IOMUX_PAD(0x388, 0xDC, 4, 0x0, 0, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MISO__ELCDIF_VSYNC   IOMUX_PAD(0x388, 0xDC, 5, 0x73c, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MISO__NANDF_CEN6   IOMUX_PAD(0x388, 0xDC, 6, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_MISO__WEIM_D10   IOMUX_PAD(0x388, 0xDC, 7, 0x814, 1, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SS0__ECSPI2_SS0   IOMUX_PAD(0x38C, 0xE0, 0, 0x0, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_ECSPI2_SS0__GPIO_4_19   IOMUX_PAD(0x38C, 0xE0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SS0__ELCDIF_CS   IOMUX_PAD(0x38C, 0xE0, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SS0__ECSPI1_SS3   IOMUX_PAD(0x38C, 0xE0, 3, 0x0, 0, MX50_CSPI_SS_PAD)
 
#define MX50_PAD_ECSPI2_SS0__UART5_RXD   IOMUX_PAD(0x38C, 0xE0, 4, 0x7e4, 5, MX50_UART_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SS0__ELCDIF_HSYNC   IOMUX_PAD(0x38C, 0xE0, 5, 0x6f8, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SS0__NANDF_CEN7   IOMUX_PAD(0x38C, 0xE0, 6, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_ECSPI2_SS0__WEIM_D11   IOMUX_PAD(0x38C, 0xE0, 7, 0x818, 1, NO_PAD_CTRL)
 
#define MX50_PAD_SD1_CLK__SD1_CLK   IOMUX_PAD(0x390, 0xE4, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD1_CLK__GPIO_5_0   IOMUX_PAD(0x390, 0xE4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD1_CLK__CLKO   IOMUX_PAD(0x390, 0xE4, 7, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD1_CMD__SD1_CMD   IOMUX_PAD(0x394, 0xE8, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD1_CMD__GPIO_5_1   IOMUX_PAD(0x394, 0xE8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD1_CMD__CLKO2   IOMUX_PAD(0x394, 0xE8, 7, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD1_D0__SD1_D0   IOMUX_PAD(0x398, 0xEC, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD1_D0__GPIO_5_2   IOMUX_PAD(0x398, 0xEC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD1_D0__PLL1_BYP   IOMUX_PAD(0x398, 0xEC, 7, 0x6dc, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD1_D1__SD1_D1   IOMUX_PAD(0x39C, 0xF0, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD1_D1__GPIO_5_3   IOMUX_PAD(0x39C, 0xF0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD1_D1__PLL2_BYP   IOMUX_PAD(0x39C, 0xF0, 7, 0x6e0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD1_D2__SD1_D2   IOMUX_PAD(0x3A0, 0xF4, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD1_D2__GPIO_5_4   IOMUX_PAD(0x3A0, 0xF4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD1_D2__PLL3_BYP   IOMUX_PAD(0x3A0, 0xF4, 7, 0x6e4, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD1_D3__SD1_D3   IOMUX_PAD(0x3A4, 0xF8, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD1_D3__GPIO_5_5   IOMUX_PAD(0x3A4, 0xF8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_CLK__SD2_CLK   IOMUX_PAD(0x3A8, 0xFC, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_CLK__GPIO_5_6   IOMUX_PAD(0x3A8, 0xFC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_CLK__MSHC_SCLK   IOMUX_PAD(0x3A8, 0xFC, 2, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_CMD__SD2_CMD   IOMUX_PAD(0x3AC, 0x100, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_CMD__GPIO_5_7   IOMUX_PAD(0x3AC, 0x100, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_CMD__MSHC_BS   IOMUX_PAD(0x3AC, 0x100, 2, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D0__SD2_D0   IOMUX_PAD(0x3B0, 0x104, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D0__GPIO_5_8   IOMUX_PAD(0x3B0, 0x104, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D0__MSHC_D0   IOMUX_PAD(0x3B0, 0x104, 2, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D0__KEY_COL4   IOMUX_PAD(0x3B0, 0x104, 3, 0x790, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D1__SD2_D1   IOMUX_PAD(0x3B4, 0x108, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D1__GPIO_5_9   IOMUX_PAD(0x3B4, 0x108, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D1__MSHC_D1   IOMUX_PAD(0x3B4, 0x108, 2, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D1__KEY_ROW4   IOMUX_PAD(0x3B4, 0x108, 3, 0x7a0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D2__SD2_D2   IOMUX_PAD(0x3B8, 0x10C, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D2__GPIO_5_10   IOMUX_PAD(0x3B8, 0x10C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D2__MSHC_D2   IOMUX_PAD(0x3B8, 0x10C, 2, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D2__KEY_COL5   IOMUX_PAD(0x3B8, 0x10C, 3, 0x794, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D3__SD2_D3   IOMUX_PAD(0x3BC, 0x110, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D3__GPIO_5_11   IOMUX_PAD(0x3BC, 0x110, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D3__MSHC_D3   IOMUX_PAD(0x3BC, 0x110, 2, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D3__KEY_ROW5   IOMUX_PAD(0x3BC, 0x110, 3, 0x7a4, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D4__SD2_D4   IOMUX_PAD(0x3C0, 0x114, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D4__GPIO_5_12   IOMUX_PAD(0x3C0, 0x114, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D4__AUD4_RXFS   IOMUX_PAD(0x3C0, 0x114, 2, 0x6d0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D4__KEY_COL6   IOMUX_PAD(0x3C0, 0x114, 3, 0x798, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D4__WEIM_D0   IOMUX_PAD(0x3C0, 0x114, 4, 0x7ec, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D4__CCM_OUT0   IOMUX_PAD(0x3C0, 0x114, 7, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D5__SD2_D5   IOMUX_PAD(0x3C4, 0x118, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D5__GPIO_5_13   IOMUX_PAD(0x3C4, 0x118, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D5__AUD4_RXC   IOMUX_PAD(0x3C4, 0x118, 2, 0x6cc, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D5__KEY_ROW6   IOMUX_PAD(0x3C4, 0x118, 3, 0x7a8, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D5__WEIM_D1   IOMUX_PAD(0x3C4, 0x118, 4, 0x7f0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D5__CCM_OUT1   IOMUX_PAD(0x3C4, 0x118, 7, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D6__SD2_D6   IOMUX_PAD(0x3C8, 0x11C, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D6__GPIO_5_14   IOMUX_PAD(0x3C8, 0x11C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D6__AUD4_RXD   IOMUX_PAD(0x3C8, 0x11C, 2, 0x6c4, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D6__KEY_COL7   IOMUX_PAD(0x3C8, 0x11C, 3, 0x79c, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D6__WEIM_D2   IOMUX_PAD(0x3C8, 0x11C, 4, 0x7f4, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D6__CCM_OUT2   IOMUX_PAD(0x3C8, 0x11C, 7, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D7__SD2_D7   IOMUX_PAD(0x3CC, 0x120, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_D7__GPIO_5_15   IOMUX_PAD(0x3CC, 0x120, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D7__AUD4_TXFS   IOMUX_PAD(0x3CC, 0x120, 2, 0x6d8, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D7__KEY_ROW7   IOMUX_PAD(0x3CC, 0x120, 3, 0x7ac, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D7__WEIM_D3   IOMUX_PAD(0x3CC, 0x120, 4, 0x7f8, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_D7__CCM_STOP   IOMUX_PAD(0x3CC, 0x120, 7, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_WP__SD2_WP   IOMUX_PAD(0x3D0, 0x124, 0, 0x744, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_WP__GPIO_5_16   IOMUX_PAD(0x3D0, 0x124, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_WP__AUD4_TXD   IOMUX_PAD(0x3D0, 0x124, 2, 0x6c8, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_WP__WEIM_D4   IOMUX_PAD(0x3D0, 0x124, 4, 0x7fc, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_WP__CCM_WAIT   IOMUX_PAD(0x3D0, 0x124, 7, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_CD__SD2_CD   IOMUX_PAD(0x3D4, 0x128, 0, 0x740, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD2_CD__GPIO_5_17   IOMUX_PAD(0x3D4, 0x128, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_CD__AUD4_TXC   IOMUX_PAD(0x3D4, 0x128, 2, 0x6d4, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_CD__WEIM_D5   IOMUX_PAD(0x3D4, 0x128, 4, 0x800, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD2_CD__CCM_REF_EN   IOMUX_PAD(0x3D4, 0x128, 7, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_ON_REQ__PMIC_ON_REQ   IOMUX_PAD(0x3D8, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_STBY_REQ__PMIC_STBY_REQ   IOMUX_PAD(0x3DC, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_PORT_B__PMIC_PORT_B   IOMUX_PAD(0x3E0, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_BOOT_MODE1__PMIC_BOOT_MODE1   IOMUX_PAD(0x3E4, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_RESET_IN_B__PMIC_RESET_IN_B   IOMUX_PAD(0x3E8, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_BOOT_MODE0__PMIC_BOOT_MODE0   IOMUX_PAD(0x3EC, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_TEST_MODE__PMIC_TEST_MODE   IOMUX_PAD(0x3F0, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_JTAG_TMS__PMIC_JTAG_TMS   IOMUX_PAD(0x3F4, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_JTAG_MOD__PMIC_JTAG_MOD   IOMUX_PAD(0x3F8, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_JTAG_TRSTB__PMIC_JTAG_TRSTB   IOMUX_PAD(0x3FC, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_JTAG_TDI__PMIC_JTAG_TDI   IOMUX_PAD(0x400, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_JTAG_TCK__PMIC_JTAG_TCK   IOMUX_PAD(0x404, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_PMIC_JTAG_TDO__PMIC_JTAG_TDO   IOMUX_PAD(0x408, 0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D0__DISP_D0   IOMUX_PAD(0x40C, 0x12C, 0, 0x6fc, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D0__GPIO_2_0   IOMUX_PAD(0x40C, 0x12C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D0__FEC_TXCLK   IOMUX_PAD(0x40C, 0x12C, 2, 0x78c, 0, PAD_CTL_HYS | PAD_CTL_PKE)
 
#define MX50_PAD_DISP_D1__DISP_D1   IOMUX_PAD(0x410, 0x130, 0, 0x700, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D1__GPIO_2_1   IOMUX_PAD(0x410, 0x130, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D1__FEC_RX_ER   IOMUX_PAD(0x410, 0x130, 2, 0x788, 0, PAD_CTL_HYS | PAD_CTL_PKE)
 
#define MX50_PAD_DISP_D1__WEIM_A17   IOMUX_PAD(0x410, 0x130, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D2__DISP_D2   IOMUX_PAD(0x414, 0x134, 0, 0x704, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D2__GPIO_2_2   IOMUX_PAD(0x414, 0x134, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D2__FEC_RX_DV   IOMUX_PAD(0x414, 0x134, 2, 0x784, 0, PAD_CTL_HYS | PAD_CTL_PKE)
 
#define MX50_PAD_DISP_D2__WEIM_A18   IOMUX_PAD(0x414, 0x134, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D3__DISP_D3   IOMUX_PAD(0x418, 0x138, 0, 0x708, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D3__GPIO_2_3   IOMUX_PAD(0x418, 0x138, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D3__FEC_RXD1   IOMUX_PAD(0x418, 0x138, 2, 0x77C, 0, PAD_CTL_HYS | PAD_CTL_PKE)
 
#define MX50_PAD_DISP_D3__WEIM_A19   IOMUX_PAD(0x418, 0x138, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D3__FEC_COL   IOMUX_PAD(0x418, 0x138, 4, 0x770, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D4__DISP_D4   IOMUX_PAD(0x41C, 0x13C, 0, 0x70c, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D4__GPIO_2_4   IOMUX_PAD(0x41C, 0x13C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D4__FEC_RXD0   IOMUX_PAD(0x41C, 0x13C, 2, 0x778, 0, PAD_CTL_HYS | PAD_CTL_PKE)
 
#define MX50_PAD_DISP_D4__WEIM_A20   IOMUX_PAD(0x41C, 0x13C, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D5__DISP_D5   IOMUX_PAD(0x420, 0x140, 0, 0x710, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D5__GPIO_2_5   IOMUX_PAD(0x420, 0x140, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D5__FEC_TX_EN   IOMUX_PAD(0x420, 0x140, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_DISP_D5__WEIM_A21   IOMUX_PAD(0x420, 0x140, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D6__DISP_D6   IOMUX_PAD(0x424, 0x144, 0, 0x714, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D6__GPIO_2_6   IOMUX_PAD(0x424, 0x144, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D6__FEC_TXD1   IOMUX_PAD(0x424, 0x144, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_DISP_D6__WEIM_A22   IOMUX_PAD(0x424, 0x144, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D6__FEC_RX_CLK   IOMUX_PAD(0x424, 0x144, 4, 0x780, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D7__DISP_D7   IOMUX_PAD(0x428, 0x148, 0, 0x718, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D7__GPIO_2_7   IOMUX_PAD(0x428, 0x148, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D7__FEC_TXD0   IOMUX_PAD(0x428, 0x148, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_DISP_D7__WEIM_A23   IOMUX_PAD(0x428, 0x148, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_WR__ELCDIF_WR   IOMUX_PAD(0x42C, 0x14C, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_WR__GPIO_2_16   IOMUX_PAD(0x42C, 0x14C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_WR__ELCDIF_PIXCLK   IOMUX_PAD(0x42C, 0x14C, 2, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_WR__WEIM_A24   IOMUX_PAD(0x42C, 0x14C, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_RD__ELCDIF_RD   IOMUX_PAD(0x430, 0x150, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_RD__GPIO_2_19   IOMUX_PAD(0x430, 0x150, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_RD__ELCDIF_EN   IOMUX_PAD(0x430, 0x150, 2, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_RD__WEIM_A25   IOMUX_PAD(0x430, 0x150, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_RS__ELCDIF_RS   IOMUX_PAD(0x434, 0x154, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_RS__GPIO_2_17   IOMUX_PAD(0x434, 0x154, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_RS__ELCDIF_VSYNC   IOMUX_PAD(0x434, 0x154, 2, 0x73c, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_RS__WEIM_A26   IOMUX_PAD(0x434, 0x154, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_CS__ELCDIF_CS   IOMUX_PAD(0x438, 0x158, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_CS__GPIO_2_21   IOMUX_PAD(0x438, 0x158, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_CS__ELCDIF_HSYNC   IOMUX_PAD(0x438, 0x158, 2, 0x6f8, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_CS__WEIM_A27   IOMUX_PAD(0x438, 0x158, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_CS__WEIM_CS3   IOMUX_PAD(0x438, 0x158, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_BUSY__ELCDIF_HSYNC   IOMUX_PAD(0x43C, 0x15C, 0, 0x6f8, 2, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_BUSY__GPIO_2_18   IOMUX_PAD(0x43C, 0x15C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_BUSY__WEIM_CS3   IOMUX_PAD(0x43C, 0x15C, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_RESET__ELCDIF_RST   IOMUX_PAD(0x440, 0x160, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_RESET__GPIO_2_20   IOMUX_PAD(0x440, 0x160, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_RESET__WEIM_CS3   IOMUX_PAD(0x440, 0x160, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_CMD__SD3_CMD   IOMUX_PAD(0x444, 0x164, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_CMD__GPIO_5_18   IOMUX_PAD(0x444, 0x164, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_SD3_CMD__NANDF_WRN   IOMUX_PAD(0x444, 0x164, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SD3_CMD__SSP_CMD   IOMUX_PAD(0x444, 0x164, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_CLK__SD3_CLK   IOMUX_PAD(0x448, 0x168, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_CLK__GPIO_5_19   IOMUX_PAD(0x448, 0x168, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_SD3_CLK__NANDF_RDN   IOMUX_PAD(0x448, 0x168, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SD3_CLK__SSP_CLK   IOMUX_PAD(0x448, 0x168, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_D0__SD3_D0   IOMUX_PAD(0x44C, 0x16C, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_D0__GPIO_5_20   IOMUX_PAD(0x44C, 0x16C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_SD3_D0__NANDF_D4   IOMUX_PAD(0x44C, 0x16C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SD3_D0__SSP_D0   IOMUX_PAD(0x44C, 0x16C, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_D0__PLL1_BYP   IOMUX_PAD(0x44C, 0x16C, 7, 0x6dc, 1, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_D1__SD3_D1   IOMUX_PAD(0x450, 0x170, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_D1__GPIO_5_21   IOMUX_PAD(0x450, 0x170, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_SD3_D1__NANDF_D5   IOMUX_PAD(0x450, 0x170, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SD3_D1__PLL2_BYP   IOMUX_PAD(0x450, 0x170, 7, 0x6e0, 1, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_D2__SD3_D2   IOMUX_PAD(0x454, 0x174, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_D2__GPIO_5_22   IOMUX_PAD(0x454, 0x174, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_SD3_D2__NANDF_D6   IOMUX_PAD(0x454, 0x174, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SD3_D2__SSP_D2   IOMUX_PAD(0x454, 0x174, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_D2__PLL3_BYP   IOMUX_PAD(0x454, 0x174, 7, 0x6e4, 1, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_D3__SD3_D3   IOMUX_PAD(0x458, 0x178, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_D3__GPIO_5_23   IOMUX_PAD(0x458, 0x178, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_SD3_D3__NANDF_D7   IOMUX_PAD(0x458, 0x178, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SD3_D3__SSP_D3   IOMUX_PAD(0x458, 0x178, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_D4__SD3_D4   IOMUX_PAD(0x45C, 0x17C, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_D4__GPIO_5_24   IOMUX_PAD(0x45C, 0x17C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_SD3_D4__NANDF_D0   IOMUX_PAD(0x45C, 0x17C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SD3_D4__SSP_D4   IOMUX_PAD(0x45C, 0x17C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_D5__SD3_D5   IOMUX_PAD(0x460, 0x180, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_D5__GPIO_5_25   IOMUX_PAD(0x460, 0x180, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_SD3_D5__NANDF_D1   IOMUX_PAD(0x460, 0x180, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SD3_D5__SSP_D5   IOMUX_PAD(0x460, 0x180, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_D6__SD3_D6   IOMUX_PAD(0x464, 0x184, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_D6__GPIO_5_26   IOMUX_PAD(0x464, 0x184, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_SD3_D6__NANDF_D2   IOMUX_PAD(0x464, 0x184, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SD3_D6__SSP_D6   IOMUX_PAD(0x464, 0x184, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_D7__SD3_D7   IOMUX_PAD(0x468, 0x188, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_D7__GPIO_5_27   IOMUX_PAD(0x468, 0x188, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_SD3_D7__NANDF_D3   IOMUX_PAD(0x468, 0x188, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SD3_D7__SSP_D7   IOMUX_PAD(0x468, 0x188, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_WP__SD3_WP   IOMUX_PAD(0x46C, 0x18C, 0, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_WP__GPIO_5_28   IOMUX_PAD(0x46C, 0x18C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_SD3_WP__NANDF_RESETN   IOMUX_PAD(0x46C, 0x18C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_SD3_WP__SSP_CD   IOMUX_PAD(0x46C, 0x18C, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_SD3_WP__SD4_LCTL   IOMUX_PAD(0x46C, 0x18C, 4, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_SD3_WP__WEIM_CS3   IOMUX_PAD(0x46C, 0x18C, 5, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D8__DISP_D8   IOMUX_PAD(0x470, 0x190, 0, 0x71c, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D8__GPIO_2_8   IOMUX_PAD(0x470, 0x190, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D8__NANDF_CLE   IOMUX_PAD(0x470, 0x190, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D8__SD1_LCTL   IOMUX_PAD(0x470, 0x190, 3, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D8__SD4_CMD   IOMUX_PAD(0x470, 0x190, 4, 0x74c, 2, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D8__KEY_COL4   IOMUX_PAD(0x470, 0x190, 5, 0x790, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D8__FEC_TX_CLK   IOMUX_PAD(0x470, 0x190, 6, 0x78c, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D9__DISP_D9   IOMUX_PAD(0x474, 0x194, 0, 0x720, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D9__GPIO_2_9   IOMUX_PAD(0x474, 0x194, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D9__NANDF_ALE   IOMUX_PAD(0x474, 0x194, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D9__SD2_LCTL   IOMUX_PAD(0x474, 0x194, 3, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D9__SD4_CLK   IOMUX_PAD(0x474, 0x194, 4, 0x748, 2, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D9__KEY_ROW4   IOMUX_PAD(0x474, 0x194, 5, 0x7a0, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D9__FEC_RX_ER   IOMUX_PAD(0x474, 0x194, 6, 0x788, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D10__DISP_D10   IOMUX_PAD(0x478, 0x198, 0, 0x724, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D10__GPIO_2_10   IOMUX_PAD(0x478, 0x198, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D10__NANDF_CEN0   IOMUX_PAD(0x478, 0x198, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D10__SD3_LCTL   IOMUX_PAD(0x478, 0x198, 3, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D10__SD4_D0   IOMUX_PAD(0x478, 0x198, 4, 0x750, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D10__KEY_COL5   IOMUX_PAD(0x478, 0x198, 5, 0x794, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D10__FEC_RX_DV   IOMUX_PAD(0x478, 0x198, 6, 0x784, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D11__DISP_D11   IOMUX_PAD(0x47C, 0x19C, 0, 0x728, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D11__GPIO_2_11   IOMUX_PAD(0x47C, 0x19C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D11__NANDF_CEN1   IOMUX_PAD(0x47C, 0x19C, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D11__SD4_D1   IOMUX_PAD(0x47C, 0x19C, 4, 0x754, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D11__KEY_ROW5   IOMUX_PAD(0x47C, 0x19C, 5, 0x7a4, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D11__FEC_RDAT1   IOMUX_PAD(0x47C, 0x19C, 6, 0x77c, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D12__DISP_D12   IOMUX_PAD(0x480, 0x1A0, 0, 0x72c, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D12__GPIO_2_12   IOMUX_PAD(0x480, 0x1A0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D12__NANDF_CEN2   IOMUX_PAD(0x480, 0x1A0, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D12__SD1_CD   IOMUX_PAD(0x480, 0x1A0, 3, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D12__SD4_D2   IOMUX_PAD(0x480, 0x1A0, 4, 0x758, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D12__KEY_COL6   IOMUX_PAD(0x480, 0x1A0, 5, 0x798, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D12__FEC_RDAT0   IOMUX_PAD(0x480, 0x1A0, 6, 0x778, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D13__DISP_D13   IOMUX_PAD(0x484, 0x1A4, 0, 0x730, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D13__GPIO_2_13   IOMUX_PAD(0x484, 0x1A4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D13__NANDF_CEN3   IOMUX_PAD(0x484, 0x1A4, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D13__SD3_CD   IOMUX_PAD(0x484, 0x1A4, 3, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D13__SD4_D3   IOMUX_PAD(0x484, 0x1A4, 4, 0x75c, 1, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D13__KEY_ROW6   IOMUX_PAD(0x484, 0x1A4, 5, 0x7a8, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D13__FEC_TX_EN   IOMUX_PAD(0x484, 0x1A4, 6, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D14__DISP_D14   IOMUX_PAD(0x488, 0x1A8, 0, 0x734, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D14__GPIO_2_14   IOMUX_PAD(0x488, 0x1A8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D14__NANDF_RDY0   IOMUX_PAD(0x488, 0x1A8, 2, 0x7b4, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D14__SD1_WP   IOMUX_PAD(0x488, 0x1A8, 3, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D14__SD4_WP   IOMUX_PAD(0x488, 0x1A8, 4, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D14__KEY_COL7   IOMUX_PAD(0x488, 0x1A8, 5, 0x79c, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D14__FEC_TDAT1   IOMUX_PAD(0x488, 0x1A8, 6, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D15__DISP_D15   IOMUX_PAD(0x48C, 0x1AC, 0, 0x738, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_DISP_D15__GPIO_2_15   IOMUX_PAD(0x48C, 0x1AC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D15__NANDF_DQS   IOMUX_PAD(0x48C, 0x1AC, 2, 0x7b0, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D15__SD3_RST   IOMUX_PAD(0x48C, 0x1AC, 3, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D15__SD4_CD   IOMUX_PAD(0x48C, 0x1AC, 4, 0x0, 0, MX50_SD_PAD_CTRL)
 
#define MX50_PAD_DISP_D15__KEY_ROW7   IOMUX_PAD(0x48C, 0x1AC, 5, 0x7ac, 1, NO_PAD_CTRL)
 
#define MX50_PAD_DISP_D15__FEC_TDAT0   IOMUX_PAD(0x48C, 0x1AC, 6, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D0__EPDC_D0   IOMUX_PAD(0x54C, 0x1B0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D0__GPIO_3_0   IOMUX_PAD(0x54C, 0x1B0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D0__WEIM_D0   IOMUX_PAD(0x54C, 0x1B0, 2, 0x7ec, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D0__ELCDIF_RS   IOMUX_PAD(0x54C, 0x1B0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D0__ELCDIF_PIXCLK   IOMUX_PAD(0x54C, 0x1B0, 4, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D1__EPDC_D1   IOMUX_PAD(0x550, 0x1B4, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D1__GPIO_3_1   IOMUX_PAD(0x550, 0x1B4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D1__WEIM_D1   IOMUX_PAD(0x550, 0x1B4, 2, 0x7f0, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D1__ELCDIF_CS   IOMUX_PAD(0x550, 0x1B4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D1__ELCDIF_EN   IOMUX_PAD(0x550, 0x1B4, 4, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D2__EPDC_D2   IOMUX_PAD(0x554, 0x1B8, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D2__GPIO_3_2   IOMUX_PAD(0x554, 0x1B8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D2__WEIM_D2   IOMUX_PAD(0x554, 0x1B8, 2, 0x7f4, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D2__ELCDIF_WR   IOMUX_PAD(0x554, 0x1B8, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D2__ELCDIF_VSYNC   IOMUX_PAD(0x554, 0x1B8, 4, 0x73c, 2, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D3__EPDC_D3   IOMUX_PAD(0x558, 0x1BC, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D3__GPIO_3_3   IOMUX_PAD(0x558, 0x1BC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D3__WEIM_D3   IOMUX_PAD(0x558, 0x1BC, 2, 0x7f8, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D3__ELCDIF_RD   IOMUX_PAD(0x558, 0x1BC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D3__ELCDIF_HSYNC   IOMUX_PAD(0x558, 0x1BC, 4, 0x6f8, 3, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D4__EPDC_D4   IOMUX_PAD(0x55C, 0x1C0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D4__GPIO_3_4   IOMUX_PAD(0x55C, 0x1C0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D4__WEIM_D4   IOMUX_PAD(0x55C, 0x1C0, 2, 0x7fc, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D5__EPDC_D5   IOMUX_PAD(0x560, 0x1C4, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D5__GPIO_3_5   IOMUX_PAD(0x560, 0x1C4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D5__WEIM_D5   IOMUX_PAD(0x560, 0x1C4, 2, 0x800, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D6__EPDC_D6   IOMUX_PAD(0x564, 0x1C8, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D6__GPIO_3_6   IOMUX_PAD(0x564, 0x1C8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D6__WEIM_D6   IOMUX_PAD(0x564, 0x1C8, 2, 0x804, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D7__EPDC_D7   IOMUX_PAD(0x568, 0x1CC, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D7__GPIO_3_7   IOMUX_PAD(0x568, 0x1CC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D7__WEIM_D7   IOMUX_PAD(0x568, 0x1CC, 2, 0x808, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D8__EPDC_D8   IOMUX_PAD(0x56C, 0x1D0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D8__GPIO_3_8   IOMUX_PAD(0x56C, 0x1D0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D8__WEIM_D8   IOMUX_PAD(0x56C, 0x1D0, 2, 0x80c, 2, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D8__ELCDIF_D24   IOMUX_PAD(0x56C, 0x1D0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D9__EPDC_D9   IOMUX_PAD(0x570, 0x1D4, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D9__GPIO_3_9   IOMUX_PAD(0x570, 0x1D4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D9__WEIM_D9   IOMUX_PAD(0x570, 0x1D4, 2, 0x810, 2, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D9__ELCDIF_D25   IOMUX_PAD(0x570, 0x1D4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D10__EPDC_D10   IOMUX_PAD(0x574, 0x1D8, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D10__GPIO_3_10   IOMUX_PAD(0x574, 0x1D8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D10__WEIM_D10   IOMUX_PAD(0x574, 0x1D8, 2, 0x814, 2, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D10__ELCDIF_D26   IOMUX_PAD(0x574, 0x1D8, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D11__EPDC_D11   IOMUX_PAD(0x578, 0x1DC, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D11__GPIO_3_11   IOMUX_PAD(0x578, 0x1DC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D11__WEIM_D11   IOMUX_PAD(0x578, 0x1DC, 2, 0x818, 2, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D11__ELCDIF_D27   IOMUX_PAD(0x578, 0x1DC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D12__EPDC_D12   IOMUX_PAD(0x57C, 0x1E0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D12__GPIO_3_12   IOMUX_PAD(0x57C, 0x1E0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D12__WEIM_D12   IOMUX_PAD(0x57C, 0x1E0, 2, 0x81c, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D12__ELCDIF_D28   IOMUX_PAD(0x57C, 0x1E0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D13__EPDC_D13   IOMUX_PAD(0x580, 0x1E4, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D13__GPIO_3_13   IOMUX_PAD(0x580, 0x1E4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D13__WEIM_D13   IOMUX_PAD(0x580, 0x1E4, 2, 0x820, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D13__ELCDIF_D29   IOMUX_PAD(0x580, 0x1E4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D14__EPDC_D14   IOMUX_PAD(0x584, 0x1E8, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D14__GPIO_3_14   IOMUX_PAD(0x584, 0x1E8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D14__WEIM_D14   IOMUX_PAD(0x584, 0x1E8, 2, 0x824, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D14__ELCDIF_D30   IOMUX_PAD(0x584, 0x1E8, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D14__AUD6_TXD   IOMUX_PAD(0x584, 0x1E8, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D15__EPDC_D15   IOMUX_PAD(0x588, 0x1EC, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D15__GPIO_3_15   IOMUX_PAD(0x588, 0x1EC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D15__WEIM_D15   IOMUX_PAD(0x588, 0x1EC, 2, 0x828, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_D15__ELCDIF_D31   IOMUX_PAD(0x588, 0x1EC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_D15__AUD6_TXC   IOMUX_PAD(0x588, 0x1EC, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDCLK__EPDC_GDCLK   IOMUX_PAD(0x58C, 0x1F0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDCLK__GPIO_3_16   IOMUX_PAD(0x58C, 0x1F0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDCLK__WEIM_D16   IOMUX_PAD(0x58C, 0x1F0, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDCLK__ELCDIF_D16   IOMUX_PAD(0x58C, 0x1F0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDCLK__AUD6_TXFS   IOMUX_PAD(0x58C, 0x1F0, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDSP__EPDC_GDSP   IOMUX_PAD(0x590, 0x1F4, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDSP__GPIO_3_17   IOMUX_PAD(0x590, 0x1F4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDSP__WEIM_D17   IOMUX_PAD(0x590, 0x1F4, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDSP__ELCDIF_D17   IOMUX_PAD(0x590, 0x1F4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDSP__AUD6_RXD   IOMUX_PAD(0x590, 0x1F4, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDOE__EPDC_GDOE   IOMUX_PAD(0x594, 0x1F8, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDOE__GPIO_3_18   IOMUX_PAD(0x594, 0x1F8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDOE__WEIM_D18   IOMUX_PAD(0x594, 0x1F8, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDOE__ELCDIF_D18   IOMUX_PAD(0x594, 0x1F8, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDOE__AUD6_RXC   IOMUX_PAD(0x594, 0x1F8, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDRL__EPDC_GDRL   IOMUX_PAD(0x598, 0x1FC, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDRL__GPIO_3_19   IOMUX_PAD(0x598, 0x1FC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDRL__WEIM_D19   IOMUX_PAD(0x598, 0x1FC, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDRL__ELCDIF_D19   IOMUX_PAD(0x598, 0x1FC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_GDRL__AUD6_RXFS   IOMUX_PAD(0x598, 0x1FC, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCLK__EPDC_SDCLK   IOMUX_PAD(0x59C, 0x200, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCLK__GPIO_3_20   IOMUX_PAD(0x59C, 0x200, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCLK__WEIM_D20   IOMUX_PAD(0x59C, 0x200, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCLK__ELCDIF_D20   IOMUX_PAD(0x59C, 0x200, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCLK__AUD5_TXD   IOMUX_PAD(0x59C, 0x200, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOEZ__EPDC_SDOEZ   IOMUX_PAD(0x5A0, 0x204, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOEZ__GPIO_3_21   IOMUX_PAD(0x5A0, 0x204, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOEZ__WEIM_D21   IOMUX_PAD(0x5A0, 0x204, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOEZ__ELCDIF_D21   IOMUX_PAD(0x5A0, 0x204, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOEZ__AUD5_TXC   IOMUX_PAD(0x5A0, 0x204, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOED__EPDC_SDOED   IOMUX_PAD(0x5A4, 0x208, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOED__GPIO_3_22   IOMUX_PAD(0x5A4, 0x208, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOED__WEIM_D22   IOMUX_PAD(0x5A4, 0x208, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOED__ELCDIF_D22   IOMUX_PAD(0x5A4, 0x208, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOED__AUD5_TXFS   IOMUX_PAD(0x5A4, 0x208, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOE__EPDC_SDOE   IOMUX_PAD(0x5A8, 0x20C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOE__GPIO_3_23   IOMUX_PAD(0x5A8, 0x20C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOE__WEIM_D23   IOMUX_PAD(0x5A8, 0x20C, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOE__ELCDIF_D23   IOMUX_PAD(0x5A8, 0x20C, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDOE__AUD5_RXD   IOMUX_PAD(0x5A8, 0x20C, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDLE__EPDC_SDLE   IOMUX_PAD(0x5AC, 0x210, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDLE__GPIO_3_24   IOMUX_PAD(0x5AC, 0x210, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDLE__WEIM_D24   IOMUX_PAD(0x5AC, 0x210, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDLE__ELCDIF_D8   IOMUX_PAD(0x5AC, 0x210, 3, 0x71c, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDLE__AUD5_RXC   IOMUX_PAD(0x5AC, 0x210, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCLKN__EPDC_SDCLKN   IOMUX_PAD(0x5B0, 0x214, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCLKN__GPIO_3_25   IOMUX_PAD(0x5B0, 0x214, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCLKN__WEIM_D25   IOMUX_PAD(0x5B0, 0x214, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCLKN__ELCDIF_D9   IOMUX_PAD(0x5B0, 0x214, 3, 0x720, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCLKN__AUD5_RXFS   IOMUX_PAD(0x5B0, 0x214, 4, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDSHR__EPDC_SDSHR   IOMUX_PAD(0x5B4, 0x218, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDSHR__GPIO_3_26   IOMUX_PAD(0x5B4, 0x218, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDSHR__WEIM_D26   IOMUX_PAD(0x5B4, 0x218, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDSHR__ELCDIF_D10   IOMUX_PAD(0x5B4, 0x218, 3, 0x724, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDSHR__AUD4_TXD   IOMUX_PAD(0x5B4, 0x218, 4, 0x6c8, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCOM__EPDC_PWRCOM   IOMUX_PAD(0x5B8, 0x21C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCOM__GPIO_3_27   IOMUX_PAD(0x5B8, 0x21C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCOM__WEIM_D27   IOMUX_PAD(0x5B8, 0x21C, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCOM__ELCDIF_D11   IOMUX_PAD(0x5B8, 0x21C, 3, 0x728, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCOM__AUD4_TXC   IOMUX_PAD(0x5B8, 0x21C, 4, 0x6d4, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRSTAT__EPDC_PWRSTAT   IOMUX_PAD(0x5BC, 0x220, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRSTAT__GPIO_3_28   IOMUX_PAD(0x5BC, 0x220, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRSTAT__WEIM_D28   IOMUX_PAD(0x5BC, 0x220, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRSTAT__ELCDIF_D12   IOMUX_PAD(0x5BC, 0x220, 3, 0x72c, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRSTAT__AUD4_TXFS   IOMUX_PAD(0x5BC, 0x220, 4, 0x6d8, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL0__EPDC_PWRCTRL0   IOMUX_PAD(0x5C0, 0x224, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL0__GPIO_3_29   IOMUX_PAD(0x5C0, 0x224, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL0__WEIM_D29   IOMUX_PAD(0x5C0, 0x224, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL0__ELCDIF_D13   IOMUX_PAD(0x5C0, 0x224, 3, 0x730, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL0__AUD4_RXD   IOMUX_PAD(0x5C0, 0x224, 4, 0x6c4, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL1__EPDC_PWRCTRL1   IOMUX_PAD(0x5C4, 0x228, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL1__GPIO_3_30   IOMUX_PAD(0x5C4, 0x228, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL1__WEIM_D30   IOMUX_PAD(0x5C4, 0x228, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL1__ELCDIF_D14   IOMUX_PAD(0x5C4, 0x228, 3, 0x734, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL1__AUD4_RXC   IOMUX_PAD(0x5C4, 0x228, 4, 0x6cc, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL2__EPDC_PWRCTRL2   IOMUX_PAD(0x5C8, 0x22C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL2__GPIO_3_31   IOMUX_PAD(0x5C8, 0x22C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL2__WEIM_D31   IOMUX_PAD(0x5C8, 0x22C, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL2__ELCDIF_D15   IOMUX_PAD(0x5C8, 0x22C, 3, 0x738, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL2__AUD4_RXFS   IOMUX_PAD(0x5C8, 0x22C, 4, 0x6d0, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL2__SDMA_EXT0   IOMUX_PAD(0x5C8, 0x22C, 6, 0x7b8, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL3__PWRCTRL3   IOMUX_PAD(0x5CC, 0x230, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL3__GPIO_4_20   IOMUX_PAD(0x5CC, 0x230, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL3__WEIM_EB2   IOMUX_PAD(0x5CC, 0x230, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_PWRCTRL3__SDMA_EXT1   IOMUX_PAD(0x5CC, 0x230, 6, 0x7bc, 1, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_VCOM0__EPDC_VCOM0   IOMUX_PAD(0x5D0, 0x234, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_VCOM0__GPIO_4_21   IOMUX_PAD(0x5D0, 0x234, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_VCOM0__WEIM_EB3   IOMUX_PAD(0x5D0, 0x234, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_VCOM1__EPDC_VCOM1   IOMUX_PAD(0x5D4, 0x238, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_VCOM1__GPIO_4_22   IOMUX_PAD(0x5D4, 0x238, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_VCOM1__WEIM_CS3   IOMUX_PAD(0x5D4, 0x238, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_BDR0__EPDC_BDR0   IOMUX_PAD(0x5D8, 0x23C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_BDR0__GPIO_4_23   IOMUX_PAD(0x5D8, 0x23C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_BDR0__ELCDIF_D7   IOMUX_PAD(0x5D8, 0x23C, 3, 0x718, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_BDR1__EPDC_BDR1   IOMUX_PAD(0x5DC, 0x240, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_BDR1__GPIO_4_24   IOMUX_PAD(0x5DC, 0x240, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_BDR1__ELCDIF_D6   IOMUX_PAD(0x5DC, 0x240, 3, 0x714, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE0__EPDC_SDCE0   IOMUX_PAD(0x5E0, 0x244, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE0__GPIO_4_25   IOMUX_PAD(0x5E0, 0x244, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE0__ELCDIF_D5   IOMUX_PAD(0x5E0, 0x244, 3, 0x710, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE1__EPDC_SDCE1   IOMUX_PAD(0x5E4, 0x248, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE1__GPIO_4_26   IOMUX_PAD(0x5E4, 0x248, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE1__ELCDIF_D4   IOMUX_PAD(0x5E4, 0x248, 2, 0x70c, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE2__EPDC_SDCE2   IOMUX_PAD(0x5E8, 0x24C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE2__GPIO_4_27   IOMUX_PAD(0x5E8, 0x24C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE2__ELCDIF_DAT3   IOMUX_PAD(0x5E8, 0x24C, 3, 0x708, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE3__EPDC_SDCE3   IOMUX_PAD(0x5EC, 0x250, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE3__GPIO_4_28   IOMUX_PAD(0x5EC, 0x250, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE3__ELCDIF_D2   IOMUX_PAD(0x5EC, 0x250, 3, 0x704, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE4__EPDC_SDCE4   IOMUX_PAD(0x5F0, 0x254, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE4__GPIO_4_29   IOMUX_PAD(0x5F0, 0x254, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE4__ELCDIF_D1   IOMUX_PAD(0x5F0, 0x254, 3, 0x700, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE5__EPDC_SDCE5   IOMUX_PAD(0x5F4, 0x258, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE5__GPIO_4_30   IOMUX_PAD(0x5F4, 0x258, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EPDC_SDCE5__ELCDIF_D0   IOMUX_PAD(0x5F4, 0x258, 3, 0x6fc, 1, MX50_ELCDIF_PAD_CTRL)
 
#define MX50_PAD_EIM_DA0__WEIM_A0   IOMUX_PAD(0x5F8, 0x25C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA0__GPIO_1_0   IOMUX_PAD(0x5F8, 0x25C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA0__KEY_COL4   IOMUX_PAD(0x5f8, 0x25C, 3, 0x790, 2, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA1__WEIM_A1   IOMUX_PAD(0x5FC, 0x260, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA1__GPIO_1_1   IOMUX_PAD(0x5FC, 0x260, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA1__KEY_ROW4   IOMUX_PAD(0x5fc, 0x260, 3, 0x7a0, 2, MX50_KEYPAD_CTRL)
 
#define MX50_PAD_EIM_DA2__WEIM_A2   IOMUX_PAD(0x600, 0x264, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA2__GPIO_1_2   IOMUX_PAD(0x600, 0x264, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA2__KEY_COL5   IOMUX_PAD(0x600, 0x264, 3, 0x794, 2, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA3__WEIM_A3   IOMUX_PAD(0x604, 0x268, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA3__GPIO_1_3   IOMUX_PAD(0x604, 0x268, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA3__KEY_ROW5   IOMUX_PAD(0x604, 0x268, 3, 0x7a4, 2, MX50_KEYPAD_CTRL)
 
#define MX50_PAD_EIM_DA4__WEIM_A4   IOMUX_PAD(0x608, 0x26C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA4__GPIO_1_4   IOMUX_PAD(0x608, 0x26C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA4__KEY_COL6   IOMUX_PAD(0x608, 0x26C, 3, 0x798, 2, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA5__WEIM_A5   IOMUX_PAD(0x60C, 0x270, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA5__GPIO_1_5   IOMUX_PAD(0x60C, 0x270, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA5__KEY_ROW6   IOMUX_PAD(0x60C, 0x270, 3, 0x7a8, 2, MX50_KEYPAD_CTRL)
 
#define MX50_PAD_EIM_DA6__WEIM_A6   IOMUX_PAD(0x610, 0x274, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA6__GPIO_1_6   IOMUX_PAD(0x610, 0x274, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA6__KEY_COL7   IOMUX_PAD(0x610, 0x274, 3, 0x79c, 2, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA7__WEIM_A7   IOMUX_PAD(0x614, 0x278, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA7__GPIO_1_7   IOMUX_PAD(0x614, 0x278, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA7__KEY_ROW7   IOMUX_PAD(0x614, 0x278, 3, 0x7ac, 2, MX50_KEYPAD_CTRL)
 
#define MX50_PAD_EIM_DA8__WEIM_A8   IOMUX_PAD(0x618, 0x27C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA8__GPIO_1_8   IOMUX_PAD(0x618, 0x27C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_EIM_DA8__NANDF_CLE   IOMUX_PAD(0x618, 0x27C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_EIM_DA9__WEIM_A9   IOMUX_PAD(0x61C, 0x280, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA9__GPIO_1_9   IOMUX_PAD(0x61C, 0x280, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_EIM_DA9__NANDF_ALE   IOMUX_PAD(0x61C, 0x280, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_EIM_DA10__WEIM_A10   IOMUX_PAD(0x620, 0x284, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA10__GPIO_1_10   IOMUX_PAD(0x620, 0x284, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_EIM_DA10__NANDF_CE0   IOMUX_PAD(0x620, 0x284, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_EIM_DA11__WEIM_A11   IOMUX_PAD(0x624, 0x288, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA11__GPIO_1_11   IOMUX_PAD(0x624, 0x288, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_EIM_DA11__NANDF_CE1   IOMUX_PAD(0x624, 0x288, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_EIM_DA12__WEIM_A12   IOMUX_PAD(0x628, 0x28C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA12__GPIO_1_12   IOMUX_PAD(0x628, 0x28C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_EIM_DA12__NANDF_CE2   IOMUX_PAD(0x628, 0x28C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_EIM_DA12__EPDC_SDCE6   IOMUX_PAD(0x628, 0x28C, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA13__WEIM_A13   IOMUX_PAD(0x62C, 0x290, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA13__GPIO_1_13   IOMUX_PAD(0x62C, 0x290, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_EIM_DA13__NANDF_CE3   IOMUX_PAD(0x62C, 0x290, 2, 0x0, 0, PAD_CTL_DSE_HIGH)
 
#define MX50_PIN_EIM_DA13__EPDC_SDCE7   IOMUX_PAD(0x62C, 0x290, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA14__WEIM_A14   IOMUX_PAD(0x630, 0x294, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA14__GPIO_1_14   IOMUX_PAD(0x630, 0x294, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA14__NANDF_READY
 
#define MX50_PAD_EIM_DA14__EPDC_SDCE8   IOMUX_PAD(0x630, 0x294, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA15__WEIM_A15   IOMUX_PAD(0x634, 0x298, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_DA15__GPIO_1_15   IOMUX_PAD(0x634, 0x298, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PIN_EIM_DA15__NANDF_DQS   IOMUX_PAD(0x634, 0x298, 2, 0x7B0, 2, PAD_CTL_DSE_HIGH)
 
#define MX50_PAD_EIM_DA15__EPDC_SDCE9   IOMUX_PAD(0x634, 0x298, 3, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_CS2__WEIM_CS2   IOMUX_PAD(0x638, 0x29C, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_CS2__GPIO_1_16   IOMUX_PAD(0x638, 0x29C, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_CS2__WEIM_A27   IOMUX_PAD(0x638, 0x29C, 2, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_CS1__WEIM_CS1   IOMUX_PAD(0x63C, 0x2A0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_CS1__GPIO_1_17   IOMUX_PAD(0x63C, 0x2A0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_CS0__WEIM_CS0   IOMUX_PAD(0x640, 0x2A4, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_CS0__GPIO_1_18   IOMUX_PAD(0x640, 0x2A4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_EB0__WEIM_EB0   IOMUX_PAD(0x644, 0x2A8, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_EB0__GPIO_1_19   IOMUX_PAD(0x644, 0x2A8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_EB1__WEIM_EB1   IOMUX_PAD(0x648, 0x2AC, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_EB1__GPIO_1_20   IOMUX_PAD(0x648, 0x2AC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_WAIT__WEIM_WAIT   IOMUX_PAD(0x64C, 0x2B0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_WAIT__GPIO_1_21   IOMUX_PAD(0x64C, 0x2B0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_BCLK__WEIM_BCLK   IOMUX_PAD(0x650, 0x2B4, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_BCLK__GPIO_1_22   IOMUX_PAD(0x650, 0x2B4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_RDY__WEIM_RDY   IOMUX_PAD(0x654, 0x2B8, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_RDY__GPIO_1_23   IOMUX_PAD(0x654, 0x2B8, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_OE__WEIM_OE   IOMUX_PAD(0x658, 0x2BC, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_OE__GPIO_1_24   IOMUX_PAD(0x658, 0x2BC, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_RW__WEIM_RW   IOMUX_PAD(0x65C, 0x2C0, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_RW__GPIO_1_25   IOMUX_PAD(0x65C, 0x2C0, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_LBA__WEIM_LBA   IOMUX_PAD(0x660, 0x2C4, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_LBA__GPIO_1_26   IOMUX_PAD(0x660, 0x2C4, 1, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_CRE__WEIM_CRE   IOMUX_PAD(0x664, 0x2C8, 0, 0x0, 0, NO_PAD_CTRL)
 
#define MX50_PAD_EIM_CRE__GPIO_1_27   IOMUX_PAD(0x664, 0x2C8, 1, 0x0, 0, NO_PAD_CTRL)
 

Macro Definition Documentation

#define MX50_CSPI_SS_PAD
Value:
(PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_22K_UP | PAD_CTL_DSE_HIGH)

Definition at line 48 of file iomux-mx50.h.

#define MX50_ELCDIF_PAD_CTRL   (PAD_CTL_PKE | PAD_CTL_DSE_HIGH)

Definition at line 24 of file iomux-mx50.h.

#define MX50_FEC_PAD_CTRL
Value:
(PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_22K_UP | PAD_CTL_ODE | \
PAD_CTL_DSE_HIGH)

Definition at line 37 of file iomux-mx50.h.

#define MX50_I2C_PAD_CTRL
Value:
(PAD_CTL_ODE | PAD_CTL_DSE_HIGH | \
PAD_CTL_PUS_100K_UP | PAD_CTL_HYS)

Definition at line 31 of file iomux-mx50.h.

#define MX50_KEYPAD_CTRL
Value:
(PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_HIGH)

Definition at line 45 of file iomux-mx50.h.

#define MX50_OWIRE_PAD_CTRL
Value:
(PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_ODE | \
PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST)

Definition at line 41 of file iomux-mx50.h.

#define MX50_PAD_CSPI_MISO__CSPI_MISO   IOMUX_PAD(0x368, 0xBC, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 263 of file iomux-mx50.h.

#define MX50_PAD_CSPI_MISO__GPIO_4_10   IOMUX_PAD(0x368, 0xBC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 264 of file iomux-mx50.h.

#define MX50_PAD_CSPI_MOSI__CSPI_MOSI   IOMUX_PAD(0x364, 0xB8, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 260 of file iomux-mx50.h.

#define MX50_PAD_CSPI_MOSI__GPIO_4_9   IOMUX_PAD(0x364, 0xB8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 261 of file iomux-mx50.h.

#define MX50_PAD_CSPI_SCLK__CSPI_SCLK   IOMUX_PAD(0x360, 0xB4, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 257 of file iomux-mx50.h.

#define MX50_PAD_CSPI_SCLK__GPIO_4_8   IOMUX_PAD(0x360, 0xB4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 258 of file iomux-mx50.h.

#define MX50_PAD_CSPI_SS0__CSPI_SS0   IOMUX_PAD(0x36C, 0xC0, 0, 0x0, 0, MX50_CSPI_SS_PAD)

Definition at line 266 of file iomux-mx50.h.

#define MX50_PAD_CSPI_SS0__GPIO_4_11   IOMUX_PAD(0x36C, 0xC0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 267 of file iomux-mx50.h.

#define MX50_PAD_DISP_BUSY__ELCDIF_HSYNC   IOMUX_PAD(0x43C, 0x15C, 0, 0x6f8, 2, MX50_ELCDIF_PAD_CTRL)

Definition at line 517 of file iomux-mx50.h.

#define MX50_PAD_DISP_BUSY__GPIO_2_18   IOMUX_PAD(0x43C, 0x15C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 518 of file iomux-mx50.h.

#define MX50_PAD_DISP_BUSY__WEIM_CS3   IOMUX_PAD(0x43C, 0x15C, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 519 of file iomux-mx50.h.

#define MX50_PAD_DISP_CS__ELCDIF_CS   IOMUX_PAD(0x438, 0x158, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 511 of file iomux-mx50.h.

#define MX50_PAD_DISP_CS__ELCDIF_HSYNC   IOMUX_PAD(0x438, 0x158, 2, 0x6f8, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 513 of file iomux-mx50.h.

#define MX50_PAD_DISP_CS__GPIO_2_21   IOMUX_PAD(0x438, 0x158, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 512 of file iomux-mx50.h.

#define MX50_PAD_DISP_CS__WEIM_A27   IOMUX_PAD(0x438, 0x158, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 514 of file iomux-mx50.h.

#define MX50_PAD_DISP_CS__WEIM_CS3   IOMUX_PAD(0x438, 0x158, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 515 of file iomux-mx50.h.

#define MX50_PAD_DISP_D0__DISP_D0   IOMUX_PAD(0x40C, 0x12C, 0, 0x6fc, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 454 of file iomux-mx50.h.

#define MX50_PAD_DISP_D0__FEC_TXCLK   IOMUX_PAD(0x40C, 0x12C, 2, 0x78c, 0, PAD_CTL_HYS | PAD_CTL_PKE)

Definition at line 456 of file iomux-mx50.h.

#define MX50_PAD_DISP_D0__GPIO_2_0   IOMUX_PAD(0x40C, 0x12C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 455 of file iomux-mx50.h.

#define MX50_PAD_DISP_D10__DISP_D10   IOMUX_PAD(0x478, 0x198, 0, 0x724, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 600 of file iomux-mx50.h.

#define MX50_PAD_DISP_D10__FEC_RX_DV   IOMUX_PAD(0x478, 0x198, 6, 0x784, 1, NO_PAD_CTRL)

Definition at line 606 of file iomux-mx50.h.

#define MX50_PAD_DISP_D10__GPIO_2_10   IOMUX_PAD(0x478, 0x198, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 601 of file iomux-mx50.h.

#define MX50_PAD_DISP_D10__KEY_COL5   IOMUX_PAD(0x478, 0x198, 5, 0x794, 1, NO_PAD_CTRL)

Definition at line 605 of file iomux-mx50.h.

#define MX50_PAD_DISP_D10__NANDF_CEN0   IOMUX_PAD(0x478, 0x198, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 602 of file iomux-mx50.h.

#define MX50_PAD_DISP_D10__SD3_LCTL   IOMUX_PAD(0x478, 0x198, 3, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 603 of file iomux-mx50.h.

#define MX50_PAD_DISP_D10__SD4_D0   IOMUX_PAD(0x478, 0x198, 4, 0x750, 1, MX50_SD_PAD_CTRL)

Definition at line 604 of file iomux-mx50.h.

#define MX50_PAD_DISP_D11__DISP_D11   IOMUX_PAD(0x47C, 0x19C, 0, 0x728, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 608 of file iomux-mx50.h.

#define MX50_PAD_DISP_D11__FEC_RDAT1   IOMUX_PAD(0x47C, 0x19C, 6, 0x77c, 1, NO_PAD_CTRL)

Definition at line 613 of file iomux-mx50.h.

#define MX50_PAD_DISP_D11__GPIO_2_11   IOMUX_PAD(0x47C, 0x19C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 609 of file iomux-mx50.h.

#define MX50_PAD_DISP_D11__KEY_ROW5   IOMUX_PAD(0x47C, 0x19C, 5, 0x7a4, 1, NO_PAD_CTRL)

Definition at line 612 of file iomux-mx50.h.

#define MX50_PAD_DISP_D11__NANDF_CEN1   IOMUX_PAD(0x47C, 0x19C, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 610 of file iomux-mx50.h.

#define MX50_PAD_DISP_D11__SD4_D1   IOMUX_PAD(0x47C, 0x19C, 4, 0x754, 1, MX50_SD_PAD_CTRL)

Definition at line 611 of file iomux-mx50.h.

#define MX50_PAD_DISP_D12__DISP_D12   IOMUX_PAD(0x480, 0x1A0, 0, 0x72c, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 615 of file iomux-mx50.h.

#define MX50_PAD_DISP_D12__FEC_RDAT0   IOMUX_PAD(0x480, 0x1A0, 6, 0x778, 1, NO_PAD_CTRL)

Definition at line 621 of file iomux-mx50.h.

#define MX50_PAD_DISP_D12__GPIO_2_12   IOMUX_PAD(0x480, 0x1A0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 616 of file iomux-mx50.h.

#define MX50_PAD_DISP_D12__KEY_COL6   IOMUX_PAD(0x480, 0x1A0, 5, 0x798, 1, NO_PAD_CTRL)

Definition at line 620 of file iomux-mx50.h.

#define MX50_PAD_DISP_D12__NANDF_CEN2   IOMUX_PAD(0x480, 0x1A0, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 617 of file iomux-mx50.h.

#define MX50_PAD_DISP_D12__SD1_CD   IOMUX_PAD(0x480, 0x1A0, 3, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 618 of file iomux-mx50.h.

#define MX50_PAD_DISP_D12__SD4_D2   IOMUX_PAD(0x480, 0x1A0, 4, 0x758, 1, MX50_SD_PAD_CTRL)

Definition at line 619 of file iomux-mx50.h.

#define MX50_PAD_DISP_D13__DISP_D13   IOMUX_PAD(0x484, 0x1A4, 0, 0x730, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 623 of file iomux-mx50.h.

#define MX50_PAD_DISP_D13__FEC_TX_EN   IOMUX_PAD(0x484, 0x1A4, 6, 0x0, 0, NO_PAD_CTRL)

Definition at line 629 of file iomux-mx50.h.

#define MX50_PAD_DISP_D13__GPIO_2_13   IOMUX_PAD(0x484, 0x1A4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 624 of file iomux-mx50.h.

#define MX50_PAD_DISP_D13__KEY_ROW6   IOMUX_PAD(0x484, 0x1A4, 5, 0x7a8, 1, NO_PAD_CTRL)

Definition at line 628 of file iomux-mx50.h.

#define MX50_PAD_DISP_D13__NANDF_CEN3   IOMUX_PAD(0x484, 0x1A4, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 625 of file iomux-mx50.h.

#define MX50_PAD_DISP_D13__SD3_CD   IOMUX_PAD(0x484, 0x1A4, 3, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 626 of file iomux-mx50.h.

#define MX50_PAD_DISP_D13__SD4_D3   IOMUX_PAD(0x484, 0x1A4, 4, 0x75c, 1, MX50_SD_PAD_CTRL)

Definition at line 627 of file iomux-mx50.h.

#define MX50_PAD_DISP_D14__DISP_D14   IOMUX_PAD(0x488, 0x1A8, 0, 0x734, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 631 of file iomux-mx50.h.

#define MX50_PAD_DISP_D14__FEC_TDAT1   IOMUX_PAD(0x488, 0x1A8, 6, 0x0, 0, NO_PAD_CTRL)

Definition at line 637 of file iomux-mx50.h.

#define MX50_PAD_DISP_D14__GPIO_2_14   IOMUX_PAD(0x488, 0x1A8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 632 of file iomux-mx50.h.

#define MX50_PAD_DISP_D14__KEY_COL7   IOMUX_PAD(0x488, 0x1A8, 5, 0x79c, 1, NO_PAD_CTRL)

Definition at line 636 of file iomux-mx50.h.

#define MX50_PAD_DISP_D14__NANDF_RDY0   IOMUX_PAD(0x488, 0x1A8, 2, 0x7b4, 1, NO_PAD_CTRL)

Definition at line 633 of file iomux-mx50.h.

#define MX50_PAD_DISP_D14__SD1_WP   IOMUX_PAD(0x488, 0x1A8, 3, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 634 of file iomux-mx50.h.

#define MX50_PAD_DISP_D14__SD4_WP   IOMUX_PAD(0x488, 0x1A8, 4, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 635 of file iomux-mx50.h.

#define MX50_PAD_DISP_D15__DISP_D15   IOMUX_PAD(0x48C, 0x1AC, 0, 0x738, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 639 of file iomux-mx50.h.

#define MX50_PAD_DISP_D15__FEC_TDAT0   IOMUX_PAD(0x48C, 0x1AC, 6, 0x0, 0, NO_PAD_CTRL)

Definition at line 645 of file iomux-mx50.h.

#define MX50_PAD_DISP_D15__GPIO_2_15   IOMUX_PAD(0x48C, 0x1AC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 640 of file iomux-mx50.h.

#define MX50_PAD_DISP_D15__KEY_ROW7   IOMUX_PAD(0x48C, 0x1AC, 5, 0x7ac, 1, NO_PAD_CTRL)

Definition at line 644 of file iomux-mx50.h.

#define MX50_PAD_DISP_D15__NANDF_DQS   IOMUX_PAD(0x48C, 0x1AC, 2, 0x7b0, 1, NO_PAD_CTRL)

Definition at line 641 of file iomux-mx50.h.

#define MX50_PAD_DISP_D15__SD3_RST   IOMUX_PAD(0x48C, 0x1AC, 3, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 642 of file iomux-mx50.h.

#define MX50_PAD_DISP_D15__SD4_CD   IOMUX_PAD(0x48C, 0x1AC, 4, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 643 of file iomux-mx50.h.

#define MX50_PAD_DISP_D1__DISP_D1   IOMUX_PAD(0x410, 0x130, 0, 0x700, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 458 of file iomux-mx50.h.

#define MX50_PAD_DISP_D1__FEC_RX_ER   IOMUX_PAD(0x410, 0x130, 2, 0x788, 0, PAD_CTL_HYS | PAD_CTL_PKE)

Definition at line 460 of file iomux-mx50.h.

#define MX50_PAD_DISP_D1__GPIO_2_1   IOMUX_PAD(0x410, 0x130, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 459 of file iomux-mx50.h.

#define MX50_PAD_DISP_D1__WEIM_A17   IOMUX_PAD(0x410, 0x130, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 461 of file iomux-mx50.h.

#define MX50_PAD_DISP_D2__DISP_D2   IOMUX_PAD(0x414, 0x134, 0, 0x704, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 463 of file iomux-mx50.h.

#define MX50_PAD_DISP_D2__FEC_RX_DV   IOMUX_PAD(0x414, 0x134, 2, 0x784, 0, PAD_CTL_HYS | PAD_CTL_PKE)

Definition at line 465 of file iomux-mx50.h.

#define MX50_PAD_DISP_D2__GPIO_2_2   IOMUX_PAD(0x414, 0x134, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 464 of file iomux-mx50.h.

#define MX50_PAD_DISP_D2__WEIM_A18   IOMUX_PAD(0x414, 0x134, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 466 of file iomux-mx50.h.

#define MX50_PAD_DISP_D3__DISP_D3   IOMUX_PAD(0x418, 0x138, 0, 0x708, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 468 of file iomux-mx50.h.

#define MX50_PAD_DISP_D3__FEC_COL   IOMUX_PAD(0x418, 0x138, 4, 0x770, 1, NO_PAD_CTRL)

Definition at line 472 of file iomux-mx50.h.

#define MX50_PAD_DISP_D3__FEC_RXD1   IOMUX_PAD(0x418, 0x138, 2, 0x77C, 0, PAD_CTL_HYS | PAD_CTL_PKE)

Definition at line 470 of file iomux-mx50.h.

#define MX50_PAD_DISP_D3__GPIO_2_3   IOMUX_PAD(0x418, 0x138, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 469 of file iomux-mx50.h.

#define MX50_PAD_DISP_D3__WEIM_A19   IOMUX_PAD(0x418, 0x138, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 471 of file iomux-mx50.h.

#define MX50_PAD_DISP_D4__DISP_D4   IOMUX_PAD(0x41C, 0x13C, 0, 0x70c, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 474 of file iomux-mx50.h.

#define MX50_PAD_DISP_D4__FEC_RXD0   IOMUX_PAD(0x41C, 0x13C, 2, 0x778, 0, PAD_CTL_HYS | PAD_CTL_PKE)

Definition at line 476 of file iomux-mx50.h.

#define MX50_PAD_DISP_D4__GPIO_2_4   IOMUX_PAD(0x41C, 0x13C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 475 of file iomux-mx50.h.

#define MX50_PAD_DISP_D4__WEIM_A20   IOMUX_PAD(0x41C, 0x13C, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 477 of file iomux-mx50.h.

#define MX50_PAD_DISP_D5__DISP_D5   IOMUX_PAD(0x420, 0x140, 0, 0x710, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 479 of file iomux-mx50.h.

#define MX50_PAD_DISP_D5__FEC_TX_EN   IOMUX_PAD(0x420, 0x140, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 481 of file iomux-mx50.h.

#define MX50_PAD_DISP_D5__GPIO_2_5   IOMUX_PAD(0x420, 0x140, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 480 of file iomux-mx50.h.

#define MX50_PAD_DISP_D5__WEIM_A21   IOMUX_PAD(0x420, 0x140, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 482 of file iomux-mx50.h.

#define MX50_PAD_DISP_D6__DISP_D6   IOMUX_PAD(0x424, 0x144, 0, 0x714, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 484 of file iomux-mx50.h.

#define MX50_PAD_DISP_D6__FEC_RX_CLK   IOMUX_PAD(0x424, 0x144, 4, 0x780, 1, NO_PAD_CTRL)

Definition at line 488 of file iomux-mx50.h.

#define MX50_PAD_DISP_D6__FEC_TXD1   IOMUX_PAD(0x424, 0x144, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 486 of file iomux-mx50.h.

#define MX50_PAD_DISP_D6__GPIO_2_6   IOMUX_PAD(0x424, 0x144, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 485 of file iomux-mx50.h.

#define MX50_PAD_DISP_D6__WEIM_A22   IOMUX_PAD(0x424, 0x144, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 487 of file iomux-mx50.h.

#define MX50_PAD_DISP_D7__DISP_D7   IOMUX_PAD(0x428, 0x148, 0, 0x718, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 490 of file iomux-mx50.h.

#define MX50_PAD_DISP_D7__FEC_TXD0   IOMUX_PAD(0x428, 0x148, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 492 of file iomux-mx50.h.

#define MX50_PAD_DISP_D7__GPIO_2_7   IOMUX_PAD(0x428, 0x148, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 491 of file iomux-mx50.h.

#define MX50_PAD_DISP_D7__WEIM_A23   IOMUX_PAD(0x428, 0x148, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 493 of file iomux-mx50.h.

#define MX50_PAD_DISP_D8__DISP_D8   IOMUX_PAD(0x470, 0x190, 0, 0x71c, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 584 of file iomux-mx50.h.

#define MX50_PAD_DISP_D8__FEC_TX_CLK   IOMUX_PAD(0x470, 0x190, 6, 0x78c, 1, NO_PAD_CTRL)

Definition at line 590 of file iomux-mx50.h.

#define MX50_PAD_DISP_D8__GPIO_2_8   IOMUX_PAD(0x470, 0x190, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 585 of file iomux-mx50.h.

#define MX50_PAD_DISP_D8__KEY_COL4   IOMUX_PAD(0x470, 0x190, 5, 0x790, 1, NO_PAD_CTRL)

Definition at line 589 of file iomux-mx50.h.

#define MX50_PAD_DISP_D8__NANDF_CLE   IOMUX_PAD(0x470, 0x190, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 586 of file iomux-mx50.h.

#define MX50_PAD_DISP_D8__SD1_LCTL   IOMUX_PAD(0x470, 0x190, 3, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 587 of file iomux-mx50.h.

#define MX50_PAD_DISP_D8__SD4_CMD   IOMUX_PAD(0x470, 0x190, 4, 0x74c, 2, MX50_SD_PAD_CTRL)

Definition at line 588 of file iomux-mx50.h.

#define MX50_PAD_DISP_D9__DISP_D9   IOMUX_PAD(0x474, 0x194, 0, 0x720, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 592 of file iomux-mx50.h.

#define MX50_PAD_DISP_D9__FEC_RX_ER   IOMUX_PAD(0x474, 0x194, 6, 0x788, 1, NO_PAD_CTRL)

Definition at line 598 of file iomux-mx50.h.

#define MX50_PAD_DISP_D9__GPIO_2_9   IOMUX_PAD(0x474, 0x194, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 593 of file iomux-mx50.h.

#define MX50_PAD_DISP_D9__KEY_ROW4   IOMUX_PAD(0x474, 0x194, 5, 0x7a0, 1, NO_PAD_CTRL)

Definition at line 597 of file iomux-mx50.h.

#define MX50_PAD_DISP_D9__NANDF_ALE   IOMUX_PAD(0x474, 0x194, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 594 of file iomux-mx50.h.

#define MX50_PAD_DISP_D9__SD2_LCTL   IOMUX_PAD(0x474, 0x194, 3, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 595 of file iomux-mx50.h.

#define MX50_PAD_DISP_D9__SD4_CLK   IOMUX_PAD(0x474, 0x194, 4, 0x748, 2, MX50_SD_PAD_CTRL)

Definition at line 596 of file iomux-mx50.h.

#define MX50_PAD_DISP_RD__ELCDIF_EN   IOMUX_PAD(0x430, 0x150, 2, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 503 of file iomux-mx50.h.

#define MX50_PAD_DISP_RD__ELCDIF_RD   IOMUX_PAD(0x430, 0x150, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 501 of file iomux-mx50.h.

#define MX50_PAD_DISP_RD__GPIO_2_19   IOMUX_PAD(0x430, 0x150, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 502 of file iomux-mx50.h.

#define MX50_PAD_DISP_RD__WEIM_A25   IOMUX_PAD(0x430, 0x150, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 504 of file iomux-mx50.h.

#define MX50_PAD_DISP_RESET__ELCDIF_RST   IOMUX_PAD(0x440, 0x160, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 521 of file iomux-mx50.h.

#define MX50_PAD_DISP_RESET__GPIO_2_20   IOMUX_PAD(0x440, 0x160, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 522 of file iomux-mx50.h.

#define MX50_PAD_DISP_RESET__WEIM_CS3   IOMUX_PAD(0x440, 0x160, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 523 of file iomux-mx50.h.

#define MX50_PAD_DISP_RS__ELCDIF_RS   IOMUX_PAD(0x434, 0x154, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 506 of file iomux-mx50.h.

#define MX50_PAD_DISP_RS__ELCDIF_VSYNC   IOMUX_PAD(0x434, 0x154, 2, 0x73c, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 508 of file iomux-mx50.h.

#define MX50_PAD_DISP_RS__GPIO_2_17   IOMUX_PAD(0x434, 0x154, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 507 of file iomux-mx50.h.

#define MX50_PAD_DISP_RS__WEIM_A26   IOMUX_PAD(0x434, 0x154, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 509 of file iomux-mx50.h.

#define MX50_PAD_DISP_WR__ELCDIF_PIXCLK   IOMUX_PAD(0x42C, 0x14C, 2, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 498 of file iomux-mx50.h.

#define MX50_PAD_DISP_WR__ELCDIF_WR   IOMUX_PAD(0x42C, 0x14C, 0, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 496 of file iomux-mx50.h.

#define MX50_PAD_DISP_WR__GPIO_2_16   IOMUX_PAD(0x42C, 0x14C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 497 of file iomux-mx50.h.

#define MX50_PAD_DISP_WR__WEIM_A24   IOMUX_PAD(0x42C, 0x14C, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 499 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MISO__CSPI_SS2   IOMUX_PAD(0x378, 0xCC, 2, 0x6f0, 1, MX50_CSPI_SS_PAD)

Definition at line 287 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MISO__ECSPI1_MISO   IOMUX_PAD(0x378, 0xCC, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 285 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MISO__ECSPI2_SS2   IOMUX_PAD(0x378, 0xCC, 3, 0x0, 0, MX50_CSPI_SS_PAD)

Definition at line 288 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MISO__EPDC_SDCE8   IOMUX_PAD(0x378, 0xCC, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 290 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MISO__GPIO_4_14   IOMUX_PAD(0x378, 0xCC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 286 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MISO__UART4_RTS   IOMUX_PAD(0x378, 0xCC, 4, 0x7d8, 0, MX50_UART_PAD_CTRL)

Definition at line 289 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MISO__WEIM_D10   IOMUX_PAD(0x378, 0xCC, 7, 0x814, 0, NO_PAD_CTRL)

Definition at line 291 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MOSI__CSPI_SS1   IOMUX_PAD(0x374, 0xC8, 2, 0x6ec, 1, MX50_CSPI_SS_PAD)

Definition at line 279 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MOSI__ECSPI1_MOSI   IOMUX_PAD(0x374, 0xC8, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 277 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MOSI__ECSPI2_SS1   IOMUX_PAD(0x374, 0xC8, 3, 0x0, 0, MX50_CSPI_SS_PAD)

Definition at line 280 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MOSI__EPDC_SDCE7   IOMUX_PAD(0x374, 0xC8, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 282 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MOSI__GPIO_4_13   IOMUX_PAD(0x374, 0xC8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 278 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MOSI__UART3_CTS   IOMUX_PAD(0x374, 0xC8, 4, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 281 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_MOSI__WEIM_D9   IOMUX_PAD(0x374, 0xC8, 7, 0x810, 0, NO_PAD_CTRL)

Definition at line 283 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SCLK__CSPI_RDY   IOMUX_PAD(0x370, 0xC4, 2, 0x6e8, 1, NO_PAD_CTRL)

Definition at line 271 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SCLK__ECSPI1_SCLK   IOMUX_PAD(0x370, 0xC4, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 269 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SCLK__ECSPI2_RDY   IOMUX_PAD(0x370, 0xC4, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 272 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SCLK__EPDC_SDCE6   IOMUX_PAD(0x370, 0xC4, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 274 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SCLK__GPIO_4_12   IOMUX_PAD(0x370, 0xC4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 270 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SCLK__UART3_RTS   IOMUX_PAD(0x370, 0xC4, 4, 0x7d0, 2, MX50_UART_PAD_CTRL)

Definition at line 273 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SCLK__WEIM_D8   IOMUX_PAD(0x370, 0xC4, 7, 0x80c, 0, NO_PAD_CTRL)

Definition at line 275 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SS0__CSPI_SS3   IOMUX_PAD(0x37C, 0xD0, 2, 0x6f4, 1, MX50_CSPI_SS_PAD)

Definition at line 295 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SS0__ECSPI1_SS0   IOMUX_PAD(0x37C, 0xD0, 0, 0x0, 0, MX50_CSPI_SS_PAD)

Definition at line 293 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SS0__ECSPI2_SS3   IOMUX_PAD(0x37C, 0xD0, 3, 0x0, 0, MX50_CSPI_SS_PAD)

Definition at line 296 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SS0__EPDC_SDCE9   IOMUX_PAD(0x37C, 0xD0, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 298 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SS0__GPIO_4_15   IOMUX_PAD(0x37C, 0xD0, 1, 0x0, 0, PAD_CTL_PUS_100K_UP)

Definition at line 294 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SS0__UART4_CTS   IOMUX_PAD(0x37C, 0xD0, 4, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 297 of file iomux-mx50.h.

#define MX50_PAD_ECSPI1_SS0__WEIM_D11   IOMUX_PAD(0x37C, 0xD0, 7, 0x818, 0, NO_PAD_CTRL)

Definition at line 299 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MISO__ECSPI1_SS2   IOMUX_PAD(0x388, 0xDC, 3, 0x0, 0, MX50_CSPI_SS_PAD)

Definition at line 322 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MISO__ECSPI2_MISO   IOMUX_PAD(0x388, 0xDC, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 319 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MISO__ELCDIF_RS   IOMUX_PAD(0x388, 0xDC, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 321 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MISO__ELCDIF_VSYNC   IOMUX_PAD(0x388, 0xDC, 5, 0x73c, 0, NO_PAD_CTRL)

Definition at line 324 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MISO__GPIO_4_18   IOMUX_PAD(0x388, 0xDC, 1, 0x0, 0, PAD_CTL_PUS_100K_UP)

Definition at line 320 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MISO__NANDF_CEN6   IOMUX_PAD(0x388, 0xDC, 6, 0x0, 0, NO_PAD_CTRL)

Definition at line 325 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MISO__UART5_TXD   IOMUX_PAD(0x388, 0xDC, 4, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 323 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MISO__WEIM_D10   IOMUX_PAD(0x388, 0xDC, 7, 0x814, 1, NO_PAD_CTRL)

Definition at line 326 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MOSI__ECSPI1_SS1   IOMUX_PAD(0x384, 0xD8, 3, 0x0, 0, MX50_CSPI_SS_PAD)

Definition at line 313 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MOSI__ECSPI2_MOSI   IOMUX_PAD(0x384, 0xD8, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 310 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MOSI__ELCDIF_EN   IOMUX_PAD(0x384, 0xD8, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 315 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MOSI__ELCDIF_RD   IOMUX_PAD(0x384, 0xD8, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 312 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MOSI__GPIO_4_17   IOMUX_PAD(0x384, 0xD8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 311 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MOSI__NANDF_CEN5   IOMUX_PAD(0x384, 0xD8, 6, 0x0, 0, NO_PAD_CTRL)

Definition at line 316 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MOSI__UART5_CTS   IOMUX_PAD(0x384, 0xD8, 4, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 314 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_MOSI__WEIM_D9   IOMUX_PAD(0x384, 0xD8, 7, 0x810, 1, NO_PAD_CTRL)

Definition at line 317 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SCLK__ECSPI1_RDY   IOMUX_PAD(0x380, 0xD4, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 304 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SCLK__ECSPI2_SCLK   IOMUX_PAD(0x380, 0xD4, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 301 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SCLK__ELCDIF_DOTCLK   IOMUX_PAD(0x380, 0xD4, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 306 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SCLK__ELCDIF_WR   IOMUX_PAD(0x380, 0xD4, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 303 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SCLK__GPIO_4_16   IOMUX_PAD(0x380, 0xD4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 302 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SCLK__NANDF_CEN4   IOMUX_PAD(0x380, 0xD4, 6, 0x0, 0, NO_PAD_CTRL)

Definition at line 307 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SCLK__UART5_RTS   IOMUX_PAD(0x380, 0xD4, 4, 0x7e0, 0, MX50_UART_PAD_CTRL)

Definition at line 305 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SCLK__WEIM_D8   IOMUX_PAD(0x380, 0xD4, 7, 0x80c, 1, NO_PAD_CTRL)

Definition at line 308 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SS0__ECSPI1_SS3   IOMUX_PAD(0x38C, 0xE0, 3, 0x0, 0, MX50_CSPI_SS_PAD)

Definition at line 331 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SS0__ECSPI2_SS0   IOMUX_PAD(0x38C, 0xE0, 0, 0x0, 0, MX50_CSPI_SS_PAD)

Definition at line 328 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SS0__ELCDIF_CS   IOMUX_PAD(0x38C, 0xE0, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 330 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SS0__ELCDIF_HSYNC   IOMUX_PAD(0x38C, 0xE0, 5, 0x6f8, 0, NO_PAD_CTRL)

Definition at line 333 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SS0__GPIO_4_19   IOMUX_PAD(0x38C, 0xE0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 329 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SS0__NANDF_CEN7   IOMUX_PAD(0x38C, 0xE0, 6, 0x0, 0, NO_PAD_CTRL)

Definition at line 334 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SS0__UART5_RXD   IOMUX_PAD(0x38C, 0xE0, 4, 0x7e4, 5, MX50_UART_PAD_CTRL)

Definition at line 332 of file iomux-mx50.h.

#define MX50_PAD_ECSPI2_SS0__WEIM_D11   IOMUX_PAD(0x38C, 0xE0, 7, 0x818, 1, NO_PAD_CTRL)

Definition at line 335 of file iomux-mx50.h.

#define MX50_PAD_EIM_BCLK__GPIO_1_22   IOMUX_PAD(0x650, 0x2B4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 960 of file iomux-mx50.h.

#define MX50_PAD_EIM_BCLK__WEIM_BCLK   IOMUX_PAD(0x650, 0x2B4, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 959 of file iomux-mx50.h.

#define MX50_PAD_EIM_CRE__GPIO_1_27   IOMUX_PAD(0x664, 0x2C8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 975 of file iomux-mx50.h.

#define MX50_PAD_EIM_CRE__WEIM_CRE   IOMUX_PAD(0x664, 0x2C8, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 974 of file iomux-mx50.h.

#define MX50_PAD_EIM_CS0__GPIO_1_18   IOMUX_PAD(0x640, 0x2A4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 948 of file iomux-mx50.h.

#define MX50_PAD_EIM_CS0__WEIM_CS0   IOMUX_PAD(0x640, 0x2A4, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 947 of file iomux-mx50.h.

#define MX50_PAD_EIM_CS1__GPIO_1_17   IOMUX_PAD(0x63C, 0x2A0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 945 of file iomux-mx50.h.

#define MX50_PAD_EIM_CS1__WEIM_CS1   IOMUX_PAD(0x63C, 0x2A0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 944 of file iomux-mx50.h.

#define MX50_PAD_EIM_CS2__GPIO_1_16   IOMUX_PAD(0x638, 0x29C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 941 of file iomux-mx50.h.

#define MX50_PAD_EIM_CS2__WEIM_A27   IOMUX_PAD(0x638, 0x29C, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 942 of file iomux-mx50.h.

#define MX50_PAD_EIM_CS2__WEIM_CS2   IOMUX_PAD(0x638, 0x29C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 940 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA0__GPIO_1_0   IOMUX_PAD(0x5F8, 0x25C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 872 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA0__KEY_COL4   IOMUX_PAD(0x5f8, 0x25C, 3, 0x790, 2, NO_PAD_CTRL)

Definition at line 873 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA0__WEIM_A0   IOMUX_PAD(0x5F8, 0x25C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 871 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA10__GPIO_1_10   IOMUX_PAD(0x620, 0x284, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 912 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA10__WEIM_A10   IOMUX_PAD(0x620, 0x284, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 911 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA11__GPIO_1_11   IOMUX_PAD(0x624, 0x288, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 916 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA11__WEIM_A11   IOMUX_PAD(0x624, 0x288, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 915 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA12__EPDC_SDCE6   IOMUX_PAD(0x628, 0x28C, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 922 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA12__GPIO_1_12   IOMUX_PAD(0x628, 0x28C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 920 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA12__WEIM_A12   IOMUX_PAD(0x628, 0x28C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 919 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA13__GPIO_1_13   IOMUX_PAD(0x62C, 0x290, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 925 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA13__WEIM_A13   IOMUX_PAD(0x62C, 0x290, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 924 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA14__EPDC_SDCE8   IOMUX_PAD(0x630, 0x294, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 933 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA14__GPIO_1_14   IOMUX_PAD(0x630, 0x294, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 930 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA14__NANDF_READY
Value:
IOMUX_PAD(0x630, 0x294, 2, 0x7B4, 2, PAD_CTL_PKE | \
PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)

Definition at line 931 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA14__WEIM_A14   IOMUX_PAD(0x630, 0x294, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 929 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA15__EPDC_SDCE9   IOMUX_PAD(0x634, 0x298, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 938 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA15__GPIO_1_15   IOMUX_PAD(0x634, 0x298, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 936 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA15__WEIM_A15   IOMUX_PAD(0x634, 0x298, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 935 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA1__GPIO_1_1   IOMUX_PAD(0x5FC, 0x260, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 876 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA1__KEY_ROW4   IOMUX_PAD(0x5fc, 0x260, 3, 0x7a0, 2, MX50_KEYPAD_CTRL)

Definition at line 877 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA1__WEIM_A1   IOMUX_PAD(0x5FC, 0x260, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 875 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA2__GPIO_1_2   IOMUX_PAD(0x600, 0x264, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 880 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA2__KEY_COL5   IOMUX_PAD(0x600, 0x264, 3, 0x794, 2, NO_PAD_CTRL)

Definition at line 881 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA2__WEIM_A2   IOMUX_PAD(0x600, 0x264, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 879 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA3__GPIO_1_3   IOMUX_PAD(0x604, 0x268, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 884 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA3__KEY_ROW5   IOMUX_PAD(0x604, 0x268, 3, 0x7a4, 2, MX50_KEYPAD_CTRL)

Definition at line 885 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA3__WEIM_A3   IOMUX_PAD(0x604, 0x268, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 883 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA4__GPIO_1_4   IOMUX_PAD(0x608, 0x26C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 888 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA4__KEY_COL6   IOMUX_PAD(0x608, 0x26C, 3, 0x798, 2, NO_PAD_CTRL)

Definition at line 889 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA4__WEIM_A4   IOMUX_PAD(0x608, 0x26C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 887 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA5__GPIO_1_5   IOMUX_PAD(0x60C, 0x270, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 892 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA5__KEY_ROW6   IOMUX_PAD(0x60C, 0x270, 3, 0x7a8, 2, MX50_KEYPAD_CTRL)

Definition at line 893 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA5__WEIM_A5   IOMUX_PAD(0x60C, 0x270, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 891 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA6__GPIO_1_6   IOMUX_PAD(0x610, 0x274, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 896 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA6__KEY_COL7   IOMUX_PAD(0x610, 0x274, 3, 0x79c, 2, NO_PAD_CTRL)

Definition at line 897 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA6__WEIM_A6   IOMUX_PAD(0x610, 0x274, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 895 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA7__GPIO_1_7   IOMUX_PAD(0x614, 0x278, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 900 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA7__KEY_ROW7   IOMUX_PAD(0x614, 0x278, 3, 0x7ac, 2, MX50_KEYPAD_CTRL)

Definition at line 901 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA7__WEIM_A7   IOMUX_PAD(0x614, 0x278, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 899 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA8__GPIO_1_8   IOMUX_PAD(0x618, 0x27C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 904 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA8__WEIM_A8   IOMUX_PAD(0x618, 0x27C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 903 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA9__GPIO_1_9   IOMUX_PAD(0x61C, 0x280, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 908 of file iomux-mx50.h.

#define MX50_PAD_EIM_DA9__WEIM_A9   IOMUX_PAD(0x61C, 0x280, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 907 of file iomux-mx50.h.

#define MX50_PAD_EIM_EB0__GPIO_1_19   IOMUX_PAD(0x644, 0x2A8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 951 of file iomux-mx50.h.

#define MX50_PAD_EIM_EB0__WEIM_EB0   IOMUX_PAD(0x644, 0x2A8, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 950 of file iomux-mx50.h.

#define MX50_PAD_EIM_EB1__GPIO_1_20   IOMUX_PAD(0x648, 0x2AC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 954 of file iomux-mx50.h.

#define MX50_PAD_EIM_EB1__WEIM_EB1   IOMUX_PAD(0x648, 0x2AC, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 953 of file iomux-mx50.h.

#define MX50_PAD_EIM_LBA__GPIO_1_26   IOMUX_PAD(0x660, 0x2C4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 972 of file iomux-mx50.h.

#define MX50_PAD_EIM_LBA__WEIM_LBA   IOMUX_PAD(0x660, 0x2C4, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 971 of file iomux-mx50.h.

#define MX50_PAD_EIM_OE__GPIO_1_24   IOMUX_PAD(0x658, 0x2BC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 966 of file iomux-mx50.h.

#define MX50_PAD_EIM_OE__WEIM_OE   IOMUX_PAD(0x658, 0x2BC, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 965 of file iomux-mx50.h.

#define MX50_PAD_EIM_RDY__GPIO_1_23   IOMUX_PAD(0x654, 0x2B8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 963 of file iomux-mx50.h.

#define MX50_PAD_EIM_RDY__WEIM_RDY   IOMUX_PAD(0x654, 0x2B8, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 962 of file iomux-mx50.h.

#define MX50_PAD_EIM_RW__GPIO_1_25   IOMUX_PAD(0x65C, 0x2C0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 969 of file iomux-mx50.h.

#define MX50_PAD_EIM_RW__WEIM_RW   IOMUX_PAD(0x65C, 0x2C0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 968 of file iomux-mx50.h.

#define MX50_PAD_EIM_WAIT__GPIO_1_21   IOMUX_PAD(0x64C, 0x2B0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 957 of file iomux-mx50.h.

#define MX50_PAD_EIM_WAIT__WEIM_WAIT   IOMUX_PAD(0x64C, 0x2B0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 956 of file iomux-mx50.h.

#define MX50_PAD_EPDC_BDR0__ELCDIF_D7   IOMUX_PAD(0x5D8, 0x23C, 3, 0x718, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 841 of file iomux-mx50.h.

#define MX50_PAD_EPDC_BDR0__EPDC_BDR0   IOMUX_PAD(0x5D8, 0x23C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 839 of file iomux-mx50.h.

#define MX50_PAD_EPDC_BDR0__GPIO_4_23   IOMUX_PAD(0x5D8, 0x23C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 840 of file iomux-mx50.h.

#define MX50_PAD_EPDC_BDR1__ELCDIF_D6   IOMUX_PAD(0x5DC, 0x240, 3, 0x714, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 845 of file iomux-mx50.h.

#define MX50_PAD_EPDC_BDR1__EPDC_BDR1   IOMUX_PAD(0x5DC, 0x240, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 843 of file iomux-mx50.h.

#define MX50_PAD_EPDC_BDR1__GPIO_4_24   IOMUX_PAD(0x5DC, 0x240, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 844 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D0__ELCDIF_PIXCLK   IOMUX_PAD(0x54C, 0x1B0, 4, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 651 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D0__ELCDIF_RS   IOMUX_PAD(0x54C, 0x1B0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 650 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D0__EPDC_D0   IOMUX_PAD(0x54C, 0x1B0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 647 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D0__GPIO_3_0   IOMUX_PAD(0x54C, 0x1B0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 648 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D0__WEIM_D0   IOMUX_PAD(0x54C, 0x1B0, 2, 0x7ec, 1, NO_PAD_CTRL)

Definition at line 649 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D10__ELCDIF_D26   IOMUX_PAD(0x574, 0x1D8, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 700 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D10__EPDC_D10   IOMUX_PAD(0x574, 0x1D8, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 697 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D10__GPIO_3_10   IOMUX_PAD(0x574, 0x1D8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 698 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D10__WEIM_D10   IOMUX_PAD(0x574, 0x1D8, 2, 0x814, 2, NO_PAD_CTRL)

Definition at line 699 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D11__ELCDIF_D27   IOMUX_PAD(0x578, 0x1DC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 705 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D11__EPDC_D11   IOMUX_PAD(0x578, 0x1DC, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 702 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D11__GPIO_3_11   IOMUX_PAD(0x578, 0x1DC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 703 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D11__WEIM_D11   IOMUX_PAD(0x578, 0x1DC, 2, 0x818, 2, NO_PAD_CTRL)

Definition at line 704 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D12__ELCDIF_D28   IOMUX_PAD(0x57C, 0x1E0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 710 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D12__EPDC_D12   IOMUX_PAD(0x57C, 0x1E0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 707 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D12__GPIO_3_12   IOMUX_PAD(0x57C, 0x1E0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 708 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D12__WEIM_D12   IOMUX_PAD(0x57C, 0x1E0, 2, 0x81c, 1, NO_PAD_CTRL)

Definition at line 709 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D13__ELCDIF_D29   IOMUX_PAD(0x580, 0x1E4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 715 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D13__EPDC_D13   IOMUX_PAD(0x580, 0x1E4, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 712 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D13__GPIO_3_13   IOMUX_PAD(0x580, 0x1E4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 713 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D13__WEIM_D13   IOMUX_PAD(0x580, 0x1E4, 2, 0x820, 1, NO_PAD_CTRL)

Definition at line 714 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D14__AUD6_TXD   IOMUX_PAD(0x584, 0x1E8, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 721 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D14__ELCDIF_D30   IOMUX_PAD(0x584, 0x1E8, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 720 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D14__EPDC_D14   IOMUX_PAD(0x584, 0x1E8, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 717 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D14__GPIO_3_14   IOMUX_PAD(0x584, 0x1E8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 718 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D14__WEIM_D14   IOMUX_PAD(0x584, 0x1E8, 2, 0x824, 1, NO_PAD_CTRL)

Definition at line 719 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D15__AUD6_TXC   IOMUX_PAD(0x588, 0x1EC, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 727 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D15__ELCDIF_D31   IOMUX_PAD(0x588, 0x1EC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 726 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D15__EPDC_D15   IOMUX_PAD(0x588, 0x1EC, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 723 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D15__GPIO_3_15   IOMUX_PAD(0x588, 0x1EC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 724 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D15__WEIM_D15   IOMUX_PAD(0x588, 0x1EC, 2, 0x828, 1, NO_PAD_CTRL)

Definition at line 725 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D1__ELCDIF_CS   IOMUX_PAD(0x550, 0x1B4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 656 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D1__ELCDIF_EN   IOMUX_PAD(0x550, 0x1B4, 4, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 657 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D1__EPDC_D1   IOMUX_PAD(0x550, 0x1B4, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 653 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D1__GPIO_3_1   IOMUX_PAD(0x550, 0x1B4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 654 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D1__WEIM_D1   IOMUX_PAD(0x550, 0x1B4, 2, 0x7f0, 1, NO_PAD_CTRL)

Definition at line 655 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D2__ELCDIF_VSYNC   IOMUX_PAD(0x554, 0x1B8, 4, 0x73c, 2, MX50_ELCDIF_PAD_CTRL)

Definition at line 663 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D2__ELCDIF_WR   IOMUX_PAD(0x554, 0x1B8, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 662 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D2__EPDC_D2   IOMUX_PAD(0x554, 0x1B8, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 659 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D2__GPIO_3_2   IOMUX_PAD(0x554, 0x1B8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 660 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D2__WEIM_D2   IOMUX_PAD(0x554, 0x1B8, 2, 0x7f4, 1, NO_PAD_CTRL)

Definition at line 661 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D3__ELCDIF_HSYNC   IOMUX_PAD(0x558, 0x1BC, 4, 0x6f8, 3, MX50_ELCDIF_PAD_CTRL)

Definition at line 669 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D3__ELCDIF_RD   IOMUX_PAD(0x558, 0x1BC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 668 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D3__EPDC_D3   IOMUX_PAD(0x558, 0x1BC, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 665 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D3__GPIO_3_3   IOMUX_PAD(0x558, 0x1BC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 666 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D3__WEIM_D3   IOMUX_PAD(0x558, 0x1BC, 2, 0x7f8, 1, NO_PAD_CTRL)

Definition at line 667 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D4__EPDC_D4   IOMUX_PAD(0x55C, 0x1C0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 671 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D4__GPIO_3_4   IOMUX_PAD(0x55C, 0x1C0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 672 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D4__WEIM_D4   IOMUX_PAD(0x55C, 0x1C0, 2, 0x7fc, 1, NO_PAD_CTRL)

Definition at line 673 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D5__EPDC_D5   IOMUX_PAD(0x560, 0x1C4, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 675 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D5__GPIO_3_5   IOMUX_PAD(0x560, 0x1C4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 676 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D5__WEIM_D5   IOMUX_PAD(0x560, 0x1C4, 2, 0x800, 1, NO_PAD_CTRL)

Definition at line 677 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D6__EPDC_D6   IOMUX_PAD(0x564, 0x1C8, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 679 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D6__GPIO_3_6   IOMUX_PAD(0x564, 0x1C8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 680 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D6__WEIM_D6   IOMUX_PAD(0x564, 0x1C8, 2, 0x804, 1, NO_PAD_CTRL)

Definition at line 681 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D7__EPDC_D7   IOMUX_PAD(0x568, 0x1CC, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 683 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D7__GPIO_3_7   IOMUX_PAD(0x568, 0x1CC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 684 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D7__WEIM_D7   IOMUX_PAD(0x568, 0x1CC, 2, 0x808, 1, NO_PAD_CTRL)

Definition at line 685 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D8__ELCDIF_D24   IOMUX_PAD(0x56C, 0x1D0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 690 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D8__EPDC_D8   IOMUX_PAD(0x56C, 0x1D0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 687 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D8__GPIO_3_8   IOMUX_PAD(0x56C, 0x1D0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 688 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D8__WEIM_D8   IOMUX_PAD(0x56C, 0x1D0, 2, 0x80c, 2, NO_PAD_CTRL)

Definition at line 689 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D9__ELCDIF_D25   IOMUX_PAD(0x570, 0x1D4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 695 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D9__EPDC_D9   IOMUX_PAD(0x570, 0x1D4, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 692 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D9__GPIO_3_9   IOMUX_PAD(0x570, 0x1D4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 693 of file iomux-mx50.h.

#define MX50_PAD_EPDC_D9__WEIM_D9   IOMUX_PAD(0x570, 0x1D4, 2, 0x810, 2, NO_PAD_CTRL)

Definition at line 694 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDCLK__AUD6_TXFS   IOMUX_PAD(0x58C, 0x1F0, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 733 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDCLK__ELCDIF_D16   IOMUX_PAD(0x58C, 0x1F0, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 732 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDCLK__EPDC_GDCLK   IOMUX_PAD(0x58C, 0x1F0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 729 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDCLK__GPIO_3_16   IOMUX_PAD(0x58C, 0x1F0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 730 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDCLK__WEIM_D16   IOMUX_PAD(0x58C, 0x1F0, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 731 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDOE__AUD6_RXC   IOMUX_PAD(0x594, 0x1F8, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 745 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDOE__ELCDIF_D18   IOMUX_PAD(0x594, 0x1F8, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 744 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDOE__EPDC_GDOE   IOMUX_PAD(0x594, 0x1F8, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 741 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDOE__GPIO_3_18   IOMUX_PAD(0x594, 0x1F8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 742 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDOE__WEIM_D18   IOMUX_PAD(0x594, 0x1F8, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 743 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDRL__AUD6_RXFS   IOMUX_PAD(0x598, 0x1FC, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 751 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDRL__ELCDIF_D19   IOMUX_PAD(0x598, 0x1FC, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 750 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDRL__EPDC_GDRL   IOMUX_PAD(0x598, 0x1FC, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 747 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDRL__GPIO_3_19   IOMUX_PAD(0x598, 0x1FC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 748 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDRL__WEIM_D19   IOMUX_PAD(0x598, 0x1FC, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 749 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDSP__AUD6_RXD   IOMUX_PAD(0x590, 0x1F4, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 739 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDSP__ELCDIF_D17   IOMUX_PAD(0x590, 0x1F4, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 738 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDSP__EPDC_GDSP   IOMUX_PAD(0x590, 0x1F4, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 735 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDSP__GPIO_3_17   IOMUX_PAD(0x590, 0x1F4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 736 of file iomux-mx50.h.

#define MX50_PAD_EPDC_GDSP__WEIM_D17   IOMUX_PAD(0x590, 0x1F4, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 737 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCOM__AUD4_TXC   IOMUX_PAD(0x5B8, 0x21C, 4, 0x6d4, 1, NO_PAD_CTRL)

Definition at line 799 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCOM__ELCDIF_D11   IOMUX_PAD(0x5B8, 0x21C, 3, 0x728, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 798 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCOM__EPDC_PWRCOM   IOMUX_PAD(0x5B8, 0x21C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 795 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCOM__GPIO_3_27   IOMUX_PAD(0x5B8, 0x21C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 796 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCOM__WEIM_D27   IOMUX_PAD(0x5B8, 0x21C, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 797 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL0__AUD4_RXD   IOMUX_PAD(0x5C0, 0x224, 4, 0x6c4, 1, NO_PAD_CTRL)

Definition at line 811 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL0__ELCDIF_D13   IOMUX_PAD(0x5C0, 0x224, 3, 0x730, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 810 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL0__EPDC_PWRCTRL0   IOMUX_PAD(0x5C0, 0x224, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 807 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL0__GPIO_3_29   IOMUX_PAD(0x5C0, 0x224, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 808 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL0__WEIM_D29   IOMUX_PAD(0x5C0, 0x224, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 809 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL1__AUD4_RXC   IOMUX_PAD(0x5C4, 0x228, 4, 0x6cc, 1, NO_PAD_CTRL)

Definition at line 817 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL1__ELCDIF_D14   IOMUX_PAD(0x5C4, 0x228, 3, 0x734, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 816 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL1__EPDC_PWRCTRL1   IOMUX_PAD(0x5C4, 0x228, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 813 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL1__GPIO_3_30   IOMUX_PAD(0x5C4, 0x228, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 814 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL1__WEIM_D30   IOMUX_PAD(0x5C4, 0x228, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 815 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL2__AUD4_RXFS   IOMUX_PAD(0x5C8, 0x22C, 4, 0x6d0, 1, NO_PAD_CTRL)

Definition at line 823 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL2__ELCDIF_D15   IOMUX_PAD(0x5C8, 0x22C, 3, 0x738, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 822 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL2__EPDC_PWRCTRL2   IOMUX_PAD(0x5C8, 0x22C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 819 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL2__GPIO_3_31   IOMUX_PAD(0x5C8, 0x22C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 820 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL2__SDMA_EXT0   IOMUX_PAD(0x5C8, 0x22C, 6, 0x7b8, 1, NO_PAD_CTRL)

Definition at line 824 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL2__WEIM_D31   IOMUX_PAD(0x5C8, 0x22C, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 821 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL3__GPIO_4_20   IOMUX_PAD(0x5CC, 0x230, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 827 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL3__PWRCTRL3   IOMUX_PAD(0x5CC, 0x230, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 826 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL3__SDMA_EXT1   IOMUX_PAD(0x5CC, 0x230, 6, 0x7bc, 1, NO_PAD_CTRL)

Definition at line 829 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRCTRL3__WEIM_EB2   IOMUX_PAD(0x5CC, 0x230, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 828 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRSTAT__AUD4_TXFS   IOMUX_PAD(0x5BC, 0x220, 4, 0x6d8, 1, NO_PAD_CTRL)

Definition at line 805 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRSTAT__ELCDIF_D12   IOMUX_PAD(0x5BC, 0x220, 3, 0x72c, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 804 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRSTAT__EPDC_PWRSTAT   IOMUX_PAD(0x5BC, 0x220, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 801 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRSTAT__GPIO_3_28   IOMUX_PAD(0x5BC, 0x220, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 802 of file iomux-mx50.h.

#define MX50_PAD_EPDC_PWRSTAT__WEIM_D28   IOMUX_PAD(0x5BC, 0x220, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 803 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE0__ELCDIF_D5   IOMUX_PAD(0x5E0, 0x244, 3, 0x710, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 849 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE0__EPDC_SDCE0   IOMUX_PAD(0x5E0, 0x244, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 847 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE0__GPIO_4_25   IOMUX_PAD(0x5E0, 0x244, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 848 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE1__ELCDIF_D4   IOMUX_PAD(0x5E4, 0x248, 2, 0x70c, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 853 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE1__EPDC_SDCE1   IOMUX_PAD(0x5E4, 0x248, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 851 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE1__GPIO_4_26   IOMUX_PAD(0x5E4, 0x248, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 852 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE2__ELCDIF_DAT3   IOMUX_PAD(0x5E8, 0x24C, 3, 0x708, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 857 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE2__EPDC_SDCE2   IOMUX_PAD(0x5E8, 0x24C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 855 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE2__GPIO_4_27   IOMUX_PAD(0x5E8, 0x24C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 856 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE3__ELCDIF_D2   IOMUX_PAD(0x5EC, 0x250, 3, 0x704, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 861 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE3__EPDC_SDCE3   IOMUX_PAD(0x5EC, 0x250, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 859 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE3__GPIO_4_28   IOMUX_PAD(0x5EC, 0x250, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 860 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE4__ELCDIF_D1   IOMUX_PAD(0x5F0, 0x254, 3, 0x700, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 865 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE4__EPDC_SDCE4   IOMUX_PAD(0x5F0, 0x254, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 863 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE4__GPIO_4_29   IOMUX_PAD(0x5F0, 0x254, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 864 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE5__ELCDIF_D0   IOMUX_PAD(0x5F4, 0x258, 3, 0x6fc, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 869 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE5__EPDC_SDCE5   IOMUX_PAD(0x5F4, 0x258, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 867 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCE5__GPIO_4_30   IOMUX_PAD(0x5F4, 0x258, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 868 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCLK__AUD5_TXD   IOMUX_PAD(0x59C, 0x200, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 757 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCLK__ELCDIF_D20   IOMUX_PAD(0x59C, 0x200, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 756 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCLK__EPDC_SDCLK   IOMUX_PAD(0x59C, 0x200, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 753 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCLK__GPIO_3_20   IOMUX_PAD(0x59C, 0x200, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 754 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCLK__WEIM_D20   IOMUX_PAD(0x59C, 0x200, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 755 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCLKN__AUD5_RXFS   IOMUX_PAD(0x5B0, 0x214, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 787 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCLKN__ELCDIF_D9   IOMUX_PAD(0x5B0, 0x214, 3, 0x720, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 786 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCLKN__EPDC_SDCLKN   IOMUX_PAD(0x5B0, 0x214, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 783 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCLKN__GPIO_3_25   IOMUX_PAD(0x5B0, 0x214, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 784 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDCLKN__WEIM_D25   IOMUX_PAD(0x5B0, 0x214, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 785 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDLE__AUD5_RXC   IOMUX_PAD(0x5AC, 0x210, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 781 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDLE__ELCDIF_D8   IOMUX_PAD(0x5AC, 0x210, 3, 0x71c, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 780 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDLE__EPDC_SDLE   IOMUX_PAD(0x5AC, 0x210, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 777 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDLE__GPIO_3_24   IOMUX_PAD(0x5AC, 0x210, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 778 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDLE__WEIM_D24   IOMUX_PAD(0x5AC, 0x210, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 779 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOE__AUD5_RXD   IOMUX_PAD(0x5A8, 0x20C, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 775 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOE__ELCDIF_D23   IOMUX_PAD(0x5A8, 0x20C, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 774 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOE__EPDC_SDOE   IOMUX_PAD(0x5A8, 0x20C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 771 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOE__GPIO_3_23   IOMUX_PAD(0x5A8, 0x20C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 772 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOE__WEIM_D23   IOMUX_PAD(0x5A8, 0x20C, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 773 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOED__AUD5_TXFS   IOMUX_PAD(0x5A4, 0x208, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 769 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOED__ELCDIF_D22   IOMUX_PAD(0x5A4, 0x208, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 768 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOED__EPDC_SDOED   IOMUX_PAD(0x5A4, 0x208, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 765 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOED__GPIO_3_22   IOMUX_PAD(0x5A4, 0x208, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 766 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOED__WEIM_D22   IOMUX_PAD(0x5A4, 0x208, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 767 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOEZ__AUD5_TXC   IOMUX_PAD(0x5A0, 0x204, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 763 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOEZ__ELCDIF_D21   IOMUX_PAD(0x5A0, 0x204, 3, 0x0, 0, MX50_ELCDIF_PAD_CTRL)

Definition at line 762 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOEZ__EPDC_SDOEZ   IOMUX_PAD(0x5A0, 0x204, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 759 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOEZ__GPIO_3_21   IOMUX_PAD(0x5A0, 0x204, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 760 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDOEZ__WEIM_D21   IOMUX_PAD(0x5A0, 0x204, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 761 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDSHR__AUD4_TXD   IOMUX_PAD(0x5B4, 0x218, 4, 0x6c8, 1, NO_PAD_CTRL)

Definition at line 793 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDSHR__ELCDIF_D10   IOMUX_PAD(0x5B4, 0x218, 3, 0x724, 1, MX50_ELCDIF_PAD_CTRL)

Definition at line 792 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDSHR__EPDC_SDSHR   IOMUX_PAD(0x5B4, 0x218, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 789 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDSHR__GPIO_3_26   IOMUX_PAD(0x5B4, 0x218, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 790 of file iomux-mx50.h.

#define MX50_PAD_EPDC_SDSHR__WEIM_D26   IOMUX_PAD(0x5B4, 0x218, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 791 of file iomux-mx50.h.

#define MX50_PAD_EPDC_VCOM0__EPDC_VCOM0   IOMUX_PAD(0x5D0, 0x234, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 831 of file iomux-mx50.h.

#define MX50_PAD_EPDC_VCOM0__GPIO_4_21   IOMUX_PAD(0x5D0, 0x234, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 832 of file iomux-mx50.h.

#define MX50_PAD_EPDC_VCOM0__WEIM_EB3   IOMUX_PAD(0x5D0, 0x234, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 833 of file iomux-mx50.h.

#define MX50_PAD_EPDC_VCOM1__EPDC_VCOM1   IOMUX_PAD(0x5D4, 0x238, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 835 of file iomux-mx50.h.

#define MX50_PAD_EPDC_VCOM1__GPIO_4_22   IOMUX_PAD(0x5D4, 0x238, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 836 of file iomux-mx50.h.

#define MX50_PAD_EPDC_VCOM1__WEIM_CS3   IOMUX_PAD(0x5D4, 0x238, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 837 of file iomux-mx50.h.

#define MX50_PAD_EPITO__EPITO   IOMUX_PAD(0x310, 0x64, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 146 of file iomux-mx50.h.

#define MX50_PAD_EPITO__GPIO_6_27   IOMUX_PAD(0x310, 0x64, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 147 of file iomux-mx50.h.

#define MX50_PAD_EPITO__GPT_CLKIN   IOMUX_PAD(0x310, 0x64, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 152 of file iomux-mx50.h.

#define MX50_PAD_EPITO__SSI_EXT2_CLK   IOMUX_PAD(0x310, 0x64, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 150 of file iomux-mx50.h.

#define MX50_PAD_EPITO__TOG_EN   IOMUX_PAD(0x310, 0x64, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 151 of file iomux-mx50.h.

#define MX50_PAD_EPITO__USBH1_PWR
Value:
IOMUX_PAD(0x310, 0x64, 2, 0x0, 0, \
PAD_CTL_PKE | PAD_CTL_DSE_HIGH)

Definition at line 148 of file iomux-mx50.h.

#define MX50_PAD_I2C1_SCL__GPIO_6_18   IOMUX_PAD(0x2EC, 0x40, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 88 of file iomux-mx50.h.

#define MX50_PAD_I2C1_SCL__I2C1_SCL
Value:
IOMUX_PAD(0x2EC, 0x40, IOMUX_CONFIG_SION, 0x0, 0, \
MX50_I2C_PAD_CTRL)

Definition at line 86 of file iomux-mx50.h.

#define MX50_PAD_I2C1_SCL__UART2_TXD   IOMUX_PAD(0x2EC, 0x40, 2, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 89 of file iomux-mx50.h.

#define MX50_PAD_I2C1_SDA__GPIO_6_19   IOMUX_PAD(0x2F0, 0x44, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 93 of file iomux-mx50.h.

#define MX50_PAD_I2C1_SDA__I2C1_SDA
Value:
IOMUX_PAD(0x2F0, 0x44, IOMUX_CONFIG_SION, 0x0, 0, \
MX50_I2C_PAD_CTRL)

Definition at line 91 of file iomux-mx50.h.

#define MX50_PAD_I2C1_SDA__UART2_RXD   IOMUX_PAD(0x2F0, 0x44, 2, 0x7cc, 1, MX50_UART_PAD_CTRL)

Definition at line 94 of file iomux-mx50.h.

#define MX50_PAD_I2C2_SCL__DCDC_OK   IOMUX_PAD(0x2F4, 0x48, 7, 0x0, 0, NO_PAD_CTRL)

Definition at line 100 of file iomux-mx50.h.

#define MX50_PAD_I2C2_SCL__GPIO_6_20   IOMUX_PAD(0x2F4, 0x48, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 98 of file iomux-mx50.h.

#define MX50_PAD_I2C2_SCL__I2C2_SCL
Value:
IOMUX_PAD(0x2F4, 0x48, IOMUX_CONFIG_SION, 0x0, 0, \
MX50_I2C_PAD_CTRL)

Definition at line 96 of file iomux-mx50.h.

#define MX50_PAD_I2C2_SCL__UART2_CTS   IOMUX_PAD(0x2F4, 0x48, 2, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 99 of file iomux-mx50.h.

#define MX50_PAD_I2C2_SDA__GPIO_6_21   IOMUX_PAD(0x2F8, 0x4C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 104 of file iomux-mx50.h.

#define MX50_PAD_I2C2_SDA__I2C2_SDA
Value:
IOMUX_PAD(0x2F8, 0x4C, IOMUX_CONFIG_SION, 0x0, 0, \
MX50_I2C_PAD_CTRL)

Definition at line 102 of file iomux-mx50.h.

#define MX50_PAD_I2C2_SDA__PWRSTABLE   IOMUX_PAD(0x2F8, 0x4C, 7, 0x0, 0, NO_PAD_CTRL)

Definition at line 106 of file iomux-mx50.h.

#define MX50_PAD_I2C2_SDA__UART2_RTS   IOMUX_PAD(0x2F8, 0x4C, 2, 0x7c8, 1, MX50_UART_PAD_CTRL)

Definition at line 105 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SCL__FEC_MDC   IOMUX_PAD(0x2FC, 0x50, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 111 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SCL__GPIO_6_22   IOMUX_PAD(0x2FC, 0x50, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 110 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SCL__GPT_CAPIN1   IOMUX_PAD(0x2FC, 0x50, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 113 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SCL__I2C3_SCL
Value:
IOMUX_PAD(0x2FC, 0x50, IOMUX_CONFIG_SION, 0x0, 0, \
MX50_I2C_PAD_CTRL)

Definition at line 108 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SCL__PMIC_RDY   IOMUX_PAD(0x2FC, 0x50, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 112 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SCL__USBOTG_OC   IOMUX_PAD(0x2FC, 0x50, 7, 0x7E8, 0, MX50_USB_PAD_CTRL)

Definition at line 114 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SDA__ALARM_DEB   IOMUX_PAD(0x300, 0x54, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 121 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SDA__FEC_MDIO   IOMUX_PAD(0x300, 0x54, 2, 0x774, 0, MX50_FEC_PAD_CTRL)

Definition at line 119 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SDA__GPIO_6_23   IOMUX_PAD(0x300, 0x54, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 118 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SDA__GPT_CAPIN1   IOMUX_PAD(0x300, 0x54, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 122 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SDA__I2C3_SDA
Value:
IOMUX_PAD(0x300, 0x54, IOMUX_CONFIG_SION, 0x0, 0, \
MX50_I2C_PAD_CTRL)

Definition at line 116 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SDA__PWRFAIL_INT   IOMUX_PAD(0x300, 0x54, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 120 of file iomux-mx50.h.

#define MX50_PAD_I2C3_SDA__USBOTG_PWR
Value:
IOMUX_PAD(0x300, 0x54, 7, 0x0, 0, \
PAD_CTL_PKE | PAD_CTL_DSE_HIGH)

Definition at line 123 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL0__GPIO_4_0   IOMUX_PAD(0x2CC, 0x20, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 52 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL0__KEY_COL0   IOMUX_PAD(0x2CC, 0x20, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 51 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL0__NANDF_CLE   IOMUX_PAD(0x2CC, 0x20, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 53 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL1__GPIO_4_2   IOMUX_PAD(0x2D4, 0x28, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 60 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL1__KEY_COL1   IOMUX_PAD(0x2D4, 0x28, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 59 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL1__NANDF_CE0   IOMUX_PAD(0x2D4, 0x28, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 61 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL2__GPIO_4_4   IOMUX_PAD(0x2DC, 0x30, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 68 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL2__KEY_COL2   IOMUX_PAD(0x2DC, 0x30, 0, 0x0, 0, MX50_KEYPAD_CTRL)

Definition at line 67 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL2__NANDF_CE2   IOMUX_PAD(0x2DC, 0x30, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 69 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL3__GPIO_4_6   IOMUX_PAD(0x2E4, 0x38, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 76 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL3__KEY_COL3   IOMUX_PAD(0x2E4, 0x38, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 75 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL3__NANDF_READY
Value:
IOMUX_PAD(0x2E4, 0x38, 2, 0x7b4, 0, PAD_CTL_PKE | \
PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)

Definition at line 77 of file iomux-mx50.h.

#define MX50_PAD_KEY_COL3__SDMA_EXT0   IOMUX_PAD(0x2E4, 0x38, 6, 0x7b8, 0, NO_PAD_CTRL)

Definition at line 79 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW0__GPIO_4_1   IOMUX_PAD(0x2D0, 0x24, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 56 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW0__KEY_ROW0   IOMUX_PAD(0x2D0, 0x24, 0, 0x0, 0, MX50_KEYPAD_CTRL)

Definition at line 55 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW0__NANDF_ALE   IOMUX_PAD(0x2D0, 0x24, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 57 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW1__GPIO_4_3   IOMUX_PAD(0x2D8, 0x2C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 64 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW1__KEY_ROW1   IOMUX_PAD(0x2D8, 0x2C, 0, 0x0, 0, MX50_KEYPAD_CTRL)

Definition at line 63 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW1__NANDF_CE1   IOMUX_PAD(0x2D8, 0x2C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 65 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW2__GPIO_4_5   IOMUX_PAD(0x2E0, 0x34, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 72 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW2__KEY_ROW2   IOMUX_PAD(0x2E0, 0x34, 0, 0x0, 0, MX50_KEYPAD_CTRL)

Definition at line 71 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW2__NANDF_CE3   IOMUX_PAD(0x2E0, 0x34, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 73 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW3__GPIO_4_7   IOMUX_PAD(0x2E8, 0x3C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 82 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW3__KEY_ROW3   IOMUX_PAD(0x2E8, 0x3C, 0, 0x0, 0, MX50_KEYPAD_CTRL)

Definition at line 81 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW3__NANDF_DQS   IOMUX_PAD(0x2E8, 0x3C, 2, 0x7b0, 0, PAD_CTL_DSE_HIGH)

Definition at line 83 of file iomux-mx50.h.

#define MX50_PAD_KEY_ROW3__SDMA_EXT1   IOMUX_PAD(0x2E8, 0x3C, 6, 0x7bc, 0, NO_PAD_CTRL)

Definition at line 84 of file iomux-mx50.h.

#define MX50_PAD_OWIRE__EPDC_PWRIRQ   IOMUX_PAD(0x30C, 0x60, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 143 of file iomux-mx50.h.

#define MX50_PAD_OWIRE__GPIO_6_26   IOMUX_PAD(0x30C, 0x60, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 140 of file iomux-mx50.h.

#define MX50_PAD_OWIRE__GPT_CMPOUT3   IOMUX_PAD(0x30C, 0x60, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 144 of file iomux-mx50.h.

#define MX50_PAD_OWIRE__OWIRE   IOMUX_PAD(0x30C, 0x60, 0, 0x0, 0, MX50_OWIRE_PAD_CTRL)

Definition at line 139 of file iomux-mx50.h.

#define MX50_PAD_OWIRE__SSI_EXT1_CLK   IOMUX_PAD(0x30C, 0x60, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 142 of file iomux-mx50.h.

#define MX50_PAD_OWIRE__USBH1_OC   IOMUX_PAD(0x30C, 0x60, 2, 0x0, 0, MX50_USB_PAD_CTRL)

Definition at line 141 of file iomux-mx50.h.

#define MX50_PAD_PMIC_BOOT_MODE0__PMIC_BOOT_MODE0   IOMUX_PAD(0x3EC, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 438 of file iomux-mx50.h.

#define MX50_PAD_PMIC_BOOT_MODE1__PMIC_BOOT_MODE1   IOMUX_PAD(0x3E4, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 434 of file iomux-mx50.h.

#define MX50_PAD_PMIC_JTAG_MOD__PMIC_JTAG_MOD   IOMUX_PAD(0x3F8, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 444 of file iomux-mx50.h.

#define MX50_PAD_PMIC_JTAG_TCK__PMIC_JTAG_TCK   IOMUX_PAD(0x404, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 450 of file iomux-mx50.h.

#define MX50_PAD_PMIC_JTAG_TDI__PMIC_JTAG_TDI   IOMUX_PAD(0x400, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 448 of file iomux-mx50.h.

#define MX50_PAD_PMIC_JTAG_TDO__PMIC_JTAG_TDO   IOMUX_PAD(0x408, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 452 of file iomux-mx50.h.

#define MX50_PAD_PMIC_JTAG_TMS__PMIC_JTAG_TMS   IOMUX_PAD(0x3F4, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 442 of file iomux-mx50.h.

#define MX50_PAD_PMIC_JTAG_TRSTB__PMIC_JTAG_TRSTB   IOMUX_PAD(0x3FC, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 446 of file iomux-mx50.h.

#define MX50_PAD_PMIC_ON_REQ__PMIC_ON_REQ   IOMUX_PAD(0x3D8, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 428 of file iomux-mx50.h.

#define MX50_PAD_PMIC_PORT_B__PMIC_PORT_B   IOMUX_PAD(0x3E0, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 432 of file iomux-mx50.h.

#define MX50_PAD_PMIC_RESET_IN_B__PMIC_RESET_IN_B   IOMUX_PAD(0x3E8, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 436 of file iomux-mx50.h.

#define MX50_PAD_PMIC_STBY_REQ__PMIC_STBY_REQ   IOMUX_PAD(0x3DC, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 430 of file iomux-mx50.h.

#define MX50_PAD_PMIC_TEST_MODE__PMIC_TEST_MODE   IOMUX_PAD(0x3F0, 0, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 440 of file iomux-mx50.h.

#define MX50_PAD_PWM1__GPIO_6_24   IOMUX_PAD(0x304, 0x58, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 127 of file iomux-mx50.h.

#define MX50_PAD_PWM1__GPT_CMPOUT1   IOMUX_PAD(0x304, 0x58, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 129 of file iomux-mx50.h.

#define MX50_PAD_PWM1__PWM1_PWMO   IOMUX_PAD(0x304, 0x58, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 126 of file iomux-mx50.h.

#define MX50_PAD_PWM1__USBOTG_OC   IOMUX_PAD(0x304, 0x58, 2, 0x7E8, 1, MX50_USB_PAD_CTRL)

Definition at line 128 of file iomux-mx50.h.

#define MX50_PAD_PWM2__ANY_PU_RST   IOMUX_PAD(0x308, 0x5C, 7, 0x0, 0, NO_PAD_CTRL)

Definition at line 137 of file iomux-mx50.h.

#define MX50_PAD_PWM2__DCDC_PWM   IOMUX_PAD(0x308, 0x5C, 4, 0x0, 0, NO_PAD_CTRL)

Definition at line 135 of file iomux-mx50.h.

#define MX50_PAD_PWM2__GPIO_6_25   IOMUX_PAD(0x308, 0x5C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 132 of file iomux-mx50.h.

#define MX50_PAD_PWM2__GPT_CMPOUT2   IOMUX_PAD(0x308, 0x5C, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 136 of file iomux-mx50.h.

#define MX50_PAD_PWM2__PWM2_PWMO   IOMUX_PAD(0x308, 0x5C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 131 of file iomux-mx50.h.

#define MX50_PAD_PWM2__USBOTG_PWR
Value:
IOMUX_PAD(0x308, 0x5C, 2, 0x0, 0, \
PAD_CTL_PKE | PAD_CTL_DSE_HIGH)

Definition at line 133 of file iomux-mx50.h.

#define MX50_PAD_SD1_CLK__CLKO   IOMUX_PAD(0x390, 0xE4, 7, 0x0, 0, NO_PAD_CTRL)

Definition at line 339 of file iomux-mx50.h.

#define MX50_PAD_SD1_CLK__GPIO_5_0   IOMUX_PAD(0x390, 0xE4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 338 of file iomux-mx50.h.

#define MX50_PAD_SD1_CLK__SD1_CLK   IOMUX_PAD(0x390, 0xE4, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 337 of file iomux-mx50.h.

#define MX50_PAD_SD1_CMD__CLKO2   IOMUX_PAD(0x394, 0xE8, 7, 0x0, 0, NO_PAD_CTRL)

Definition at line 343 of file iomux-mx50.h.

#define MX50_PAD_SD1_CMD__GPIO_5_1   IOMUX_PAD(0x394, 0xE8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 342 of file iomux-mx50.h.

#define MX50_PAD_SD1_CMD__SD1_CMD   IOMUX_PAD(0x394, 0xE8, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 341 of file iomux-mx50.h.

#define MX50_PAD_SD1_D0__GPIO_5_2   IOMUX_PAD(0x398, 0xEC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 346 of file iomux-mx50.h.

#define MX50_PAD_SD1_D0__PLL1_BYP   IOMUX_PAD(0x398, 0xEC, 7, 0x6dc, 0, NO_PAD_CTRL)

Definition at line 347 of file iomux-mx50.h.

#define MX50_PAD_SD1_D0__SD1_D0   IOMUX_PAD(0x398, 0xEC, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 345 of file iomux-mx50.h.

#define MX50_PAD_SD1_D1__GPIO_5_3   IOMUX_PAD(0x39C, 0xF0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 350 of file iomux-mx50.h.

#define MX50_PAD_SD1_D1__PLL2_BYP   IOMUX_PAD(0x39C, 0xF0, 7, 0x6e0, 0, NO_PAD_CTRL)

Definition at line 351 of file iomux-mx50.h.

#define MX50_PAD_SD1_D1__SD1_D1   IOMUX_PAD(0x39C, 0xF0, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 349 of file iomux-mx50.h.

#define MX50_PAD_SD1_D2__GPIO_5_4   IOMUX_PAD(0x3A0, 0xF4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 354 of file iomux-mx50.h.

#define MX50_PAD_SD1_D2__PLL3_BYP   IOMUX_PAD(0x3A0, 0xF4, 7, 0x6e4, 0, NO_PAD_CTRL)

Definition at line 355 of file iomux-mx50.h.

#define MX50_PAD_SD1_D2__SD1_D2   IOMUX_PAD(0x3A0, 0xF4, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 353 of file iomux-mx50.h.

#define MX50_PAD_SD1_D3__GPIO_5_5   IOMUX_PAD(0x3A4, 0xF8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 358 of file iomux-mx50.h.

#define MX50_PAD_SD1_D3__SD1_D3   IOMUX_PAD(0x3A4, 0xF8, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 357 of file iomux-mx50.h.

#define MX50_PAD_SD2_CD__AUD4_TXC   IOMUX_PAD(0x3D4, 0x128, 2, 0x6d4, 0, NO_PAD_CTRL)

Definition at line 424 of file iomux-mx50.h.

#define MX50_PAD_SD2_CD__CCM_REF_EN   IOMUX_PAD(0x3D4, 0x128, 7, 0x0, 0, NO_PAD_CTRL)

Definition at line 426 of file iomux-mx50.h.

#define MX50_PAD_SD2_CD__GPIO_5_17   IOMUX_PAD(0x3D4, 0x128, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 423 of file iomux-mx50.h.

#define MX50_PAD_SD2_CD__SD2_CD   IOMUX_PAD(0x3D4, 0x128, 0, 0x740, 1, MX50_SD_PAD_CTRL)

Definition at line 422 of file iomux-mx50.h.

#define MX50_PAD_SD2_CD__WEIM_D5   IOMUX_PAD(0x3D4, 0x128, 4, 0x800, 0, NO_PAD_CTRL)

Definition at line 425 of file iomux-mx50.h.

#define MX50_PAD_SD2_CLK__GPIO_5_6   IOMUX_PAD(0x3A8, 0xFC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 361 of file iomux-mx50.h.

#define MX50_PAD_SD2_CLK__MSHC_SCLK   IOMUX_PAD(0x3A8, 0xFC, 2, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 362 of file iomux-mx50.h.

#define MX50_PAD_SD2_CLK__SD2_CLK   IOMUX_PAD(0x3A8, 0xFC, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 360 of file iomux-mx50.h.

#define MX50_PAD_SD2_CMD__GPIO_5_7   IOMUX_PAD(0x3AC, 0x100, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 365 of file iomux-mx50.h.

#define MX50_PAD_SD2_CMD__MSHC_BS   IOMUX_PAD(0x3AC, 0x100, 2, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 366 of file iomux-mx50.h.

#define MX50_PAD_SD2_CMD__SD2_CMD   IOMUX_PAD(0x3AC, 0x100, IOMUX_CONFIG_SION, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 364 of file iomux-mx50.h.

#define MX50_PAD_SD2_D0__GPIO_5_8   IOMUX_PAD(0x3B0, 0x104, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 369 of file iomux-mx50.h.

#define MX50_PAD_SD2_D0__KEY_COL4   IOMUX_PAD(0x3B0, 0x104, 3, 0x790, 0, NO_PAD_CTRL)

Definition at line 371 of file iomux-mx50.h.

#define MX50_PAD_SD2_D0__MSHC_D0   IOMUX_PAD(0x3B0, 0x104, 2, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 370 of file iomux-mx50.h.

#define MX50_PAD_SD2_D0__SD2_D0   IOMUX_PAD(0x3B0, 0x104, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 368 of file iomux-mx50.h.

#define MX50_PAD_SD2_D1__GPIO_5_9   IOMUX_PAD(0x3B4, 0x108, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 374 of file iomux-mx50.h.

#define MX50_PAD_SD2_D1__KEY_ROW4   IOMUX_PAD(0x3B4, 0x108, 3, 0x7a0, 0, NO_PAD_CTRL)

Definition at line 376 of file iomux-mx50.h.

#define MX50_PAD_SD2_D1__MSHC_D1   IOMUX_PAD(0x3B4, 0x108, 2, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 375 of file iomux-mx50.h.

#define MX50_PAD_SD2_D1__SD2_D1   IOMUX_PAD(0x3B4, 0x108, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 373 of file iomux-mx50.h.

#define MX50_PAD_SD2_D2__GPIO_5_10   IOMUX_PAD(0x3B8, 0x10C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 379 of file iomux-mx50.h.

#define MX50_PAD_SD2_D2__KEY_COL5   IOMUX_PAD(0x3B8, 0x10C, 3, 0x794, 0, NO_PAD_CTRL)

Definition at line 381 of file iomux-mx50.h.

#define MX50_PAD_SD2_D2__MSHC_D2   IOMUX_PAD(0x3B8, 0x10C, 2, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 380 of file iomux-mx50.h.

#define MX50_PAD_SD2_D2__SD2_D2   IOMUX_PAD(0x3B8, 0x10C, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 378 of file iomux-mx50.h.

#define MX50_PAD_SD2_D3__GPIO_5_11   IOMUX_PAD(0x3BC, 0x110, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 384 of file iomux-mx50.h.

#define MX50_PAD_SD2_D3__KEY_ROW5   IOMUX_PAD(0x3BC, 0x110, 3, 0x7a4, 0, NO_PAD_CTRL)

Definition at line 386 of file iomux-mx50.h.

#define MX50_PAD_SD2_D3__MSHC_D3   IOMUX_PAD(0x3BC, 0x110, 2, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 385 of file iomux-mx50.h.

#define MX50_PAD_SD2_D3__SD2_D3   IOMUX_PAD(0x3BC, 0x110, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 383 of file iomux-mx50.h.

#define MX50_PAD_SD2_D4__AUD4_RXFS   IOMUX_PAD(0x3C0, 0x114, 2, 0x6d0, 0, NO_PAD_CTRL)

Definition at line 390 of file iomux-mx50.h.

#define MX50_PAD_SD2_D4__CCM_OUT0   IOMUX_PAD(0x3C0, 0x114, 7, 0x0, 0, NO_PAD_CTRL)

Definition at line 393 of file iomux-mx50.h.

#define MX50_PAD_SD2_D4__GPIO_5_12   IOMUX_PAD(0x3C0, 0x114, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 389 of file iomux-mx50.h.

#define MX50_PAD_SD2_D4__KEY_COL6   IOMUX_PAD(0x3C0, 0x114, 3, 0x798, 0, NO_PAD_CTRL)

Definition at line 391 of file iomux-mx50.h.

#define MX50_PAD_SD2_D4__SD2_D4   IOMUX_PAD(0x3C0, 0x114, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 388 of file iomux-mx50.h.

#define MX50_PAD_SD2_D4__WEIM_D0   IOMUX_PAD(0x3C0, 0x114, 4, 0x7ec, 0, NO_PAD_CTRL)

Definition at line 392 of file iomux-mx50.h.

#define MX50_PAD_SD2_D5__AUD4_RXC   IOMUX_PAD(0x3C4, 0x118, 2, 0x6cc, 0, NO_PAD_CTRL)

Definition at line 397 of file iomux-mx50.h.

#define MX50_PAD_SD2_D5__CCM_OUT1   IOMUX_PAD(0x3C4, 0x118, 7, 0x0, 0, NO_PAD_CTRL)

Definition at line 400 of file iomux-mx50.h.

#define MX50_PAD_SD2_D5__GPIO_5_13   IOMUX_PAD(0x3C4, 0x118, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 396 of file iomux-mx50.h.

#define MX50_PAD_SD2_D5__KEY_ROW6   IOMUX_PAD(0x3C4, 0x118, 3, 0x7a8, 0, NO_PAD_CTRL)

Definition at line 398 of file iomux-mx50.h.

#define MX50_PAD_SD2_D5__SD2_D5   IOMUX_PAD(0x3C4, 0x118, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 395 of file iomux-mx50.h.

#define MX50_PAD_SD2_D5__WEIM_D1   IOMUX_PAD(0x3C4, 0x118, 4, 0x7f0, 0, NO_PAD_CTRL)

Definition at line 399 of file iomux-mx50.h.

#define MX50_PAD_SD2_D6__AUD4_RXD   IOMUX_PAD(0x3C8, 0x11C, 2, 0x6c4, 0, NO_PAD_CTRL)

Definition at line 404 of file iomux-mx50.h.

#define MX50_PAD_SD2_D6__CCM_OUT2   IOMUX_PAD(0x3C8, 0x11C, 7, 0x0, 0, NO_PAD_CTRL)

Definition at line 407 of file iomux-mx50.h.

#define MX50_PAD_SD2_D6__GPIO_5_14   IOMUX_PAD(0x3C8, 0x11C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 403 of file iomux-mx50.h.

#define MX50_PAD_SD2_D6__KEY_COL7   IOMUX_PAD(0x3C8, 0x11C, 3, 0x79c, 0, NO_PAD_CTRL)

Definition at line 405 of file iomux-mx50.h.

#define MX50_PAD_SD2_D6__SD2_D6   IOMUX_PAD(0x3C8, 0x11C, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 402 of file iomux-mx50.h.

#define MX50_PAD_SD2_D6__WEIM_D2   IOMUX_PAD(0x3C8, 0x11C, 4, 0x7f4, 0, NO_PAD_CTRL)

Definition at line 406 of file iomux-mx50.h.

#define MX50_PAD_SD2_D7__AUD4_TXFS   IOMUX_PAD(0x3CC, 0x120, 2, 0x6d8, 0, NO_PAD_CTRL)

Definition at line 411 of file iomux-mx50.h.

#define MX50_PAD_SD2_D7__CCM_STOP   IOMUX_PAD(0x3CC, 0x120, 7, 0x0, 0, NO_PAD_CTRL)

Definition at line 414 of file iomux-mx50.h.

#define MX50_PAD_SD2_D7__GPIO_5_15   IOMUX_PAD(0x3CC, 0x120, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 410 of file iomux-mx50.h.

#define MX50_PAD_SD2_D7__KEY_ROW7   IOMUX_PAD(0x3CC, 0x120, 3, 0x7ac, 0, NO_PAD_CTRL)

Definition at line 412 of file iomux-mx50.h.

#define MX50_PAD_SD2_D7__SD2_D7   IOMUX_PAD(0x3CC, 0x120, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 409 of file iomux-mx50.h.

#define MX50_PAD_SD2_D7__WEIM_D3   IOMUX_PAD(0x3CC, 0x120, 4, 0x7f8, 0, NO_PAD_CTRL)

Definition at line 413 of file iomux-mx50.h.

#define MX50_PAD_SD2_WP__AUD4_TXD   IOMUX_PAD(0x3D0, 0x124, 2, 0x6c8, 0, NO_PAD_CTRL)

Definition at line 418 of file iomux-mx50.h.

#define MX50_PAD_SD2_WP__CCM_WAIT   IOMUX_PAD(0x3D0, 0x124, 7, 0x0, 0, NO_PAD_CTRL)

Definition at line 420 of file iomux-mx50.h.

#define MX50_PAD_SD2_WP__GPIO_5_16   IOMUX_PAD(0x3D0, 0x124, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 417 of file iomux-mx50.h.

#define MX50_PAD_SD2_WP__SD2_WP   IOMUX_PAD(0x3D0, 0x124, 0, 0x744, 1, MX50_SD_PAD_CTRL)

Definition at line 416 of file iomux-mx50.h.

#define MX50_PAD_SD2_WP__WEIM_D4   IOMUX_PAD(0x3D0, 0x124, 4, 0x7fc, 0, NO_PAD_CTRL)

Definition at line 419 of file iomux-mx50.h.

#define MX50_PAD_SD3_CLK__GPIO_5_19   IOMUX_PAD(0x448, 0x168, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 531 of file iomux-mx50.h.

#define MX50_PAD_SD3_CLK__SD3_CLK   IOMUX_PAD(0x448, 0x168, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 530 of file iomux-mx50.h.

#define MX50_PAD_SD3_CLK__SSP_CLK   IOMUX_PAD(0x448, 0x168, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 533 of file iomux-mx50.h.

#define MX50_PAD_SD3_CMD__GPIO_5_18   IOMUX_PAD(0x444, 0x164, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 526 of file iomux-mx50.h.

#define MX50_PAD_SD3_CMD__SD3_CMD   IOMUX_PAD(0x444, 0x164, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 525 of file iomux-mx50.h.

#define MX50_PAD_SD3_CMD__SSP_CMD   IOMUX_PAD(0x444, 0x164, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 528 of file iomux-mx50.h.

#define MX50_PAD_SD3_D0__GPIO_5_20   IOMUX_PAD(0x44C, 0x16C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 536 of file iomux-mx50.h.

#define MX50_PAD_SD3_D0__PLL1_BYP   IOMUX_PAD(0x44C, 0x16C, 7, 0x6dc, 1, NO_PAD_CTRL)

Definition at line 539 of file iomux-mx50.h.

#define MX50_PAD_SD3_D0__SD3_D0   IOMUX_PAD(0x44C, 0x16C, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 535 of file iomux-mx50.h.

#define MX50_PAD_SD3_D0__SSP_D0   IOMUX_PAD(0x44C, 0x16C, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 538 of file iomux-mx50.h.

#define MX50_PAD_SD3_D1__GPIO_5_21   IOMUX_PAD(0x450, 0x170, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 542 of file iomux-mx50.h.

#define MX50_PAD_SD3_D1__PLL2_BYP   IOMUX_PAD(0x450, 0x170, 7, 0x6e0, 1, NO_PAD_CTRL)

Definition at line 544 of file iomux-mx50.h.

#define MX50_PAD_SD3_D1__SD3_D1   IOMUX_PAD(0x450, 0x170, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 541 of file iomux-mx50.h.

#define MX50_PAD_SD3_D2__GPIO_5_22   IOMUX_PAD(0x454, 0x174, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 547 of file iomux-mx50.h.

#define MX50_PAD_SD3_D2__PLL3_BYP   IOMUX_PAD(0x454, 0x174, 7, 0x6e4, 1, NO_PAD_CTRL)

Definition at line 550 of file iomux-mx50.h.

#define MX50_PAD_SD3_D2__SD3_D2   IOMUX_PAD(0x454, 0x174, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 546 of file iomux-mx50.h.

#define MX50_PAD_SD3_D2__SSP_D2   IOMUX_PAD(0x454, 0x174, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 549 of file iomux-mx50.h.

#define MX50_PAD_SD3_D3__GPIO_5_23   IOMUX_PAD(0x458, 0x178, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 553 of file iomux-mx50.h.

#define MX50_PAD_SD3_D3__SD3_D3   IOMUX_PAD(0x458, 0x178, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 552 of file iomux-mx50.h.

#define MX50_PAD_SD3_D3__SSP_D3   IOMUX_PAD(0x458, 0x178, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 555 of file iomux-mx50.h.

#define MX50_PAD_SD3_D4__GPIO_5_24   IOMUX_PAD(0x45C, 0x17C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 558 of file iomux-mx50.h.

#define MX50_PAD_SD3_D4__SD3_D4   IOMUX_PAD(0x45C, 0x17C, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 557 of file iomux-mx50.h.

#define MX50_PAD_SD3_D4__SSP_D4   IOMUX_PAD(0x45C, 0x17C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 560 of file iomux-mx50.h.

#define MX50_PAD_SD3_D5__GPIO_5_25   IOMUX_PAD(0x460, 0x180, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 563 of file iomux-mx50.h.

#define MX50_PAD_SD3_D5__SD3_D5   IOMUX_PAD(0x460, 0x180, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 562 of file iomux-mx50.h.

#define MX50_PAD_SD3_D5__SSP_D5   IOMUX_PAD(0x460, 0x180, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 565 of file iomux-mx50.h.

#define MX50_PAD_SD3_D6__GPIO_5_26   IOMUX_PAD(0x464, 0x184, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 568 of file iomux-mx50.h.

#define MX50_PAD_SD3_D6__SD3_D6   IOMUX_PAD(0x464, 0x184, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 567 of file iomux-mx50.h.

#define MX50_PAD_SD3_D6__SSP_D6   IOMUX_PAD(0x464, 0x184, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 570 of file iomux-mx50.h.

#define MX50_PAD_SD3_D7__GPIO_5_27   IOMUX_PAD(0x468, 0x188, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 573 of file iomux-mx50.h.

#define MX50_PAD_SD3_D7__SD3_D7   IOMUX_PAD(0x468, 0x188, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 572 of file iomux-mx50.h.

#define MX50_PAD_SD3_D7__SSP_D7   IOMUX_PAD(0x468, 0x188, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 575 of file iomux-mx50.h.

#define MX50_PAD_SD3_WP__GPIO_5_28   IOMUX_PAD(0x46C, 0x18C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 578 of file iomux-mx50.h.

#define MX50_PAD_SD3_WP__SD3_WP   IOMUX_PAD(0x46C, 0x18C, 0, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 577 of file iomux-mx50.h.

#define MX50_PAD_SD3_WP__SD4_LCTL   IOMUX_PAD(0x46C, 0x18C, 4, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 581 of file iomux-mx50.h.

#define MX50_PAD_SD3_WP__SSP_CD   IOMUX_PAD(0x46C, 0x18C, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 580 of file iomux-mx50.h.

#define MX50_PAD_SD3_WP__WEIM_CS3   IOMUX_PAD(0x46C, 0x18C, 5, 0x0, 0, NO_PAD_CTRL)

Definition at line 582 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXC__AUD3_RXC   IOMUX_PAD(0x32C, 0x80, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 181 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXC__CSPI_SS1   IOMUX_PAD(0x32C, 0x80, 4, 0x6ec, 0, MX50_CSPI_SS_PAD)

Definition at line 185 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXC__FEC_MDIO   IOMUX_PAD(0x32C, 0x80, 6, 0x774, 1, MX50_FEC_PAD_CTRL)

Definition at line 187 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXC__FEC_RX_CLK   IOMUX_PAD(0x32C, 0x80, 5, 0x780, 0, NO_PAD_CTRL)

Definition at line 186 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXC__GPIO_6_5   IOMUX_PAD(0x32C, 0x80, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 182 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXC__UART5_RXD   IOMUX_PAD(0x32C, 0x80, 2, 0x7e4, 1, MX50_UART_PAD_CTRL)

Definition at line 183 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXC__WEIM_D7   IOMUX_PAD(0x32C, 0x80, 3, 0x808, 0, NO_PAD_CTRL)

Definition at line 184 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXD__CSPI_SS3   IOMUX_PAD(0x324, 0x78, 4, 0x6f4, 0, MX50_CSPI_SS_PAD)

Definition at line 171 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXD__GPIO_6_3   IOMUX_PAD(0x324, 0x78, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 170 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXD__SSI_RXD   IOMUX_PAD(0x324, 0x78, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 169 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXFS__AUD3_RXFS   IOMUX_PAD(0x328, 0x7C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 173 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXFS__CSPI_SS2   IOMUX_PAD(0x328, 0x7C, 4, 0x6f0, 0, MX50_CSPI_SS_PAD)

Definition at line 177 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXFS__FEC_COL   IOMUX_PAD(0x328, 0x7C, 5, 0x770, 0, PAD_CTL_DSE_HIGH)

Definition at line 178 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXFS__FEC_MDC   IOMUX_PAD(0x328, 0x7C, 6, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 179 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXFS__GPIO_6_4   IOMUX_PAD(0x328, 0x7C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 174 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXFS__UART5_TXD   IOMUX_PAD(0x328, 0x7C, 2, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 175 of file iomux-mx50.h.

#define MX50_PAD_SSI_RXFS__WEIM_D6   IOMUX_PAD(0x328, 0x7C, 3, 0x804, 0, NO_PAD_CTRL)

Definition at line 176 of file iomux-mx50.h.

#define MX50_PAD_SSI_TXC__GPIO_6_1   IOMUX_PAD(0x31C, 0x70, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 163 of file iomux-mx50.h.

#define MX50_PAD_SSI_TXC__SSI_TXC   IOMUX_PAD(0x31C, 0x70, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 162 of file iomux-mx50.h.

#define MX50_PAD_SSI_TXD__CSPI_RDY   IOMUX_PAD(0x320, 0x74, 4, 0x6e8, 0, NO_PAD_CTRL)

Definition at line 167 of file iomux-mx50.h.

#define MX50_PAD_SSI_TXD__GPIO_6_2   IOMUX_PAD(0x320, 0x74, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 166 of file iomux-mx50.h.

#define MX50_PAD_SSI_TXD__SSI_TXD   IOMUX_PAD(0x320, 0x74, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 165 of file iomux-mx50.h.

#define MX50_PAD_SSI_TXFS__GPIO_6_0   IOMUX_PAD(0x318, 0x6C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 160 of file iomux-mx50.h.

#define MX50_PAD_SSI_TXFS__SSI_TXFS   IOMUX_PAD(0x318, 0x6C, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 159 of file iomux-mx50.h.

#define MX50_PAD_UART1_CTS__GPIO_6_8   IOMUX_PAD(0x338, 0x8C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 196 of file iomux-mx50.h.

#define MX50_PAD_UART1_CTS__SD4_CMD   IOMUX_PAD(0x338, 0x8C, 5, 0x74c, 0, MX50_SD_PAD_CTRL)

Definition at line 199 of file iomux-mx50.h.

#define MX50_PAD_UART1_CTS__SD4_D4   IOMUX_PAD(0x338, 0x8C, 4, 0x760, 0, MX50_SD_PAD_CTRL)

Definition at line 198 of file iomux-mx50.h.

#define MX50_PAD_UART1_CTS__UART1_CTS   IOMUX_PAD(0x338, 0x8C, 0, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 195 of file iomux-mx50.h.

#define MX50_PAD_UART1_CTS__UART5_TXD   IOMUX_PAD(0x338, 0x8C, 2, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 197 of file iomux-mx50.h.

#define MX50_PAD_UART1_RTS__GPIO_6_9   IOMUX_PAD(0x33C, 0x90, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 202 of file iomux-mx50.h.

#define MX50_PAD_UART1_RTS__SD4_CLK   IOMUX_PAD(0x33C, 0x90, 5, 0x748, 0, MX50_SD_PAD_CTRL)

Definition at line 205 of file iomux-mx50.h.

#define MX50_PAD_UART1_RTS__SD4_D5   IOMUX_PAD(0x33C, 0x90, 4, 0x764, 0, MX50_SD_PAD_CTRL)

Definition at line 204 of file iomux-mx50.h.

#define MX50_PAD_UART1_RTS__UART1_RTS   IOMUX_PAD(0x33C, 0x90, 0, 0x7c0, 1, MX50_UART_PAD_CTRL)

Definition at line 201 of file iomux-mx50.h.

#define MX50_PAD_UART1_RTS__UART5_RXD   IOMUX_PAD(0x33C, 0x90, 2, 0x7e4, 3, MX50_UART_PAD_CTRL)

Definition at line 203 of file iomux-mx50.h.

#define MX50_PAD_UART1_RXD__GPIO_6_7   IOMUX_PAD(0x334, 0x88, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 193 of file iomux-mx50.h.

#define MX50_PAD_UART1_RXD__UART1_RXD   IOMUX_PAD(0x334, 0x88, 0, 0x7c4, 1, MX50_UART_PAD_CTRL)

Definition at line 192 of file iomux-mx50.h.

#define MX50_PAD_UART1_TXD__GPIO_6_6   IOMUX_PAD(0x330, 0x84, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 190 of file iomux-mx50.h.

#define MX50_PAD_UART1_TXD__UART1_TXD   IOMUX_PAD(0x330, 0x84, 0, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 189 of file iomux-mx50.h.

#define MX50_PAD_UART2_CTS__GPIO_6_12   IOMUX_PAD(0x348, 0x9C, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 218 of file iomux-mx50.h.

#define MX50_PAD_UART2_CTS__SD4_CMD   IOMUX_PAD(0x348, 0x9C, 4, 0x74c, 1, MX50_SD_PAD_CTRL)

Definition at line 219 of file iomux-mx50.h.

#define MX50_PAD_UART2_CTS__SD4_D6   IOMUX_PAD(0x348, 0x9C, 5, 0x768, 1, MX50_SD_PAD_CTRL)

Definition at line 220 of file iomux-mx50.h.

#define MX50_PAD_UART2_CTS__UART2_CTS   IOMUX_PAD(0x348, 0x9C, 0, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 217 of file iomux-mx50.h.

#define MX50_PAD_UART2_RTS__GPIO_6_13   IOMUX_PAD(0x34C, 0xA0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 223 of file iomux-mx50.h.

#define MX50_PAD_UART2_RTS__SD4_CLK   IOMUX_PAD(0x34C, 0xA0, 4, 0x748, 1, MX50_SD_PAD_CTRL)

Definition at line 224 of file iomux-mx50.h.

#define MX50_PAD_UART2_RTS__SD4_D7   IOMUX_PAD(0x34C, 0xA0, 5, 0x76c, 1, MX50_SD_PAD_CTRL)

Definition at line 225 of file iomux-mx50.h.

#define MX50_PAD_UART2_RTS__UART2_RTS   IOMUX_PAD(0x34C, 0xA0, 0, 0x7c8, 3, MX50_UART_PAD_CTRL)

Definition at line 222 of file iomux-mx50.h.

#define MX50_PAD_UART2_RXD__GPIO_6_11   IOMUX_PAD(0x344, 0x98, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 213 of file iomux-mx50.h.

#define MX50_PAD_UART2_RXD__SD4_D5   IOMUX_PAD(0x344, 0x98, 5, 0x764, 1, MX50_SD_PAD_CTRL)

Definition at line 215 of file iomux-mx50.h.

#define MX50_PAD_UART2_RXD__SD4_D7   IOMUX_PAD(0x344, 0x98, 4, 0x76c, 0, MX50_SD_PAD_CTRL)

Definition at line 214 of file iomux-mx50.h.

#define MX50_PAD_UART2_RXD__UART2_RXD   IOMUX_PAD(0x344, 0x98, 0, 0x7cc, 3, MX50_UART_PAD_CTRL)

Definition at line 212 of file iomux-mx50.h.

#define MX50_PAD_UART2_TXD__GPIO_6_10   IOMUX_PAD(0x340, 0x94, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 208 of file iomux-mx50.h.

#define MX50_PAD_UART2_TXD__SD4_D4   IOMUX_PAD(0x340, 0x94, 5, 0x760, 1, MX50_SD_PAD_CTRL)

Definition at line 210 of file iomux-mx50.h.

#define MX50_PAD_UART2_TXD__SD4_D6   IOMUX_PAD(0x340, 0x94, 4, 0x768, 0, MX50_SD_PAD_CTRL)

Definition at line 209 of file iomux-mx50.h.

#define MX50_PAD_UART2_TXD__UART2_TXD   IOMUX_PAD(0x340, 0x94, 0, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 207 of file iomux-mx50.h.

#define MX50_PAD_UART3_RXD__GPIO_6_15   IOMUX_PAD(0x354, 0xA8, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 235 of file iomux-mx50.h.

#define MX50_PAD_UART3_RXD__SD1_D5   IOMUX_PAD(0x354, 0xA8, 3, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 236 of file iomux-mx50.h.

#define MX50_PAD_UART3_RXD__SD2_CD   IOMUX_PAD(0x354, 0xA8, 5, 0x740, 0, MX50_SD_PAD_CTRL)

Definition at line 238 of file iomux-mx50.h.

#define MX50_PAD_UART3_RXD__SD4_D1   IOMUX_PAD(0x354, 0xA8, 4, 0x754, 0, MX50_SD_PAD_CTRL)

Definition at line 237 of file iomux-mx50.h.

#define MX50_PAD_UART3_RXD__UART3_RXD   IOMUX_PAD(0x354, 0xA8, 0, 0x7d4, 1, MX50_UART_PAD_CTRL)

Definition at line 234 of file iomux-mx50.h.

#define MX50_PAD_UART3_RXD__WEIM_D13   IOMUX_PAD(0x354, 0xA8, 6, 0x820, 0, NO_PAD_CTRL)

Definition at line 239 of file iomux-mx50.h.

#define MX50_PAD_UART3_TXD__GPIO_6_14   IOMUX_PAD(0x350, 0xA4, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 228 of file iomux-mx50.h.

#define MX50_PAD_UART3_TXD__SD1_D4   IOMUX_PAD(0x350, 0xA4, 3, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 229 of file iomux-mx50.h.

#define MX50_PAD_UART3_TXD__SD2_WP   IOMUX_PAD(0x350, 0xA4, 5, 0x744, 0, MX50_SD_PAD_CTRL)

Definition at line 231 of file iomux-mx50.h.

#define MX50_PAD_UART3_TXD__SD4_D0   IOMUX_PAD(0x350, 0xA4, 4, 0x750, 0, MX50_SD_PAD_CTRL)

Definition at line 230 of file iomux-mx50.h.

#define MX50_PAD_UART3_TXD__UART3_TXD   IOMUX_PAD(0x350, 0xA4, 0, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 227 of file iomux-mx50.h.

#define MX50_PAD_UART3_TXD__WEIM_D12   IOMUX_PAD(0x350, 0xA4, 6, 0x81c, 0, NO_PAD_CTRL)

Definition at line 232 of file iomux-mx50.h.

#define MX50_PAD_UART4_RXD__GPIO_6_17   IOMUX_PAD(0x35C, 0xB0, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 250 of file iomux-mx50.h.

#define MX50_PAD_UART4_RXD__SD1_D7   IOMUX_PAD(0x35C, 0xB0, 3, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 252 of file iomux-mx50.h.

#define MX50_PAD_UART4_RXD__SD1_LCTL   IOMUX_PAD(0x35C, 0xB0, 5, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 254 of file iomux-mx50.h.

#define MX50_PAD_UART4_RXD__SD4_D3   IOMUX_PAD(0x35C, 0xB0, 4, 0x75c, 0, MX50_SD_PAD_CTRL)

Definition at line 253 of file iomux-mx50.h.

#define MX50_PAD_UART4_RXD__UART3_RTS   IOMUX_PAD(0x35C, 0xB0, 2, 0x7d0, 1, MX50_UART_PAD_CTRL)

Definition at line 251 of file iomux-mx50.h.

#define MX50_PAD_UART4_RXD__UART4_RXD   IOMUX_PAD(0x35C, 0xB0, 0, 0x7dc, 1, MX50_UART_PAD_CTRL)

Definition at line 249 of file iomux-mx50.h.

#define MX50_PAD_UART4_RXD__WEIM_D15   IOMUX_PAD(0x35C, 0xB0, 6, 0x828, 0, NO_PAD_CTRL)

Definition at line 255 of file iomux-mx50.h.

#define MX50_PAD_UART4_TXD__GPIO_6_16   IOMUX_PAD(0x358, 0xAC, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 242 of file iomux-mx50.h.

#define MX50_PAD_UART4_TXD__SD1_D6   IOMUX_PAD(0x358, 0xAC, 3, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 244 of file iomux-mx50.h.

#define MX50_PAD_UART4_TXD__SD2_LCTL   IOMUX_PAD(0x358, 0xAC, 5, 0x0, 0, MX50_SD_PAD_CTRL)

Definition at line 246 of file iomux-mx50.h.

#define MX50_PAD_UART4_TXD__SD4_D2   IOMUX_PAD(0x358, 0xAC, 4, 0x758, 0, MX50_SD_PAD_CTRL)

Definition at line 245 of file iomux-mx50.h.

#define MX50_PAD_UART4_TXD__UART3_CTS   IOMUX_PAD(0x358, 0xAC, 2, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 243 of file iomux-mx50.h.

#define MX50_PAD_UART4_TXD__UART4_TXD   IOMUX_PAD(0x358, 0xAC, 0, 0x0, 0, MX50_UART_PAD_CTRL)

Definition at line 241 of file iomux-mx50.h.

#define MX50_PAD_UART4_TXD__WEIM_D14   IOMUX_PAD(0x358, 0xAC, 6, 0x824, 0, NO_PAD_CTRL)

Definition at line 247 of file iomux-mx50.h.

#define MX50_PAD_WDOG__GPIO_6_28   IOMUX_PAD(0x314, 0x68, 1, 0x0, 0, NO_PAD_CTRL)

Definition at line 155 of file iomux-mx50.h.

#define MX50_PAD_WDOG__WDOG   IOMUX_PAD(0x314, 0x68, 0, 0x0, 0, NO_PAD_CTRL)

Definition at line 154 of file iomux-mx50.h.

#define MX50_PAD_WDOG__WDOG_RST   IOMUX_PAD(0x314, 0x68, 2, 0x0, 0, NO_PAD_CTRL)

Definition at line 156 of file iomux-mx50.h.

#define MX50_PAD_WDOG__XTAL32K   IOMUX_PAD(0x314, 0x68, 6, 0x0, 0, NO_PAD_CTRL)

Definition at line 157 of file iomux-mx50.h.

#define MX50_PIN_EIM_DA10__NANDF_CE0   IOMUX_PAD(0x620, 0x284, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 913 of file iomux-mx50.h.

#define MX50_PIN_EIM_DA11__NANDF_CE1   IOMUX_PAD(0x624, 0x288, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 917 of file iomux-mx50.h.

#define MX50_PIN_EIM_DA12__NANDF_CE2   IOMUX_PAD(0x628, 0x28C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 921 of file iomux-mx50.h.

#define MX50_PIN_EIM_DA13__EPDC_SDCE7   IOMUX_PAD(0x62C, 0x290, 3, 0x0, 0, NO_PAD_CTRL)

Definition at line 927 of file iomux-mx50.h.

#define MX50_PIN_EIM_DA13__NANDF_CE3   IOMUX_PAD(0x62C, 0x290, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 926 of file iomux-mx50.h.

#define MX50_PIN_EIM_DA15__NANDF_DQS   IOMUX_PAD(0x634, 0x298, 2, 0x7B0, 2, PAD_CTL_DSE_HIGH)

Definition at line 937 of file iomux-mx50.h.

#define MX50_PIN_EIM_DA8__NANDF_CLE   IOMUX_PAD(0x618, 0x27C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 905 of file iomux-mx50.h.

#define MX50_PIN_EIM_DA9__NANDF_ALE   IOMUX_PAD(0x61C, 0x280, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 909 of file iomux-mx50.h.

#define MX50_PIN_SD3_CLK__NANDF_RDN   IOMUX_PAD(0x448, 0x168, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 532 of file iomux-mx50.h.

#define MX50_PIN_SD3_CMD__NANDF_WRN   IOMUX_PAD(0x444, 0x164, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 527 of file iomux-mx50.h.

#define MX50_PIN_SD3_D0__NANDF_D4   IOMUX_PAD(0x44C, 0x16C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 537 of file iomux-mx50.h.

#define MX50_PIN_SD3_D1__NANDF_D5   IOMUX_PAD(0x450, 0x170, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 543 of file iomux-mx50.h.

#define MX50_PIN_SD3_D2__NANDF_D6   IOMUX_PAD(0x454, 0x174, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 548 of file iomux-mx50.h.

#define MX50_PIN_SD3_D3__NANDF_D7   IOMUX_PAD(0x458, 0x178, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 554 of file iomux-mx50.h.

#define MX50_PIN_SD3_D4__NANDF_D0   IOMUX_PAD(0x45C, 0x17C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 559 of file iomux-mx50.h.

#define MX50_PIN_SD3_D5__NANDF_D1   IOMUX_PAD(0x460, 0x180, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 564 of file iomux-mx50.h.

#define MX50_PIN_SD3_D6__NANDF_D2   IOMUX_PAD(0x464, 0x184, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 569 of file iomux-mx50.h.

#define MX50_PIN_SD3_D7__NANDF_D3   IOMUX_PAD(0x468, 0x188, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 574 of file iomux-mx50.h.

#define MX50_PIN_SD3_WP__NANDF_RESETN   IOMUX_PAD(0x46C, 0x18C, 2, 0x0, 0, PAD_CTL_DSE_HIGH)

Definition at line 579 of file iomux-mx50.h.

#define MX50_SD_PAD_CTRL
Value:
(PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH)

Definition at line 26 of file iomux-mx50.h.

#define MX50_UART_PAD_CTRL   (PAD_CTL_DSE_HIGH | PAD_CTL_PKE)

Definition at line 29 of file iomux-mx50.h.

#define MX50_USB_PAD_CTRL
Value:
(PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_DSE_HIGH | PAD_CTL_PUS_47K_UP)

Definition at line 34 of file iomux-mx50.h.

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