iop_spu_defs.h File Reference

Go to the source code of this file.

Data Structures
struct	reg_iop_spu_rw_seq_pc
struct	reg_iop_spu_rw_fsm_pc
struct	reg_iop_spu_rw_ctrl
struct	reg_iop_spu_rw_fsm_inputs3_0
struct	reg_iop_spu_rw_fsm_inputs7_4
struct	reg_iop_spu_rs_wr_stat
struct	reg_iop_spu_r_wr_stat
struct	reg_iop_spu_r_stat_in
struct	reg_iop_spu_r_special_stat
struct	reg_iop_spu_rw_reg_access
struct	reg_iop_spu_rw_event_cfg
struct	reg_iop_spu_rw_event_ret
struct	reg_iop_spu_r_trace
struct	reg_iop_spu_r_fsm_trace
struct	reg_iop_spu_rw_brp

Macros
#define	REG_RD(scope, inst, reg)
#define	REG_WR(scope, inst, reg, val)
#define	REG_RD_VECT(scope, inst, reg, index)
#define	REG_WR_VECT(scope, inst, reg, index, val)
#define	REG_RD_INT(scope, inst, reg)   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
#define	REG_WR_INT(scope, inst, reg, val)   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
#define	REG_RD_INT_VECT(scope, inst, reg, index)
#define	REG_WR_INT_VECT(scope, inst, reg, index, val)
#define	REG_TYPE_CONV(type, orgtype, val)   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
#define	reg_page_size   8192
#define	REG_ADDR(scope, inst, reg)   ( (inst) + REG_RD_ADDR_##scope##_##reg )
#define	REG_ADDR_VECT(scope, inst, reg, index)
#define	STRIDE_iop_spu_rw_r   4
#define	REG_RD_ADDR_iop_spu_rw_r   0
#define	REG_WR_ADDR_iop_spu_rw_r   0
#define	REG_RD_ADDR_iop_spu_rw_seq_pc   64
#define	REG_WR_ADDR_iop_spu_rw_seq_pc   64
#define	REG_RD_ADDR_iop_spu_rw_fsm_pc   68
#define	REG_WR_ADDR_iop_spu_rw_fsm_pc   68
#define	REG_RD_ADDR_iop_spu_rw_ctrl   72
#define	REG_WR_ADDR_iop_spu_rw_ctrl   72
#define	REG_RD_ADDR_iop_spu_rw_fsm_inputs3_0   76
#define	REG_WR_ADDR_iop_spu_rw_fsm_inputs3_0   76
#define	REG_RD_ADDR_iop_spu_rw_fsm_inputs7_4   80
#define	REG_WR_ADDR_iop_spu_rw_fsm_inputs7_4   80
#define	REG_RD_ADDR_iop_spu_rw_gio_out   84
#define	REG_WR_ADDR_iop_spu_rw_gio_out   84
#define	REG_RD_ADDR_iop_spu_rw_bus0_out   88
#define	REG_WR_ADDR_iop_spu_rw_bus0_out   88
#define	REG_RD_ADDR_iop_spu_rw_bus1_out   92
#define	REG_WR_ADDR_iop_spu_rw_bus1_out   92
#define	REG_RD_ADDR_iop_spu_r_gio_in   96
#define	REG_RD_ADDR_iop_spu_r_bus0_in   100
#define	REG_RD_ADDR_iop_spu_r_bus1_in   104
#define	REG_RD_ADDR_iop_spu_rw_gio_out_set   108
#define	REG_WR_ADDR_iop_spu_rw_gio_out_set   108
#define	REG_RD_ADDR_iop_spu_rw_gio_out_clr   112
#define	REG_WR_ADDR_iop_spu_rw_gio_out_clr   112
#define	REG_RD_ADDR_iop_spu_rs_wr_stat   116
#define	REG_RD_ADDR_iop_spu_r_wr_stat   120
#define	REG_RD_ADDR_iop_spu_r_reg_indexed_by_bus0_in   124
#define	REG_RD_ADDR_iop_spu_r_stat_in   128
#define	REG_RD_ADDR_iop_spu_r_trigger_in   132
#define	REG_RD_ADDR_iop_spu_r_special_stat   136
#define	REG_RD_ADDR_iop_spu_rw_reg_access   140
#define	REG_WR_ADDR_iop_spu_rw_reg_access   140
#define	STRIDE_iop_spu_rw_event_cfg   4
#define	REG_RD_ADDR_iop_spu_rw_event_cfg   144
#define	REG_WR_ADDR_iop_spu_rw_event_cfg   144
#define	STRIDE_iop_spu_rw_event_mask   4
#define	REG_RD_ADDR_iop_spu_rw_event_mask   160
#define	REG_WR_ADDR_iop_spu_rw_event_mask   160
#define	STRIDE_iop_spu_rw_event_val   4
#define	REG_RD_ADDR_iop_spu_rw_event_val   176
#define	REG_WR_ADDR_iop_spu_rw_event_val   176
#define	REG_RD_ADDR_iop_spu_rw_event_ret   192
#define	REG_WR_ADDR_iop_spu_rw_event_ret   192
#define	REG_RD_ADDR_iop_spu_r_trace   196
#define	REG_RD_ADDR_iop_spu_r_fsm_trace   200
#define	STRIDE_iop_spu_rw_brp   4
#define	REG_RD_ADDR_iop_spu_rw_brp   204
#define	REG_WR_ADDR_iop_spu_rw_brp   204

Typedefs
typedef unsigned int	reg_iop_spu_rw_r
typedef unsigned int	reg_iop_spu_rw_gio_out
typedef unsigned int	reg_iop_spu_rw_bus0_out
typedef unsigned int	reg_iop_spu_rw_bus1_out
typedef unsigned int	reg_iop_spu_r_gio_in
typedef unsigned int	reg_iop_spu_r_bus0_in
typedef unsigned int	reg_iop_spu_r_bus1_in
typedef unsigned int	reg_iop_spu_rw_gio_out_set
typedef unsigned int	reg_iop_spu_rw_gio_out_clr
typedef unsigned int	reg_iop_spu_r_reg_indexed_by_bus0_in
typedef unsigned int	reg_iop_spu_r_trigger_in
typedef unsigned int	reg_iop_spu_rw_event_mask
typedef unsigned int	reg_iop_spu_rw_event_val

Enumerations
enum	{   regk_iop_spu_attn_hi = 0x00000005, regk_iop_spu_attn_lo = 0x00000005, regk_iop_spu_attn_r0 = 0x00000000, regk_iop_spu_attn_r1 = 0x00000001,   regk_iop_spu_attn_r10 = 0x00000002, regk_iop_spu_attn_r11 = 0x00000003, regk_iop_spu_attn_r12 = 0x00000004, regk_iop_spu_attn_r13 = 0x00000005,   regk_iop_spu_attn_r14 = 0x00000006, regk_iop_spu_attn_r15 = 0x00000007, regk_iop_spu_attn_r2 = 0x00000002, regk_iop_spu_attn_r3 = 0x00000003,   regk_iop_spu_attn_r4 = 0x00000004, regk_iop_spu_attn_r5 = 0x00000005, regk_iop_spu_attn_r6 = 0x00000006, regk_iop_spu_attn_r7 = 0x00000007,   regk_iop_spu_attn_r8 = 0x00000000, regk_iop_spu_attn_r9 = 0x00000001, regk_iop_spu_c = 0x00000000, regk_iop_spu_flag = 0x00000002,   regk_iop_spu_gio_in = 0x00000000, regk_iop_spu_gio_out = 0x00000005, regk_iop_spu_gio_out0 = 0x00000008, regk_iop_spu_gio_out1 = 0x00000009,   regk_iop_spu_gio_out2 = 0x0000000a, regk_iop_spu_gio_out3 = 0x0000000b, regk_iop_spu_gio_out4 = 0x0000000c, regk_iop_spu_gio_out5 = 0x0000000d,   regk_iop_spu_gio_out6 = 0x0000000e, regk_iop_spu_gio_out7 = 0x0000000f, regk_iop_spu_n = 0x00000003, regk_iop_spu_no = 0x00000000,   regk_iop_spu_r0 = 0x00000008, regk_iop_spu_r1 = 0x00000009, regk_iop_spu_r10 = 0x0000000a, regk_iop_spu_r11 = 0x0000000b,   regk_iop_spu_r12 = 0x0000000c, regk_iop_spu_r13 = 0x0000000d, regk_iop_spu_r14 = 0x0000000e, regk_iop_spu_r15 = 0x0000000f,   regk_iop_spu_r2 = 0x0000000a, regk_iop_spu_r3 = 0x0000000b, regk_iop_spu_r4 = 0x0000000c, regk_iop_spu_r5 = 0x0000000d,   regk_iop_spu_r6 = 0x0000000e, regk_iop_spu_r7 = 0x0000000f, regk_iop_spu_r8 = 0x00000008, regk_iop_spu_r9 = 0x00000009,   regk_iop_spu_reg_hi = 0x00000002, regk_iop_spu_reg_lo = 0x00000002, regk_iop_spu_rw_brp_default = 0x00000000, regk_iop_spu_rw_brp_size = 0x00000004,   regk_iop_spu_rw_ctrl_default = 0x00000000, regk_iop_spu_rw_event_cfg_size = 0x00000004, regk_iop_spu_rw_event_mask_size = 0x00000004, regk_iop_spu_rw_event_val_size = 0x00000004,   regk_iop_spu_rw_gio_out_default = 0x00000000, regk_iop_spu_rw_r_size = 0x00000010, regk_iop_spu_rw_reg_access_default = 0x00000000, regk_iop_spu_stat_in = 0x00000002,   regk_iop_spu_statin_hi = 0x00000004, regk_iop_spu_statin_lo = 0x00000004, regk_iop_spu_trig = 0x00000003, regk_iop_spu_trigger = 0x00000006,   regk_iop_spu_v = 0x00000001, regk_iop_spu_wsts_gioout_spec = 0x00000001, regk_iop_spu_xor = 0x00000003, regk_iop_spu_xor_bus0_r2_0 = 0x00000000,   regk_iop_spu_xor_bus0m_r2_0 = 0x00000002, regk_iop_spu_xor_bus1_r3_0 = 0x00000001, regk_iop_spu_xor_bus1m_r3_0 = 0x00000003, regk_iop_spu_yes = 0x00000001,   regk_iop_spu_z = 0x00000002 }

Macro Definition Documentation

#define REG_ADDR	(		scope,
			inst,
			reg
	)		( (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 75 of file iop_spu_defs.h.

#define REG_ADDR_VECT	(		scope,
			inst,
			reg,
			index
	)

Value:

( (inst) + REG_RD_ADDR_##scope##_##reg + \
    (index) * STRIDE_##scope##_##reg )

Definition at line 80 of file iop_spu_defs.h.

#define reg_page_size   8192

Definition at line 71 of file iop_spu_defs.h.

#define REG_RD	(		scope,
			inst,
			reg
	)

Value:

REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 18 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_r_bus0_in   100

Definition at line 167 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_r_bus1_in   104

Definition at line 171 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_r_fsm_trace   200

Definition at line 363 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_r_gio_in   96

Definition at line 163 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_r_reg_indexed_by_bus0_in   124

Definition at line 229 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_r_special_stat   136

Definition at line 287 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_r_stat_in   128

Definition at line 257 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_r_trace   196

Definition at line 344 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_r_trigger_in   132

Definition at line 261 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_r_wr_stat   120

Definition at line 225 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rs_wr_stat   116

Definition at line 203 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_brp   204

Definition at line 373 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_bus0_out   88

Definition at line 153 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_bus1_out   92

Definition at line 158 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_ctrl   72

Definition at line 115 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_event_cfg   144

Definition at line 309 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_event_mask   160

Definition at line 315 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_event_ret   192

Definition at line 329 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_event_val   176

Definition at line 321 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_fsm_inputs3_0   76

Definition at line 129 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_fsm_inputs7_4   80

Definition at line 143 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_fsm_pc   68

Definition at line 106 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_gio_out   84

Definition at line 148 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_gio_out_clr   112

Definition at line 180 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_gio_out_set   108

Definition at line 175 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_r   0

Definition at line 90 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_reg_access   140

Definition at line 295 of file iop_spu_defs.h.

#define REG_RD_ADDR_iop_spu_rw_seq_pc   64

Definition at line 98 of file iop_spu_defs.h.

#define REG_RD_INT	(		scope,
			inst,
			reg
	)		REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 44 of file iop_spu_defs.h.

#define REG_RD_INT_VECT	(		scope,
			inst,
			reg,
			index
	)

Value:

REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
        (index) * STRIDE_##scope##_##reg )

Definition at line 54 of file iop_spu_defs.h.

#define REG_RD_VECT	(		scope,
			inst,
			reg,
			index
	)

Value:

REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg + \
        (index) * STRIDE_##scope##_##reg )

Definition at line 30 of file iop_spu_defs.h.

#define REG_TYPE_CONV	(		type,
			orgtype,
			val
	)		( { union { orgtype o; type n; } r; r.o = val; r.n; } )

Definition at line 66 of file iop_spu_defs.h.

#define REG_WR	(		scope,
			inst,
			reg,
			val
	)

Value:

REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )

Definition at line 24 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_brp   204

Definition at line 374 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_bus0_out   88

Definition at line 154 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_bus1_out   92

Definition at line 159 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_ctrl   72

Definition at line 116 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_event_cfg   144

Definition at line 310 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_event_mask   160

Definition at line 316 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_event_ret   192

Definition at line 330 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_event_val   176

Definition at line 322 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_fsm_inputs3_0   76

Definition at line 130 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_fsm_inputs7_4   80

Definition at line 144 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_fsm_pc   68

Definition at line 107 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_gio_out   84

Definition at line 149 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_gio_out_clr   112

Definition at line 181 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_gio_out_set   108

Definition at line 176 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_r   0

Definition at line 91 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_reg_access   140

Definition at line 296 of file iop_spu_defs.h.

#define REG_WR_ADDR_iop_spu_rw_seq_pc   64

Definition at line 99 of file iop_spu_defs.h.

#define REG_WR_INT	(		scope,
			inst,
			reg,
			val
	)		REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )

Definition at line 49 of file iop_spu_defs.h.

#define REG_WR_INT_VECT	(		scope,
			inst,
			reg,
			index,
			val
	)

Value:

REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
         (index) * STRIDE_##scope##_##reg, (val) )

Definition at line 60 of file iop_spu_defs.h.

#define REG_WR_VECT	(		scope,
			inst,
			reg,
			index,
			val
	)

Value:

REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg + \
         (index) * STRIDE_##scope##_##reg, (val) )

Definition at line 37 of file iop_spu_defs.h.

#define STRIDE_iop_spu_rw_brp   4

Definition at line 365 of file iop_spu_defs.h.

#define STRIDE_iop_spu_rw_event_cfg   4

Definition at line 298 of file iop_spu_defs.h.

#define STRIDE_iop_spu_rw_event_mask   4

Definition at line 312 of file iop_spu_defs.h.

#define STRIDE_iop_spu_rw_event_val   4

Definition at line 318 of file iop_spu_defs.h.

#define STRIDE_iop_spu_rw_r   4

Definition at line 87 of file iop_spu_defs.h.

Typedef Documentation

typedef unsigned int reg_iop_spu_r_bus0_in

Definition at line 166 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_r_bus1_in

Definition at line 170 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_r_gio_in

Definition at line 162 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_r_reg_indexed_by_bus0_in

Definition at line 228 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_r_trigger_in

Definition at line 260 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_rw_bus0_out

Definition at line 152 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_rw_bus1_out

Definition at line 157 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_rw_event_mask

Definition at line 314 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_rw_event_val

Definition at line 320 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_rw_gio_out

Definition at line 147 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_rw_gio_out_clr

Definition at line 179 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_rw_gio_out_set

Definition at line 174 of file iop_spu_defs.h.

typedef unsigned int reg_iop_spu_rw_r

Definition at line 89 of file iop_spu_defs.h.

Enumeration Type Documentation

anonymous enum

Enumerator:

regk_iop_spu_attn_hi
regk_iop_spu_attn_lo
regk_iop_spu_attn_r0
regk_iop_spu_attn_r1
regk_iop_spu_attn_r10
regk_iop_spu_attn_r11
regk_iop_spu_attn_r12
regk_iop_spu_attn_r13
regk_iop_spu_attn_r14
regk_iop_spu_attn_r15
regk_iop_spu_attn_r2
regk_iop_spu_attn_r3
regk_iop_spu_attn_r4
regk_iop_spu_attn_r5
regk_iop_spu_attn_r6
regk_iop_spu_attn_r7
regk_iop_spu_attn_r8
regk_iop_spu_attn_r9
regk_iop_spu_c
regk_iop_spu_flag
regk_iop_spu_gio_in
regk_iop_spu_gio_out
regk_iop_spu_gio_out0
regk_iop_spu_gio_out1
regk_iop_spu_gio_out2
regk_iop_spu_gio_out3
regk_iop_spu_gio_out4
regk_iop_spu_gio_out5
regk_iop_spu_gio_out6
regk_iop_spu_gio_out7
regk_iop_spu_n
regk_iop_spu_no
regk_iop_spu_r0
regk_iop_spu_r1
regk_iop_spu_r10
regk_iop_spu_r11
regk_iop_spu_r12
regk_iop_spu_r13
regk_iop_spu_r14
regk_iop_spu_r15
regk_iop_spu_r2
regk_iop_spu_r3
regk_iop_spu_r4
regk_iop_spu_r5
regk_iop_spu_r6
regk_iop_spu_r7
regk_iop_spu_r8
regk_iop_spu_r9
regk_iop_spu_reg_hi
regk_iop_spu_reg_lo
regk_iop_spu_rw_brp_default
regk_iop_spu_rw_brp_size
regk_iop_spu_rw_ctrl_default
regk_iop_spu_rw_event_cfg_size
regk_iop_spu_rw_event_mask_size
regk_iop_spu_rw_event_val_size
regk_iop_spu_rw_gio_out_default
regk_iop_spu_rw_r_size
regk_iop_spu_rw_reg_access_default
regk_iop_spu_stat_in
regk_iop_spu_statin_hi
regk_iop_spu_statin_lo
regk_iop_spu_trig
regk_iop_spu_trigger
regk_iop_spu_v
regk_iop_spu_wsts_gioout_spec
regk_iop_spu_xor
regk_iop_spu_xor_bus0_r2_0
regk_iop_spu_xor_bus0m_r2_0
regk_iop_spu_xor_bus1_r3_0
regk_iop_spu_xor_bus1m_r3_0
regk_iop_spu_yes
regk_iop_spu_z

Definition at line 378 of file iop_spu_defs.h.