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13 #ifndef __IOMMU_MMAP_H
14 #define __IOMMU_MMAP_H
33 #define IOVMF_SW_SHIFT 16
38 #define IOVMF_CAM_MASK (~((1 << 10) - 1))
39 #define IOVMF_RAM_MASK (~IOVMF_CAM_MASK)
41 #define IOVMF_PGSZ_MASK (3 << 0)
42 #define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M
43 #define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K
44 #define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K
45 #define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M
47 #define IOVMF_ENDIAN_MASK (1 << 9)
48 #define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG
49 #define IOVMF_ENDIAN_LITTLE MMU_RAM_ENDIAN_LITTLE
51 #define IOVMF_ELSZ_MASK (3 << 7)
52 #define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8
53 #define IOVMF_ELSZ_16 MMU_RAM_ELSZ_16
54 #define IOVMF_ELSZ_32 MMU_RAM_ELSZ_32
55 #define IOVMF_ELSZ_NONE MMU_RAM_ELSZ_NONE
57 #define IOVMF_MIXED_MASK (1 << 6)
58 #define IOVMF_MIXED MMU_RAM_MIXED
63 #define IOVMF_MMIO (1 << IOVMF_SW_SHIFT)
64 #define IOVMF_ALLOC (2 << IOVMF_SW_SHIFT)
65 #define IOVMF_ALLOC_MASK (3 << IOVMF_SW_SHIFT)
68 #define IOVMF_DISCONT (1 << (2 + IOVMF_SW_SHIFT))
69 #define IOVMF_LINEAR (2 << (2 + IOVMF_SW_SHIFT))
70 #define IOVMF_LINEAR_MASK (3 << (2 + IOVMF_SW_SHIFT))
72 #define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT))