Linux Kernel
3.7.1
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Go to the source code of this file.
Data Structures | |
struct | idmac |
struct | ipu |
Macros | |
#define | IPU_CONF 0x00 |
#define | IPU_CHA_BUF0_RDY 0x04 |
#define | IPU_CHA_BUF1_RDY 0x08 |
#define | IPU_CHA_DB_MODE_SEL 0x0C |
#define | IPU_CHA_CUR_BUF 0x10 |
#define | IPU_FS_PROC_FLOW 0x14 |
#define | IPU_FS_DISP_FLOW 0x18 |
#define | IPU_TASKS_STAT 0x1C |
#define | IPU_IMA_ADDR 0x20 |
#define | IPU_IMA_DATA 0x24 |
#define | IPU_INT_CTRL_1 0x28 |
#define | IPU_INT_CTRL_2 0x2C |
#define | IPU_INT_CTRL_3 0x30 |
#define | IPU_INT_CTRL_4 0x34 |
#define | IPU_INT_CTRL_5 0x38 |
#define | IPU_INT_STAT_1 0x3C |
#define | IPU_INT_STAT_2 0x40 |
#define | IPU_INT_STAT_3 0x44 |
#define | IPU_INT_STAT_4 0x48 |
#define | IPU_INT_STAT_5 0x4C |
#define | IPU_BRK_CTRL_1 0x50 |
#define | IPU_BRK_CTRL_2 0x54 |
#define | IPU_BRK_STAT 0x58 |
#define | IPU_DIAGB_CTRL 0x5C |
#define | IPU_CONF_CSI_EN 0x00000001 |
#define | IPU_CONF_IC_EN 0x00000002 |
#define | IPU_CONF_ROT_EN 0x00000004 |
#define | IPU_CONF_PF_EN 0x00000008 |
#define | IPU_CONF_SDC_EN 0x00000010 |
#define | IPU_CONF_ADC_EN 0x00000020 |
#define | IPU_CONF_DI_EN 0x00000040 |
#define | IPU_CONF_DU_EN 0x00000080 |
#define | IPU_CONF_PXL_ENDIAN 0x00000100 |
#define | IC_CONF 0x88 |
#define | IC_PRP_ENC_RSC 0x8C |
#define | IC_PRP_VF_RSC 0x90 |
#define | IC_PP_RSC 0x94 |
#define | IC_CMBP_1 0x98 |
#define | IC_CMBP_2 0x9C |
#define | PF_CONF 0xA0 |
#define | IDMAC_CONF 0xA4 |
#define | IDMAC_CHA_EN 0xA8 |
#define | IDMAC_CHA_PRI 0xAC |
#define | IDMAC_CHA_BUSY 0xB0 |
#define | IC_CONF_PRPENC_EN 0x00000001 |
#define | IC_CONF_PRPENC_CSC1 0x00000002 |
#define | IC_CONF_PRPENC_ROT_EN 0x00000004 |
#define | IC_CONF_PRPVF_EN 0x00000100 |
#define | IC_CONF_PRPVF_CSC1 0x00000200 |
#define | IC_CONF_PRPVF_CSC2 0x00000400 |
#define | IC_CONF_PRPVF_CMB 0x00000800 |
#define | IC_CONF_PRPVF_ROT_EN 0x00001000 |
#define | IC_CONF_PP_EN 0x00010000 |
#define | IC_CONF_PP_CSC1 0x00020000 |
#define | IC_CONF_PP_CSC2 0x00040000 |
#define | IC_CONF_PP_CMB 0x00080000 |
#define | IC_CONF_PP_ROT_EN 0x00100000 |
#define | IC_CONF_IC_GLB_LOC_A 0x10000000 |
#define | IC_CONF_KEY_COLOR_EN 0x20000000 |
#define | IC_CONF_RWS_EN 0x40000000 |
#define | IC_CONF_CSI_MEM_WR_EN 0x80000000 |
#define | IDMA_CHAN_INVALID 0x000000FF |
#define | IDMA_IC_0 0x00000001 |
#define | IDMA_IC_1 0x00000002 |
#define | IDMA_IC_2 0x00000004 |
#define | IDMA_IC_3 0x00000008 |
#define | IDMA_IC_4 0x00000010 |
#define | IDMA_IC_5 0x00000020 |
#define | IDMA_IC_6 0x00000040 |
#define | IDMA_IC_7 0x00000080 |
#define | IDMA_IC_8 0x00000100 |
#define | IDMA_IC_9 0x00000200 |
#define | IDMA_IC_10 0x00000400 |
#define | IDMA_IC_11 0x00000800 |
#define | IDMA_IC_12 0x00001000 |
#define | IDMA_IC_13 0x00002000 |
#define | IDMA_SDC_BG 0x00004000 |
#define | IDMA_SDC_FG 0x00008000 |
#define | IDMA_SDC_MASK 0x00010000 |
#define | IDMA_SDC_PARTIAL 0x00020000 |
#define | IDMA_ADC_SYS1_WR 0x00040000 |
#define | IDMA_ADC_SYS2_WR 0x00080000 |
#define | IDMA_ADC_SYS1_CMD 0x00100000 |
#define | IDMA_ADC_SYS2_CMD 0x00200000 |
#define | IDMA_ADC_SYS1_RD 0x00400000 |
#define | IDMA_ADC_SYS2_RD 0x00800000 |
#define | IDMA_PF_QP 0x01000000 |
#define | IDMA_PF_BSP 0x02000000 |
#define | IDMA_PF_Y_IN 0x04000000 |
#define | IDMA_PF_U_IN 0x08000000 |
#define | IDMA_PF_V_IN 0x10000000 |
#define | IDMA_PF_Y_OUT 0x20000000 |
#define | IDMA_PF_U_OUT 0x40000000 |
#define | IDMA_PF_V_OUT 0x80000000 |
#define | TSTAT_PF_H264_PAUSE 0x00000001 |
#define | TSTAT_CSI2MEM_MASK 0x0000000C |
#define | TSTAT_CSI2MEM_OFFSET 2 |
#define | TSTAT_VF_MASK 0x00000600 |
#define | TSTAT_VF_OFFSET 9 |
#define | TSTAT_VF_ROT_MASK 0x000C0000 |
#define | TSTAT_VF_ROT_OFFSET 18 |
#define | TSTAT_ENC_MASK 0x00000180 |
#define | TSTAT_ENC_OFFSET 7 |
#define | TSTAT_ENC_ROT_MASK 0x00030000 |
#define | TSTAT_ENC_ROT_OFFSET 16 |
#define | TSTAT_PP_MASK 0x00001800 |
#define | TSTAT_PP_OFFSET 11 |
#define | TSTAT_PP_ROT_MASK 0x00300000 |
#define | TSTAT_PP_ROT_OFFSET 20 |
#define | TSTAT_PF_MASK 0x00C00000 |
#define | TSTAT_PF_OFFSET 22 |
#define | TSTAT_ADCSYS1_MASK 0x03000000 |
#define | TSTAT_ADCSYS1_OFFSET 24 |
#define | TSTAT_ADCSYS2_MASK 0x0C000000 |
#define | TSTAT_ADCSYS2_OFFSET 26 |
#define | TASK_STAT_IDLE 0 |
#define | TASK_STAT_ACTIVE 1 |
#define | TASK_STAT_WAIT4READY 2 |
#define | to_idmac(d) container_of(d, struct idmac, dma) |
Functions | |
int | ipu_irq_attach_irq (struct ipu *ipu, struct platform_device *dev) |
void | ipu_irq_detach_irq (struct ipu *ipu, struct platform_device *dev) |
bool | ipu_irq_status (uint32_t irq) |
int | ipu_irq_map (unsigned int source) |
int | ipu_irq_unmap (unsigned int source) |
#define IC_CMBP_1 0x98 |
Definition at line 61 of file ipu_intern.h.
#define IC_CMBP_2 0x9C |
Definition at line 62 of file ipu_intern.h.
#define IC_CONF 0x88 |
Definition at line 57 of file ipu_intern.h.
#define IC_CONF_CSI_MEM_WR_EN 0x80000000 |
Definition at line 86 of file ipu_intern.h.
#define IC_CONF_IC_GLB_LOC_A 0x10000000 |
Definition at line 83 of file ipu_intern.h.
#define IC_CONF_KEY_COLOR_EN 0x20000000 |
Definition at line 84 of file ipu_intern.h.
#define IC_CONF_PP_CMB 0x00080000 |
Definition at line 81 of file ipu_intern.h.
#define IC_CONF_PP_CSC1 0x00020000 |
Definition at line 79 of file ipu_intern.h.
#define IC_CONF_PP_CSC2 0x00040000 |
Definition at line 80 of file ipu_intern.h.
#define IC_CONF_PP_EN 0x00010000 |
Definition at line 78 of file ipu_intern.h.
#define IC_CONF_PP_ROT_EN 0x00100000 |
Definition at line 82 of file ipu_intern.h.
#define IC_CONF_PRPENC_CSC1 0x00000002 |
Definition at line 71 of file ipu_intern.h.
#define IC_CONF_PRPENC_EN 0x00000001 |
Definition at line 70 of file ipu_intern.h.
#define IC_CONF_PRPENC_ROT_EN 0x00000004 |
Definition at line 72 of file ipu_intern.h.
#define IC_CONF_PRPVF_CMB 0x00000800 |
Definition at line 76 of file ipu_intern.h.
#define IC_CONF_PRPVF_CSC1 0x00000200 |
Definition at line 74 of file ipu_intern.h.
#define IC_CONF_PRPVF_CSC2 0x00000400 |
Definition at line 75 of file ipu_intern.h.
#define IC_CONF_PRPVF_EN 0x00000100 |
Definition at line 73 of file ipu_intern.h.
#define IC_CONF_PRPVF_ROT_EN 0x00001000 |
Definition at line 77 of file ipu_intern.h.
#define IC_CONF_RWS_EN 0x40000000 |
Definition at line 85 of file ipu_intern.h.
#define IC_PP_RSC 0x94 |
Definition at line 60 of file ipu_intern.h.
#define IC_PRP_ENC_RSC 0x8C |
Definition at line 58 of file ipu_intern.h.
#define IC_PRP_VF_RSC 0x90 |
Definition at line 59 of file ipu_intern.h.
#define IDMA_ADC_SYS1_CMD 0x00100000 |
Definition at line 109 of file ipu_intern.h.
#define IDMA_ADC_SYS1_RD 0x00400000 |
Definition at line 111 of file ipu_intern.h.
#define IDMA_ADC_SYS1_WR 0x00040000 |
Definition at line 107 of file ipu_intern.h.
#define IDMA_ADC_SYS2_CMD 0x00200000 |
Definition at line 110 of file ipu_intern.h.
#define IDMA_ADC_SYS2_RD 0x00800000 |
Definition at line 112 of file ipu_intern.h.
#define IDMA_ADC_SYS2_WR 0x00080000 |
Definition at line 108 of file ipu_intern.h.
#define IDMA_CHAN_INVALID 0x000000FF |
Definition at line 88 of file ipu_intern.h.
#define IDMA_IC_0 0x00000001 |
Definition at line 89 of file ipu_intern.h.
#define IDMA_IC_1 0x00000002 |
Definition at line 90 of file ipu_intern.h.
#define IDMA_IC_10 0x00000400 |
Definition at line 99 of file ipu_intern.h.
#define IDMA_IC_11 0x00000800 |
Definition at line 100 of file ipu_intern.h.
#define IDMA_IC_12 0x00001000 |
Definition at line 101 of file ipu_intern.h.
#define IDMA_IC_13 0x00002000 |
Definition at line 102 of file ipu_intern.h.
#define IDMA_IC_2 0x00000004 |
Definition at line 91 of file ipu_intern.h.
#define IDMA_IC_3 0x00000008 |
Definition at line 92 of file ipu_intern.h.
#define IDMA_IC_4 0x00000010 |
Definition at line 93 of file ipu_intern.h.
#define IDMA_IC_5 0x00000020 |
Definition at line 94 of file ipu_intern.h.
#define IDMA_IC_6 0x00000040 |
Definition at line 95 of file ipu_intern.h.
#define IDMA_IC_7 0x00000080 |
Definition at line 96 of file ipu_intern.h.
#define IDMA_IC_8 0x00000100 |
Definition at line 97 of file ipu_intern.h.
#define IDMA_IC_9 0x00000200 |
Definition at line 98 of file ipu_intern.h.
#define IDMA_PF_BSP 0x02000000 |
Definition at line 114 of file ipu_intern.h.
#define IDMA_PF_QP 0x01000000 |
Definition at line 113 of file ipu_intern.h.
#define IDMA_PF_U_IN 0x08000000 |
Definition at line 116 of file ipu_intern.h.
#define IDMA_PF_U_OUT 0x40000000 |
Definition at line 119 of file ipu_intern.h.
#define IDMA_PF_V_IN 0x10000000 |
Definition at line 117 of file ipu_intern.h.
#define IDMA_PF_V_OUT 0x80000000 |
Definition at line 120 of file ipu_intern.h.
#define IDMA_PF_Y_IN 0x04000000 |
Definition at line 115 of file ipu_intern.h.
#define IDMA_PF_Y_OUT 0x20000000 |
Definition at line 118 of file ipu_intern.h.
#define IDMA_SDC_BG 0x00004000 |
Definition at line 103 of file ipu_intern.h.
#define IDMA_SDC_FG 0x00008000 |
Definition at line 104 of file ipu_intern.h.
#define IDMA_SDC_MASK 0x00010000 |
Definition at line 105 of file ipu_intern.h.
#define IDMA_SDC_PARTIAL 0x00020000 |
Definition at line 106 of file ipu_intern.h.
#define IDMAC_CHA_BUSY 0xB0 |
Definition at line 67 of file ipu_intern.h.
#define IDMAC_CHA_EN 0xA8 |
Definition at line 65 of file ipu_intern.h.
#define IDMAC_CHA_PRI 0xAC |
Definition at line 66 of file ipu_intern.h.
#define IDMAC_CONF 0xA4 |
Definition at line 64 of file ipu_intern.h.
#define IPU_BRK_CTRL_1 0x50 |
Definition at line 40 of file ipu_intern.h.
#define IPU_BRK_CTRL_2 0x54 |
Definition at line 41 of file ipu_intern.h.
#define IPU_BRK_STAT 0x58 |
Definition at line 42 of file ipu_intern.h.
#define IPU_CHA_BUF0_RDY 0x04 |
Definition at line 21 of file ipu_intern.h.
#define IPU_CHA_BUF1_RDY 0x08 |
Definition at line 22 of file ipu_intern.h.
#define IPU_CHA_CUR_BUF 0x10 |
Definition at line 24 of file ipu_intern.h.
#define IPU_CHA_DB_MODE_SEL 0x0C |
Definition at line 23 of file ipu_intern.h.
#define IPU_CONF 0x00 |
Definition at line 20 of file ipu_intern.h.
#define IPU_CONF_ADC_EN 0x00000020 |
Definition at line 51 of file ipu_intern.h.
#define IPU_CONF_CSI_EN 0x00000001 |
Definition at line 46 of file ipu_intern.h.
#define IPU_CONF_DI_EN 0x00000040 |
Definition at line 52 of file ipu_intern.h.
#define IPU_CONF_DU_EN 0x00000080 |
Definition at line 53 of file ipu_intern.h.
#define IPU_CONF_IC_EN 0x00000002 |
Definition at line 47 of file ipu_intern.h.
#define IPU_CONF_PF_EN 0x00000008 |
Definition at line 49 of file ipu_intern.h.
#define IPU_CONF_PXL_ENDIAN 0x00000100 |
Definition at line 54 of file ipu_intern.h.
#define IPU_CONF_ROT_EN 0x00000004 |
Definition at line 48 of file ipu_intern.h.
#define IPU_CONF_SDC_EN 0x00000010 |
Definition at line 50 of file ipu_intern.h.
#define IPU_DIAGB_CTRL 0x5C |
Definition at line 43 of file ipu_intern.h.
#define IPU_FS_DISP_FLOW 0x18 |
Definition at line 26 of file ipu_intern.h.
#define IPU_FS_PROC_FLOW 0x14 |
Definition at line 25 of file ipu_intern.h.
#define IPU_IMA_ADDR 0x20 |
Definition at line 28 of file ipu_intern.h.
#define IPU_IMA_DATA 0x24 |
Definition at line 29 of file ipu_intern.h.
#define IPU_INT_CTRL_1 0x28 |
Definition at line 30 of file ipu_intern.h.
#define IPU_INT_CTRL_2 0x2C |
Definition at line 31 of file ipu_intern.h.
#define IPU_INT_CTRL_3 0x30 |
Definition at line 32 of file ipu_intern.h.
#define IPU_INT_CTRL_4 0x34 |
Definition at line 33 of file ipu_intern.h.
#define IPU_INT_CTRL_5 0x38 |
Definition at line 34 of file ipu_intern.h.
#define IPU_INT_STAT_1 0x3C |
Definition at line 35 of file ipu_intern.h.
#define IPU_INT_STAT_2 0x40 |
Definition at line 36 of file ipu_intern.h.
#define IPU_INT_STAT_3 0x44 |
Definition at line 37 of file ipu_intern.h.
#define IPU_INT_STAT_4 0x48 |
Definition at line 38 of file ipu_intern.h.
#define IPU_INT_STAT_5 0x4C |
Definition at line 39 of file ipu_intern.h.
#define IPU_TASKS_STAT 0x1C |
Definition at line 27 of file ipu_intern.h.
#define PF_CONF 0xA0 |
Definition at line 63 of file ipu_intern.h.
#define TASK_STAT_ACTIVE 1 |
Definition at line 145 of file ipu_intern.h.
#define TASK_STAT_IDLE 0 |
Definition at line 144 of file ipu_intern.h.
#define TASK_STAT_WAIT4READY 2 |
Definition at line 146 of file ipu_intern.h.
Definition at line 167 of file ipu_intern.h.
#define TSTAT_ADCSYS1_MASK 0x03000000 |
Definition at line 139 of file ipu_intern.h.
#define TSTAT_ADCSYS1_OFFSET 24 |
Definition at line 140 of file ipu_intern.h.
#define TSTAT_ADCSYS2_MASK 0x0C000000 |
Definition at line 141 of file ipu_intern.h.
#define TSTAT_ADCSYS2_OFFSET 26 |
Definition at line 142 of file ipu_intern.h.
#define TSTAT_CSI2MEM_MASK 0x0000000C |
Definition at line 123 of file ipu_intern.h.
#define TSTAT_CSI2MEM_OFFSET 2 |
Definition at line 124 of file ipu_intern.h.
#define TSTAT_ENC_MASK 0x00000180 |
Definition at line 129 of file ipu_intern.h.
#define TSTAT_ENC_OFFSET 7 |
Definition at line 130 of file ipu_intern.h.
#define TSTAT_ENC_ROT_MASK 0x00030000 |
Definition at line 131 of file ipu_intern.h.
#define TSTAT_ENC_ROT_OFFSET 16 |
Definition at line 132 of file ipu_intern.h.
#define TSTAT_PF_H264_PAUSE 0x00000001 |
Definition at line 122 of file ipu_intern.h.
#define TSTAT_PF_MASK 0x00C00000 |
Definition at line 137 of file ipu_intern.h.
#define TSTAT_PF_OFFSET 22 |
Definition at line 138 of file ipu_intern.h.
#define TSTAT_PP_MASK 0x00001800 |
Definition at line 133 of file ipu_intern.h.
#define TSTAT_PP_OFFSET 11 |
Definition at line 134 of file ipu_intern.h.
#define TSTAT_PP_ROT_MASK 0x00300000 |
Definition at line 135 of file ipu_intern.h.
#define TSTAT_PP_ROT_OFFSET 20 |
Definition at line 136 of file ipu_intern.h.
#define TSTAT_VF_MASK 0x00000600 |
Definition at line 125 of file ipu_intern.h.
#define TSTAT_VF_OFFSET 9 |
Definition at line 126 of file ipu_intern.h.
#define TSTAT_VF_ROT_MASK 0x000C0000 |
Definition at line 127 of file ipu_intern.h.
#define TSTAT_VF_ROT_OFFSET 18 |
Definition at line 128 of file ipu_intern.h.
int ipu_irq_attach_irq | ( | struct ipu * | ipu, |
struct platform_device * | dev | ||
) |
void ipu_irq_detach_irq | ( | struct ipu * | ipu, |
struct platform_device * | dev | ||
) |
int ipu_irq_map | ( | unsigned int | source | ) |
ipu_irq_map() - map an IPU interrupt source to an IRQ number : interrupt source bit position (see below)
The source parameter has to be explained further. On i.MX31 IPU has 137 IRQ sources, they are broken down in 5 32-bit registers, like 32, 32, 24, 32, 17. However, the source argument of this function is not the sequence number of the possible IRQ, but rather its bit position. So, first interrupt in fourth register has source number 96, and not 88. This makes calculations easier, and also provides forward compatibility with any future IPU implementations with any interrupt bit assignments.
ipu_irq_map() - map an IPU interrupt source to an IRQ number : interrupt source bit position (see ipu_irq_map())