ixgbe_dcb_82599.h File Reference

Go to the source code of this file.

Macros
#define	IXGBE_RTTDCS_TDPAC
#define	IXGBE_RTTDCS_VMPAC
#define	IXGBE_RTTDCS_TDRM   0x00000010 /* Transmit Recycle Mode */
#define	IXGBE_RTTDCS_ARBDIS   0x00000040 /* DCB arbiter disable */
#define	IXGBE_RTTDCS_BDPM   0x00400000 /* Bypass Data Pipe - must clear! */
#define	IXGBE_RTTDCS_BPBFSM
#define	IXGBE_RTTDCS_SPEED_CHG   0x80000000 /* Link speed change */
#define	IXGBE_RTRUP2TC_UP_SHIFT   3
#define	IXGBE_RTTUP2TC_UP_SHIFT   3
#define	IXGBE_RTRPT4C_MCL_SHIFT   12 /* Offset to Max Credit Limit setting */
#define	IXGBE_RTRPT4C_BWG_SHIFT   9 /* Offset to BWG index */
#define	IXGBE_RTRPT4C_GSP   0x40000000 /* GSP enable bit */
#define	IXGBE_RTRPT4C_LSP   0x80000000 /* LSP enable bit */
#define	IXGBE_RDRXCTL_MPBEN
#define	IXGBE_RDRXCTL_MCEN
#define	IXGBE_RTRPCS_RRM   0x00000002 /* Receive Recycle Mode enable */
#define	IXGBE_RTRPCS_RAC   0x00000004
#define	IXGBE_RTRPCS_ARBDIS   0x00000040 /* Arbitration disable bit */
#define	IXGBE_RTTDT2C_MCL_SHIFT   12
#define	IXGBE_RTTDT2C_BWG_SHIFT   9
#define	IXGBE_RTTDT2C_GSP   0x40000000
#define	IXGBE_RTTDT2C_LSP   0x80000000
#define	IXGBE_RTTPT2C_MCL_SHIFT   12
#define	IXGBE_RTTPT2C_BWG_SHIFT   9
#define	IXGBE_RTTPT2C_GSP   0x40000000
#define	IXGBE_RTTPT2C_LSP   0x80000000
#define	IXGBE_RTTPCS_TPPAC
#define	IXGBE_RTTPCS_ARBDIS   0x00000040 /* Arbiter disable */
#define	IXGBE_RTTPCS_TPRM   0x00000100 /* Transmit Recycle Mode enable */
#define	IXGBE_RTTPCS_ARBD_SHIFT   22
#define	IXGBE_RTTPCS_ARBD_DCB   0x4 /* Arbitration delay in DCB mode */
#define	IXGBE_SECTX_DCB   0x00001F00 /* DCB TX Buffer IFG */

Functions
s32	ixgbe_dcb_config_pfc_82599 (struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc)
s32	ixgbe_dcb_config_rx_arbiter_82599 (struct ixgbe_hw *hw, u16 *refill, u16 *max, u8 *bwg_id, u8 *prio_type, u8 *prio_tc)
s32	ixgbe_dcb_config_tx_desc_arbiter_82599 (struct ixgbe_hw *hw, u16 *refill, u16 *max, u8 *bwg_id, u8 *prio_type)
s32	ixgbe_dcb_config_tx_data_arbiter_82599 (struct ixgbe_hw *hw, u16 *refill, u16 *max, u8 *bwg_id, u8 *prio_type, u8 *prio_tc)
s32	ixgbe_dcb_hw_config_82599 (struct ixgbe_hw *hw, u8 pfc_en, u16 *refill, u16 *max, u8 *bwg_id, u8 *prio_type, u8 *prio_tc)

Macro Definition Documentation

#define IXGBE_RDRXCTL_MCEN

Value:

0x00000040 /* DMA config for multiple cores
                                            * (RSS) enable
                                            */

Definition at line 51 of file ixgbe_dcb_82599.h.

#define IXGBE_RDRXCTL_MPBEN

Value:

0x00000010 /* DMA config for multiple packet
                                            * buffers enable
                                            */

Definition at line 50 of file ixgbe_dcb_82599.h.

#define IXGBE_RTRPCS_ARBDIS   0x00000040 /* Arbitration disable bit */

Definition at line 57 of file ixgbe_dcb_82599.h.

#define IXGBE_RTRPCS_RAC   0x00000004

Definition at line 56 of file ixgbe_dcb_82599.h.

#define IXGBE_RTRPCS_RRM   0x00000002 /* Receive Recycle Mode enable */

Definition at line 54 of file ixgbe_dcb_82599.h.

#define IXGBE_RTRPT4C_BWG_SHIFT   9 /* Offset to BWG index */

Definition at line 46 of file ixgbe_dcb_82599.h.

#define IXGBE_RTRPT4C_GSP   0x40000000 /* GSP enable bit */

Definition at line 47 of file ixgbe_dcb_82599.h.

#define IXGBE_RTRPT4C_LSP   0x80000000 /* LSP enable bit */

Definition at line 48 of file ixgbe_dcb_82599.h.

#define IXGBE_RTRPT4C_MCL_SHIFT   12 /* Offset to Max Credit Limit setting */

Definition at line 45 of file ixgbe_dcb_82599.h.

#define IXGBE_RTRUP2TC_UP_SHIFT   3

Definition at line 41 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTDCS_ARBDIS   0x00000040 /* DCB arbiter disable */

Definition at line 35 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTDCS_BDPM   0x00400000 /* Bypass Data Pipe - must clear! */

Definition at line 36 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTDCS_BPBFSM

Value:

0x00800000 /* Bypass PB Free Space - must
                                             * clear!
                                             */

Definition at line 37 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTDCS_SPEED_CHG   0x80000000 /* Link speed change */

Definition at line 38 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTDCS_TDPAC

Value:

0x00000001 /* 0 Round Robin,
                                            * 1 WSP - Weighted Strict Priority
                                            */

Definition at line 32 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTDCS_TDRM   0x00000010 /* Transmit Recycle Mode */

Definition at line 34 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTDCS_VMPAC

Value:

0x00000002 /* 0 Round Robin,
                                            * 1 WRR - Weighted Round Robin
                                            */

Definition at line 33 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTDT2C_BWG_SHIFT   9

Definition at line 61 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTDT2C_GSP   0x40000000

Definition at line 62 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTDT2C_LSP   0x80000000

Definition at line 63 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTDT2C_MCL_SHIFT   12

Definition at line 60 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTPCS_ARBD_DCB   0x4 /* Arbitration delay in DCB mode */

Definition at line 75 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTPCS_ARBD_SHIFT   22

Definition at line 74 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTPCS_ARBDIS   0x00000040 /* Arbiter disable */

Definition at line 72 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTPCS_TPPAC

Value:

0x00000020 /* 0 Round Robin,
                                            * 1 SP - Strict Priority
                                            */

Definition at line 71 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTPCS_TPRM   0x00000100 /* Transmit Recycle Mode enable */

Definition at line 73 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTPT2C_BWG_SHIFT   9

Definition at line 66 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTPT2C_GSP   0x40000000

Definition at line 67 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTPT2C_LSP   0x80000000

Definition at line 68 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTPT2C_MCL_SHIFT   12

Definition at line 65 of file ixgbe_dcb_82599.h.

#define IXGBE_RTTUP2TC_UP_SHIFT   3

Definition at line 43 of file ixgbe_dcb_82599.h.

#define IXGBE_SECTX_DCB   0x00001F00 /* DCB TX Buffer IFG */

Definition at line 78 of file ixgbe_dcb_82599.h.

Function Documentation

s32 ixgbe_dcb_config_pfc_82599	(	struct ixgbe_hw *	hw,
		u8	pfc_en,
		u8 *	prio_tc
	)

ixgbe_dcb_config_pfc_82599 - Configure priority flow control : pointer to hardware structure : enabled pfc bitmask : priority to tc assignments indexed by priority

Configure Priority Flow Control (PFC) for each traffic class.

Definition at line 212 of file ixgbe_dcb_82599.c.

s32 ixgbe_dcb_config_rx_arbiter_82599	(	struct ixgbe_hw *	hw,
		u16 *	refill,
		u16 *	max,
		u8 *	bwg_id,
		u8 *	prio_type,
		u8 *	prio_tc
	)

ixgbe_dcb_config_rx_arbiter_82599 - Config Rx Data arbiter : pointer to hardware structure : refill credits index by traffic class : max credits index by traffic class : bandwidth grouping indexed by traffic class : priority type indexed by traffic class

Configure Rx Packet Arbiter and credits for each traffic class.

Definition at line 43 of file ixgbe_dcb_82599.c.

s32 ixgbe_dcb_config_tx_data_arbiter_82599	(	struct ixgbe_hw *	hw,
		u16 *	refill,
		u16 *	max,
		u8 *	bwg_id,
		u8 *	prio_type,
		u8 *	prio_tc
	)

ixgbe_dcb_config_tx_data_arbiter_82599 - Config Tx Data arbiter : pointer to hardware structure : refill credits index by traffic class : max credits index by traffic class : bandwidth grouping indexed by traffic class : priority type indexed by traffic class

Configure Tx Packet Arbiter and credits for each traffic class.

Definition at line 153 of file ixgbe_dcb_82599.c.

s32 ixgbe_dcb_config_tx_desc_arbiter_82599	(	struct ixgbe_hw *	hw,
		u16 *	refill,
		u16 *	max,
		u8 *	bwg_id,
		u8 *	prio_type
	)

ixgbe_dcb_config_tx_desc_arbiter_82599 - Config Tx Desc. arbiter : pointer to hardware structure : refill credits index by traffic class : max credits index by traffic class : bandwidth grouping indexed by traffic class : priority type indexed by traffic class

Configure Tx Descriptor Arbiter and credits for each traffic class.

Definition at line 102 of file ixgbe_dcb_82599.c.

s32 ixgbe_dcb_hw_config_82599	(	struct ixgbe_hw *	hw,
		u8	pfc_en,
		u16 *	refill,
		u16 *	max,
		u8 *	bwg_id,
		u8 *	prio_type,
		u8 *	prio_tc
	)

ixgbe_dcb_hw_config_82599 - Configure and enable DCB : pointer to hardware structure : refill credits index by traffic class : max credits index by traffic class : bandwidth grouping indexed by traffic class : priority type indexed by traffic class : enabled pfc bitmask

Configure dcb settings and enable dcb mode.

Definition at line 348 of file ixgbe_dcb_82599.c.