m5441xsim.h File Reference

#include <asm/m54xxacr.h>

Go to the source code of this file.

Macros
#define	CPU_NAME   "COLDFIRE(m5441x)"
#define	CPU_INSTR_PER_JIFFY   2
#define	MCF_BUSCLK   (MCF_CLK / 2)
#define	MCF_RCR   0xec090000
#define	MCF_RSR   0xec090001
#define	MCF_RCR_SWRESET   0x80 /* Software reset bit */
#define	MCF_RCR_FRCSTOUT   0x40 /* Force external reset */
#define	MCFINT_VECBASE   64
#define	MCFINT0_VECBASE   MCFINT_VECBASE
#define	MCFINT1_VECBASE   (MCFINT0_VECBASE + 64)
#define	MCFINT2_VECBASE   (MCFINT1_VECBASE + 64)
#define	MCFINTC0_SIMR   0xfc04801c
#define	MCFINTC0_CIMR   0xfc04801d
#define	MCFINTC0_ICR0   0xfc048040
#define	MCFINTC1_SIMR   0xfc04c01c
#define	MCFINTC1_CIMR   0xfc04c01d
#define	MCFINTC1_ICR0   0xfc04c040
#define	MCFINTC2_SIMR   0xfc05001c
#define	MCFINTC2_CIMR   0xfc05001d
#define	MCFINTC2_ICR0   0xfc050040
#define	MCFINT0_EPORT0   1
#define	MCFINT0_UART0   26
#define	MCFINT0_UART1   27
#define	MCFINT0_UART2   28
#define	MCFINT0_UART3   29
#define	MCFINT0_I2C0   30
#define	MCFINT0_DSPI0   31
#define	MCFINT0_TIMER0   32
#define	MCFINT0_TIMER1   33
#define	MCFINT0_TIMER2   34
#define	MCFINT0_TIMER3   35
#define	MCFINT0_FECRX0   36
#define	MCFINT0_FECTX0   40
#define	MCFINT0_FECENTC0   42
#define	MCFINT0_FECRX1   49
#define	MCFINT0_FECTX1   53
#define	MCFINT0_FECENTC1   55
#define	MCFINT1_UART4   48
#define	MCFINT1_UART5   49
#define	MCFINT1_UART6   50
#define	MCFINT1_UART7   51
#define	MCFINT1_UART8   52
#define	MCFINT1_UART9   53
#define	MCFINT1_DSPI1   54
#define	MCFINT1_DSPI2   55
#define	MCFINT1_DSPI3   56
#define	MCFINT1_I2C1   57
#define	MCFINT1_I2C2   58
#define	MCFINT1_I2C3   59
#define	MCFINT1_I2C4   60
#define	MCFINT1_I2C5   61
#define	MCFINT2_PIT0   13
#define	MCFINT2_PIT1   14
#define	MCFINT2_PIT2   15
#define	MCFINT2_PIT3   16
#define	MCFINT2_RTC   26
#define	MCFPIT_BASE0   0xFC080000 /* Base address of TIMER0 */
#define	MCFPIT_BASE1   0xFC084000 /* Base address of TIMER1 */
#define	MCFPIT_BASE2   0xFC088000 /* Base address of TIMER2 */
#define	MCFPIT_BASE3   0xFC08C000 /* Base address of TIMER3 */
#define	MCF_IRQ_PIT1   (MCFINT2_VECBASE + MCFINT2_PIT1)
#define	MCFPM_WCR   0xfc040013
#define	MCFPM_PPMSR0   0xfc04002c
#define	MCFPM_PPMCR0   0xfc04002d
#define	MCFPM_PPMSR1   0xfc04002e
#define	MCFPM_PPMCR1   0xfc04002f
#define	MCFPM_PPMHR0   0xfc040030
#define	MCFPM_PPMLR0   0xfc040034
#define	MCFPM_PPMHR1   0xfc040038
#define	MCFPM_PPMLR1   0xfc04003c
#define	MCFPM_LPCR   0xec090007
#define	MCFUART_BASE0   0xfc060000 /* Base address of UART0 */
#define	MCFUART_BASE1   0xfc064000 /* Base address of UART1 */
#define	MCFUART_BASE2   0xfc068000 /* Base address of UART2 */
#define	MCFUART_BASE3   0xfc06c000 /* Base address of UART3 */
#define	MCFUART_BASE4   0xec060000 /* Base address of UART4 */
#define	MCFUART_BASE5   0xec064000 /* Base address of UART5 */
#define	MCFUART_BASE6   0xec068000 /* Base address of UART6 */
#define	MCFUART_BASE7   0xec06c000 /* Base address of UART7 */
#define	MCFUART_BASE8   0xec070000 /* Base address of UART8 */
#define	MCFUART_BASE9   0xec074000 /* Base address of UART9 */
#define	MCF_IRQ_UART0   (MCFINT0_VECBASE + MCFINT0_UART0)
#define	MCF_IRQ_UART1   (MCFINT0_VECBASE + MCFINT0_UART1)
#define	MCF_IRQ_UART2   (MCFINT0_VECBASE + MCFINT0_UART2)
#define	MCF_IRQ_UART3   (MCFINT0_VECBASE + MCFINT0_UART3)
#define	MCF_IRQ_UART4   (MCFINT1_VECBASE + MCFINT1_UART4)
#define	MCF_IRQ_UART5   (MCFINT1_VECBASE + MCFINT1_UART5)
#define	MCF_IRQ_UART6   (MCFINT1_VECBASE + MCFINT1_UART6)
#define	MCF_IRQ_UART7   (MCFINT1_VECBASE + MCFINT1_UART7)
#define	MCF_IRQ_UART8   (MCFINT1_VECBASE + MCFINT1_UART8)
#define	MCF_IRQ_UART9   (MCFINT1_VECBASE + MCFINT1_UART9)
#define	MCFFEC_BASE0   0xfc0d4000
#define	MCFFEC_SIZE0   0x800
#define	MCF_IRQ_FECRX0   (MCFINT0_VECBASE + MCFINT0_FECRX0)
#define	MCF_IRQ_FECTX0   (MCFINT0_VECBASE + MCFINT0_FECTX0)
#define	MCF_IRQ_FECENTC0   (MCFINT0_VECBASE + MCFINT0_FECENTC0)
#define	MCFFEC_BASE1   0xfc0d8000
#define	MCFFEC_SIZE1   0x800
#define	MCF_IRQ_FECRX1   (MCFINT0_VECBASE + MCFINT0_FECRX1)
#define	MCF_IRQ_FECTX1   (MCFINT0_VECBASE + MCFINT0_FECTX1)
#define	MCF_IRQ_FECENTC1   (MCFINT0_VECBASE + MCFINT0_FECENTC1)
#define	MCFI2C_BASE0   0xfc058000
#define	MCFI2C_SIZE0   0x20
#define	MCFI2C_BASE1   0xfc038000
#define	MCFI2C_SIZE1   0x20
#define	MCFI2C_BASE2   0xec010000
#define	MCFI2C_SIZE2   0x20
#define	MCFI2C_BASE3   0xec014000
#define	MCFI2C_SIZE3   0x20
#define	MCFI2C_BASE4   0xec018000
#define	MCFI2C_SIZE4   0x20
#define	MCFI2C_BASE5   0xec01c000
#define	MCFI2C_SIZE5   0x20
#define	MCF_IRQ_I2C0   (MCFINT0_VECBASE + MCFINT0_I2C0)
#define	MCF_IRQ_I2C1   (MCFINT1_VECBASE + MCFINT1_I2C1)
#define	MCF_IRQ_I2C2   (MCFINT1_VECBASE + MCFINT1_I2C2)
#define	MCF_IRQ_I2C3   (MCFINT1_VECBASE + MCFINT1_I2C3)
#define	MCF_IRQ_I2C4   (MCFINT1_VECBASE + MCFINT1_I2C4)
#define	MCF_IRQ_I2C5   (MCFINT1_VECBASE + MCFINT1_I2C5)
#define	MCFEPORT_EPPAR   0xfc090000
#define	MCFEPORT_EPIER   0xfc090003
#define	MCFEPORT_EPFR   0xfc090006
#define	MCFRTC_BASE   0xfc0a8000
#define	MCFRTC_SIZE   (0xfc0a8840 - 0xfc0a8000)
#define	MCF_IRQ_RTC   (MCFINT2_VECBASE + MCFINT2_RTC)
#define	MCFGPIO_PODR_A   0xec094000
#define	MCFGPIO_PODR_B   0xec094001
#define	MCFGPIO_PODR_C   0xec094002
#define	MCFGPIO_PODR_D   0xec094003
#define	MCFGPIO_PODR_E   0xec094004
#define	MCFGPIO_PODR_F   0xec094005
#define	MCFGPIO_PODR_G   0xec094006
#define	MCFGPIO_PODR_H   0xec094007
#define	MCFGPIO_PODR_I   0xec094008
#define	MCFGPIO_PODR_J   0xec094009
#define	MCFGPIO_PODR_K   0xec09400a
#define	MCFGPIO_PDDR_A   0xec09400c
#define	MCFGPIO_PDDR_B   0xec09400d
#define	MCFGPIO_PDDR_C   0xec09400e
#define	MCFGPIO_PDDR_D   0xec09400f
#define	MCFGPIO_PDDR_E   0xec094010
#define	MCFGPIO_PDDR_F   0xec094011
#define	MCFGPIO_PDDR_G   0xec094012
#define	MCFGPIO_PDDR_H   0xec094013
#define	MCFGPIO_PDDR_I   0xec094014
#define	MCFGPIO_PDDR_J   0xec094015
#define	MCFGPIO_PDDR_K   0xec094016
#define	MCFGPIO_PPDSDR_A   0xec094018
#define	MCFGPIO_PPDSDR_B   0xec094019
#define	MCFGPIO_PPDSDR_C   0xec09401a
#define	MCFGPIO_PPDSDR_D   0xec09401b
#define	MCFGPIO_PPDSDR_E   0xec09401c
#define	MCFGPIO_PPDSDR_F   0xec09401d
#define	MCFGPIO_PPDSDR_G   0xec09401e
#define	MCFGPIO_PPDSDR_H   0xec09401f
#define	MCFGPIO_PPDSDR_I   0xec094020
#define	MCFGPIO_PPDSDR_J   0xec094021
#define	MCFGPIO_PPDSDR_K   0xec094022
#define	MCFGPIO_PCLRR_A   0xec094024
#define	MCFGPIO_PCLRR_B   0xec094025
#define	MCFGPIO_PCLRR_C   0xec094026
#define	MCFGPIO_PCLRR_D   0xec094027
#define	MCFGPIO_PCLRR_E   0xec094028
#define	MCFGPIO_PCLRR_F   0xec094029
#define	MCFGPIO_PCLRR_G   0xec09402a
#define	MCFGPIO_PCLRR_H   0xec09402b
#define	MCFGPIO_PCLRR_I   0xec09402c
#define	MCFGPIO_PCLRR_J   0xec09402d
#define	MCFGPIO_PCLRR_K   0xec09402e
#define	MCFGPIO_PAR_FBCTL   0xec094048
#define	MCFGPIO_PAR_BE   0xec094049
#define	MCFGPIO_PAR_CS   0xec09404a
#define	MCFGPIO_PAR_CANI2C   0xec09404b
#define	MCFGPIO_PAR_IRQ0H   0xec09404c
#define	MCFGPIO_PAR_IRQ0L   0xec09404d
#define	MCFGPIO_PAR_DSPIOWH   0xec09404e
#define	MCFGPIO_PAR_DSPIOWL   0xec09404f
#define	MCFGPIO_PAR_TIMER   0xec094050
#define	MCFGPIO_PAR_UART2   0xec094051
#define	MCFGPIO_PAR_UART1   0xec094052
#define	MCFGPIO_PAR_UART0   0xec094053
#define	MCFGPIO_PAR_SDHCH   0xec094054
#define	MCFGPIO_PAR_SDHCL   0xec094055
#define	MCFGPIO_PAR_SIMP0H   0xec094056
#define	MCFGPIO_PAR_SIMP0L   0xec094057
#define	MCFGPIO_PAR_SSI0H   0xec094058
#define	MCFGPIO_PAR_SSI0L   0xec094059
#define	MCFGPIO_PAR_DEBUGH1   0xec09405a
#define	MCFGPIO_PAR_DEBUGH0   0xec09405b
#define	MCFGPIO_PAR_DEBUGl   0xec09405c
#define	MCFGPIO_PAR_FEC   0xec09405e
#define	MCFGPIO_PODR   MCFGPIO_PODR_A
#define	MCFGPIO_PDDR   MCFGPIO_PDDR_A
#define	MCFGPIO_PPDR   MCFGPIO_PPDSDR_A
#define	MCFGPIO_SETR   MCFGPIO_PPDSDR_A
#define	MCFGPIO_CLRR   MCFGPIO_PCLRR_A
#define	MCFGPIO_IRQ_MIN   17
#define	MCFGPIO_IRQ_MAX   24
#define	MCFGPIO_IRQ_VECBASE   (MCFINT_VECBASE - MCFGPIO_IRQ_MIN)
#define	MCFGPIO_PIN_MAX   87

Macro Definition Documentation

#define CPU_INSTR_PER_JIFFY   2

Definition at line 11 of file m5441xsim.h.

#define CPU_NAME   "COLDFIRE(m5441x)"

Definition at line 10 of file m5441xsim.h.

#define MCF_BUSCLK   (MCF_CLK / 2)

Definition at line 12 of file m5441xsim.h.

#define MCF_IRQ_FECENTC0   (MCFINT0_VECBASE + MCFINT0_FECENTC0)

Definition at line 148 of file m5441xsim.h.

#define MCF_IRQ_FECENTC1   (MCFINT0_VECBASE + MCFINT0_FECENTC1)

Definition at line 154 of file m5441xsim.h.

#define MCF_IRQ_FECRX0   (MCFINT0_VECBASE + MCFINT0_FECRX0)

Definition at line 146 of file m5441xsim.h.

#define MCF_IRQ_FECRX1   (MCFINT0_VECBASE + MCFINT0_FECRX1)

Definition at line 152 of file m5441xsim.h.

#define MCF_IRQ_FECTX0   (MCFINT0_VECBASE + MCFINT0_FECTX0)

Definition at line 147 of file m5441xsim.h.

#define MCF_IRQ_FECTX1   (MCFINT0_VECBASE + MCFINT0_FECTX1)

Definition at line 153 of file m5441xsim.h.

#define MCF_IRQ_I2C0   (MCFINT0_VECBASE + MCFINT0_I2C0)

Definition at line 171 of file m5441xsim.h.

#define MCF_IRQ_I2C1   (MCFINT1_VECBASE + MCFINT1_I2C1)

Definition at line 172 of file m5441xsim.h.

#define MCF_IRQ_I2C2   (MCFINT1_VECBASE + MCFINT1_I2C2)

Definition at line 173 of file m5441xsim.h.

#define MCF_IRQ_I2C3   (MCFINT1_VECBASE + MCFINT1_I2C3)

Definition at line 174 of file m5441xsim.h.

#define MCF_IRQ_I2C4   (MCFINT1_VECBASE + MCFINT1_I2C4)

Definition at line 175 of file m5441xsim.h.

#define MCF_IRQ_I2C5   (MCFINT1_VECBASE + MCFINT1_I2C5)

Definition at line 176 of file m5441xsim.h.

#define MCF_IRQ_PIT1   (MCFINT2_VECBASE + MCFINT2_PIT1)

Definition at line 102 of file m5441xsim.h.

#define MCF_IRQ_RTC   (MCFINT2_VECBASE + MCFINT2_RTC)

Definition at line 188 of file m5441xsim.h.

#define MCF_IRQ_UART0   (MCFINT0_VECBASE + MCFINT0_UART0)

Definition at line 131 of file m5441xsim.h.

#define MCF_IRQ_UART1   (MCFINT0_VECBASE + MCFINT0_UART1)

Definition at line 132 of file m5441xsim.h.

#define MCF_IRQ_UART2   (MCFINT0_VECBASE + MCFINT0_UART2)

Definition at line 133 of file m5441xsim.h.

#define MCF_IRQ_UART3   (MCFINT0_VECBASE + MCFINT0_UART3)

Definition at line 134 of file m5441xsim.h.

#define MCF_IRQ_UART4   (MCFINT1_VECBASE + MCFINT1_UART4)

Definition at line 135 of file m5441xsim.h.

#define MCF_IRQ_UART5   (MCFINT1_VECBASE + MCFINT1_UART5)

Definition at line 136 of file m5441xsim.h.

#define MCF_IRQ_UART6   (MCFINT1_VECBASE + MCFINT1_UART6)

Definition at line 137 of file m5441xsim.h.

#define MCF_IRQ_UART7   (MCFINT1_VECBASE + MCFINT1_UART7)

Definition at line 138 of file m5441xsim.h.

#define MCF_IRQ_UART8   (MCFINT1_VECBASE + MCFINT1_UART8)

Definition at line 139 of file m5441xsim.h.

#define MCF_IRQ_UART9   (MCFINT1_VECBASE + MCFINT1_UART9)

Definition at line 140 of file m5441xsim.h.

#define MCF_RCR   0xec090000

Definition at line 20 of file m5441xsim.h.

#define MCF_RCR_FRCSTOUT   0x40 /* Force external reset */

Definition at line 24 of file m5441xsim.h.

#define MCF_RCR_SWRESET   0x80 /* Software reset bit */

Definition at line 23 of file m5441xsim.h.

#define MCF_RSR   0xec090001

Definition at line 21 of file m5441xsim.h.

#define MCFEPORT_EPFR   0xfc090006

Definition at line 182 of file m5441xsim.h.

#define MCFEPORT_EPIER   0xfc090003

Definition at line 181 of file m5441xsim.h.

#define MCFEPORT_EPPAR   0xfc090000

Definition at line 180 of file m5441xsim.h.

#define MCFFEC_BASE0   0xfc0d4000

Definition at line 144 of file m5441xsim.h.

#define MCFFEC_BASE1   0xfc0d8000

Definition at line 150 of file m5441xsim.h.

#define MCFFEC_SIZE0   0x800

Definition at line 145 of file m5441xsim.h.

#define MCFFEC_SIZE1   0x800

Definition at line 151 of file m5441xsim.h.

#define MCFGPIO_CLRR   MCFGPIO_PCLRR_A

Definition at line 269 of file m5441xsim.h.

#define MCFGPIO_IRQ_MAX   24

Definition at line 272 of file m5441xsim.h.

#define MCFGPIO_IRQ_MIN   17

Definition at line 271 of file m5441xsim.h.

#define MCFGPIO_IRQ_VECBASE   (MCFINT_VECBASE - MCFGPIO_IRQ_MIN)

Definition at line 273 of file m5441xsim.h.

#define MCFGPIO_PAR_BE   0xec094049

Definition at line 242 of file m5441xsim.h.

#define MCFGPIO_PAR_CANI2C   0xec09404b

Definition at line 244 of file m5441xsim.h.

#define MCFGPIO_PAR_CS   0xec09404a

Definition at line 243 of file m5441xsim.h.

#define MCFGPIO_PAR_DEBUGH0   0xec09405b

Definition at line 260 of file m5441xsim.h.

#define MCFGPIO_PAR_DEBUGH1   0xec09405a

Definition at line 259 of file m5441xsim.h.

#define MCFGPIO_PAR_DEBUGl   0xec09405c

Definition at line 261 of file m5441xsim.h.

#define MCFGPIO_PAR_DSPIOWH   0xec09404e

Definition at line 247 of file m5441xsim.h.

#define MCFGPIO_PAR_DSPIOWL   0xec09404f

Definition at line 248 of file m5441xsim.h.

#define MCFGPIO_PAR_FBCTL   0xec094048

Definition at line 241 of file m5441xsim.h.

#define MCFGPIO_PAR_FEC   0xec09405e

Definition at line 262 of file m5441xsim.h.

#define MCFGPIO_PAR_IRQ0H   0xec09404c

Definition at line 245 of file m5441xsim.h.

#define MCFGPIO_PAR_IRQ0L   0xec09404d

Definition at line 246 of file m5441xsim.h.

#define MCFGPIO_PAR_SDHCH   0xec094054

Definition at line 253 of file m5441xsim.h.

#define MCFGPIO_PAR_SDHCL   0xec094055

Definition at line 254 of file m5441xsim.h.

#define MCFGPIO_PAR_SIMP0H   0xec094056

Definition at line 255 of file m5441xsim.h.

#define MCFGPIO_PAR_SIMP0L   0xec094057

Definition at line 256 of file m5441xsim.h.

#define MCFGPIO_PAR_SSI0H   0xec094058

Definition at line 257 of file m5441xsim.h.

#define MCFGPIO_PAR_SSI0L   0xec094059

Definition at line 258 of file m5441xsim.h.

#define MCFGPIO_PAR_TIMER   0xec094050

Definition at line 249 of file m5441xsim.h.

#define MCFGPIO_PAR_UART0   0xec094053

Definition at line 252 of file m5441xsim.h.

#define MCFGPIO_PAR_UART1   0xec094052

Definition at line 251 of file m5441xsim.h.

#define MCFGPIO_PAR_UART2   0xec094051

Definition at line 250 of file m5441xsim.h.

#define MCFGPIO_PCLRR_A   0xec094024

Definition at line 229 of file m5441xsim.h.

#define MCFGPIO_PCLRR_B   0xec094025

Definition at line 230 of file m5441xsim.h.

#define MCFGPIO_PCLRR_C   0xec094026

Definition at line 231 of file m5441xsim.h.

#define MCFGPIO_PCLRR_D   0xec094027

Definition at line 232 of file m5441xsim.h.

#define MCFGPIO_PCLRR_E   0xec094028

Definition at line 233 of file m5441xsim.h.

#define MCFGPIO_PCLRR_F   0xec094029

Definition at line 234 of file m5441xsim.h.

#define MCFGPIO_PCLRR_G   0xec09402a

Definition at line 235 of file m5441xsim.h.

#define MCFGPIO_PCLRR_H   0xec09402b

Definition at line 236 of file m5441xsim.h.

#define MCFGPIO_PCLRR_I   0xec09402c

Definition at line 237 of file m5441xsim.h.

#define MCFGPIO_PCLRR_J   0xec09402d

Definition at line 238 of file m5441xsim.h.

#define MCFGPIO_PCLRR_K   0xec09402e

Definition at line 239 of file m5441xsim.h.

#define MCFGPIO_PDDR   MCFGPIO_PDDR_A

Definition at line 266 of file m5441xsim.h.

#define MCFGPIO_PDDR_A   0xec09400c

Definition at line 205 of file m5441xsim.h.

#define MCFGPIO_PDDR_B   0xec09400d

Definition at line 206 of file m5441xsim.h.

#define MCFGPIO_PDDR_C   0xec09400e

Definition at line 207 of file m5441xsim.h.

#define MCFGPIO_PDDR_D   0xec09400f

Definition at line 208 of file m5441xsim.h.

#define MCFGPIO_PDDR_E   0xec094010

Definition at line 209 of file m5441xsim.h.

#define MCFGPIO_PDDR_F   0xec094011

Definition at line 210 of file m5441xsim.h.

#define MCFGPIO_PDDR_G   0xec094012

Definition at line 211 of file m5441xsim.h.

#define MCFGPIO_PDDR_H   0xec094013

Definition at line 212 of file m5441xsim.h.

#define MCFGPIO_PDDR_I   0xec094014

Definition at line 213 of file m5441xsim.h.

#define MCFGPIO_PDDR_J   0xec094015

Definition at line 214 of file m5441xsim.h.

#define MCFGPIO_PDDR_K   0xec094016

Definition at line 215 of file m5441xsim.h.

#define MCFGPIO_PIN_MAX   87

Definition at line 274 of file m5441xsim.h.

#define MCFGPIO_PODR   MCFGPIO_PODR_A

Definition at line 265 of file m5441xsim.h.

#define MCFGPIO_PODR_A   0xec094000

Definition at line 193 of file m5441xsim.h.

#define MCFGPIO_PODR_B   0xec094001

Definition at line 194 of file m5441xsim.h.

#define MCFGPIO_PODR_C   0xec094002

Definition at line 195 of file m5441xsim.h.

#define MCFGPIO_PODR_D   0xec094003

Definition at line 196 of file m5441xsim.h.

#define MCFGPIO_PODR_E   0xec094004

Definition at line 197 of file m5441xsim.h.

#define MCFGPIO_PODR_F   0xec094005

Definition at line 198 of file m5441xsim.h.

#define MCFGPIO_PODR_G   0xec094006

Definition at line 199 of file m5441xsim.h.

#define MCFGPIO_PODR_H   0xec094007

Definition at line 200 of file m5441xsim.h.

#define MCFGPIO_PODR_I   0xec094008

Definition at line 201 of file m5441xsim.h.

#define MCFGPIO_PODR_J   0xec094009

Definition at line 202 of file m5441xsim.h.

#define MCFGPIO_PODR_K   0xec09400a

Definition at line 203 of file m5441xsim.h.

#define MCFGPIO_PPDR   MCFGPIO_PPDSDR_A

Definition at line 267 of file m5441xsim.h.

#define MCFGPIO_PPDSDR_A   0xec094018

Definition at line 217 of file m5441xsim.h.

#define MCFGPIO_PPDSDR_B   0xec094019

Definition at line 218 of file m5441xsim.h.

#define MCFGPIO_PPDSDR_C   0xec09401a

Definition at line 219 of file m5441xsim.h.

#define MCFGPIO_PPDSDR_D   0xec09401b

Definition at line 220 of file m5441xsim.h.

#define MCFGPIO_PPDSDR_E   0xec09401c

Definition at line 221 of file m5441xsim.h.

#define MCFGPIO_PPDSDR_F   0xec09401d

Definition at line 222 of file m5441xsim.h.

#define MCFGPIO_PPDSDR_G   0xec09401e

Definition at line 223 of file m5441xsim.h.

#define MCFGPIO_PPDSDR_H   0xec09401f

Definition at line 224 of file m5441xsim.h.

#define MCFGPIO_PPDSDR_I   0xec094020

Definition at line 225 of file m5441xsim.h.

#define MCFGPIO_PPDSDR_J   0xec094021

Definition at line 226 of file m5441xsim.h.

#define MCFGPIO_PPDSDR_K   0xec094022

Definition at line 227 of file m5441xsim.h.

#define MCFGPIO_SETR   MCFGPIO_PPDSDR_A

Definition at line 268 of file m5441xsim.h.

#define MCFI2C_BASE0   0xfc058000

Definition at line 158 of file m5441xsim.h.

#define MCFI2C_BASE1   0xfc038000

Definition at line 160 of file m5441xsim.h.

#define MCFI2C_BASE2   0xec010000

Definition at line 162 of file m5441xsim.h.

#define MCFI2C_BASE3   0xec014000

Definition at line 164 of file m5441xsim.h.

#define MCFI2C_BASE4   0xec018000

Definition at line 166 of file m5441xsim.h.

#define MCFI2C_BASE5   0xec01c000

Definition at line 168 of file m5441xsim.h.

#define MCFI2C_SIZE0   0x20

Definition at line 159 of file m5441xsim.h.

#define MCFI2C_SIZE1   0x20

Definition at line 161 of file m5441xsim.h.

#define MCFI2C_SIZE2   0x20

Definition at line 163 of file m5441xsim.h.

#define MCFI2C_SIZE3   0x20

Definition at line 165 of file m5441xsim.h.

#define MCFI2C_SIZE4   0x20

Definition at line 167 of file m5441xsim.h.

#define MCFI2C_SIZE5   0x20

Definition at line 169 of file m5441xsim.h.

#define MCFINT0_DSPI0   31

Definition at line 55 of file m5441xsim.h.

#define MCFINT0_EPORT0   1

Definition at line 49 of file m5441xsim.h.

#define MCFINT0_FECENTC0   42

Definition at line 64 of file m5441xsim.h.

#define MCFINT0_FECENTC1   55

Definition at line 68 of file m5441xsim.h.

#define MCFINT0_FECRX0   36

Definition at line 62 of file m5441xsim.h.

#define MCFINT0_FECRX1   49

Definition at line 66 of file m5441xsim.h.

#define MCFINT0_FECTX0   40

Definition at line 63 of file m5441xsim.h.

#define MCFINT0_FECTX1   53

Definition at line 67 of file m5441xsim.h.

#define MCFINT0_I2C0   30

Definition at line 54 of file m5441xsim.h.

#define MCFINT0_TIMER0   32

Definition at line 57 of file m5441xsim.h.

#define MCFINT0_TIMER1   33

Definition at line 58 of file m5441xsim.h.

#define MCFINT0_TIMER2   34

Definition at line 59 of file m5441xsim.h.

#define MCFINT0_TIMER3   35

Definition at line 60 of file m5441xsim.h.

#define MCFINT0_UART0   26

Definition at line 50 of file m5441xsim.h.

#define MCFINT0_UART1   27

Definition at line 51 of file m5441xsim.h.

#define MCFINT0_UART2   28

Definition at line 52 of file m5441xsim.h.

#define MCFINT0_UART3   29

Definition at line 53 of file m5441xsim.h.

#define MCFINT0_VECBASE   MCFINT_VECBASE

Definition at line 31 of file m5441xsim.h.

#define MCFINT1_DSPI1   54

Definition at line 77 of file m5441xsim.h.

#define MCFINT1_DSPI2   55

Definition at line 78 of file m5441xsim.h.

#define MCFINT1_DSPI3   56

Definition at line 79 of file m5441xsim.h.

#define MCFINT1_I2C1   57

Definition at line 80 of file m5441xsim.h.

#define MCFINT1_I2C2   58

Definition at line 81 of file m5441xsim.h.

#define MCFINT1_I2C3   59

Definition at line 82 of file m5441xsim.h.

#define MCFINT1_I2C4   60

Definition at line 83 of file m5441xsim.h.

#define MCFINT1_I2C5   61

Definition at line 84 of file m5441xsim.h.

#define MCFINT1_UART4   48

Definition at line 71 of file m5441xsim.h.

#define MCFINT1_UART5   49

Definition at line 72 of file m5441xsim.h.

#define MCFINT1_UART6   50

Definition at line 73 of file m5441xsim.h.

#define MCFINT1_UART7   51

Definition at line 74 of file m5441xsim.h.

#define MCFINT1_UART8   52

Definition at line 75 of file m5441xsim.h.

#define MCFINT1_UART9   53

Definition at line 76 of file m5441xsim.h.

#define MCFINT1_VECBASE   (MCFINT0_VECBASE + 64)

Definition at line 32 of file m5441xsim.h.

#define MCFINT2_PIT0   13

Definition at line 87 of file m5441xsim.h.

#define MCFINT2_PIT1   14

Definition at line 88 of file m5441xsim.h.

#define MCFINT2_PIT2   15

Definition at line 89 of file m5441xsim.h.

#define MCFINT2_PIT3   16

Definition at line 90 of file m5441xsim.h.

#define MCFINT2_RTC   26

Definition at line 91 of file m5441xsim.h.

#define MCFINT2_VECBASE   (MCFINT1_VECBASE + 64)

Definition at line 33 of file m5441xsim.h.

#define MCFINT_VECBASE   64

Definition at line 30 of file m5441xsim.h.

#define MCFINTC0_CIMR   0xfc04801d

Definition at line 37 of file m5441xsim.h.

#define MCFINTC0_ICR0   0xfc048040

Definition at line 38 of file m5441xsim.h.

#define MCFINTC0_SIMR   0xfc04801c

Definition at line 36 of file m5441xsim.h.

#define MCFINTC1_CIMR   0xfc04c01d

Definition at line 41 of file m5441xsim.h.

#define MCFINTC1_ICR0   0xfc04c040

Definition at line 42 of file m5441xsim.h.

#define MCFINTC1_SIMR   0xfc04c01c

Definition at line 40 of file m5441xsim.h.

#define MCFINTC2_CIMR   0xfc05001d

Definition at line 45 of file m5441xsim.h.

#define MCFINTC2_ICR0   0xfc050040

Definition at line 46 of file m5441xsim.h.

#define MCFINTC2_SIMR   0xfc05001c

Definition at line 44 of file m5441xsim.h.

#define MCFPIT_BASE0   0xFC080000 /* Base address of TIMER0 */

Definition at line 96 of file m5441xsim.h.

#define MCFPIT_BASE1   0xFC084000 /* Base address of TIMER1 */

Definition at line 97 of file m5441xsim.h.

#define MCFPIT_BASE2   0xFC088000 /* Base address of TIMER2 */

Definition at line 98 of file m5441xsim.h.

#define MCFPIT_BASE3   0xFC08C000 /* Base address of TIMER3 */

Definition at line 99 of file m5441xsim.h.

#define MCFPM_LPCR   0xec090007

Definition at line 116 of file m5441xsim.h.

#define MCFPM_PPMCR0   0xfc04002d

Definition at line 109 of file m5441xsim.h.

#define MCFPM_PPMCR1   0xfc04002f

Definition at line 111 of file m5441xsim.h.

#define MCFPM_PPMHR0   0xfc040030

Definition at line 112 of file m5441xsim.h.

#define MCFPM_PPMHR1   0xfc040038

Definition at line 114 of file m5441xsim.h.

#define MCFPM_PPMLR0   0xfc040034

Definition at line 113 of file m5441xsim.h.

#define MCFPM_PPMLR1   0xfc04003c

Definition at line 115 of file m5441xsim.h.

#define MCFPM_PPMSR0   0xfc04002c

Definition at line 108 of file m5441xsim.h.

#define MCFPM_PPMSR1   0xfc04002e

Definition at line 110 of file m5441xsim.h.

#define MCFPM_WCR   0xfc040013

Definition at line 107 of file m5441xsim.h.

#define MCFRTC_BASE   0xfc0a8000

Definition at line 186 of file m5441xsim.h.

#define MCFRTC_SIZE   (0xfc0a8840 - 0xfc0a8000)

Definition at line 187 of file m5441xsim.h.

#define MCFUART_BASE0   0xfc060000 /* Base address of UART0 */

Definition at line 120 of file m5441xsim.h.

#define MCFUART_BASE1   0xfc064000 /* Base address of UART1 */

Definition at line 121 of file m5441xsim.h.

#define MCFUART_BASE2   0xfc068000 /* Base address of UART2 */

Definition at line 122 of file m5441xsim.h.

#define MCFUART_BASE3   0xfc06c000 /* Base address of UART3 */

Definition at line 123 of file m5441xsim.h.

#define MCFUART_BASE4   0xec060000 /* Base address of UART4 */

Definition at line 124 of file m5441xsim.h.

#define MCFUART_BASE5   0xec064000 /* Base address of UART5 */

Definition at line 125 of file m5441xsim.h.

#define MCFUART_BASE6   0xec068000 /* Base address of UART6 */

Definition at line 126 of file m5441xsim.h.

#define MCFUART_BASE7   0xec06c000 /* Base address of UART7 */

Definition at line 127 of file m5441xsim.h.

#define MCFUART_BASE8   0xec070000 /* Base address of UART8 */

Definition at line 128 of file m5441xsim.h.

#define MCFUART_BASE9   0xec074000 /* Base address of UART9 */

Definition at line 129 of file m5441xsim.h.