Go to the documentation of this file. 1 #ifndef __pinmux_defs_h
2 #define __pinmux_defs_h
15 #define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
41 #define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46 #define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
50 #ifndef REG_RD_INT_VECT
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
63 #define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68 #define reg_page_size 8192
72 #define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
87 unsigned int eth_mdio : 1;
88 unsigned int geth : 1;
90 unsigned int tg_clk : 1;
91 unsigned int vout : 1;
92 unsigned int vout_sync : 1;
93 unsigned int ser1 : 1;
94 unsigned int ser2 : 1;
95 unsigned int ser3 : 1;
96 unsigned int ser4 : 1;
97 unsigned int sser : 1;
98 unsigned int pwm0 : 1;
101 unsigned int timer0 : 1;
102 unsigned int timer1 : 1;
104 unsigned int i2c0 : 1;
106 unsigned int i2c1_sda1 : 1;
107 unsigned int i2c1_sda2 : 1;
108 unsigned int i2c1_sda3 : 1;
109 unsigned int i2c1_sen : 1;
110 unsigned int dummy1 : 8;
112 #define REG_RD_ADDR_pinmux_rw_hwprot 0
113 #define REG_WR_ADDR_pinmux_rw_hwprot 0
117 unsigned int pa0 : 1;
118 unsigned int pa1 : 1;
119 unsigned int pa2 : 1;
120 unsigned int pa3 : 1;
121 unsigned int pa4 : 1;
122 unsigned int pa5 : 1;
123 unsigned int pa6 : 1;
124 unsigned int pa7 : 1;
125 unsigned int pa8 : 1;
126 unsigned int pa9 : 1;
127 unsigned int pa10 : 1;
128 unsigned int pa11 : 1;
129 unsigned int pa12 : 1;
130 unsigned int pa13 : 1;
131 unsigned int pa14 : 1;
132 unsigned int pa15 : 1;
133 unsigned int pa16 : 1;
134 unsigned int pa17 : 1;
135 unsigned int pa18 : 1;
136 unsigned int pa19 : 1;
137 unsigned int pa20 : 1;
138 unsigned int pa21 : 1;
139 unsigned int pa22 : 1;
140 unsigned int pa23 : 1;
141 unsigned int pa24 : 1;
142 unsigned int pa25 : 1;
143 unsigned int pa26 : 1;
144 unsigned int pa27 : 1;
145 unsigned int pa28 : 1;
146 unsigned int pa29 : 1;
147 unsigned int pa30 : 1;
148 unsigned int pa31 : 1;
150 #define REG_RD_ADDR_pinmux_rw_gio_pa 4
151 #define REG_WR_ADDR_pinmux_rw_gio_pa 4
155 unsigned int pb0 : 1;
156 unsigned int pb1 : 1;
157 unsigned int pb2 : 1;
158 unsigned int pb3 : 1;
159 unsigned int pb4 : 1;
160 unsigned int pb5 : 1;
161 unsigned int pb6 : 1;
162 unsigned int pb7 : 1;
163 unsigned int pb8 : 1;
164 unsigned int pb9 : 1;
165 unsigned int pb10 : 1;
166 unsigned int pb11 : 1;
167 unsigned int pb12 : 1;
168 unsigned int pb13 : 1;
169 unsigned int pb14 : 1;
170 unsigned int pb15 : 1;
171 unsigned int pb16 : 1;
172 unsigned int pb17 : 1;
173 unsigned int pb18 : 1;
174 unsigned int pb19 : 1;
175 unsigned int pb20 : 1;
176 unsigned int pb21 : 1;
177 unsigned int pb22 : 1;
178 unsigned int pb23 : 1;
179 unsigned int pb24 : 1;
180 unsigned int pb25 : 1;
181 unsigned int pb26 : 1;
182 unsigned int pb27 : 1;
183 unsigned int pb28 : 1;
184 unsigned int pb29 : 1;
185 unsigned int pb30 : 1;
186 unsigned int pb31 : 1;
188 #define REG_RD_ADDR_pinmux_rw_gio_pb 8
189 #define REG_WR_ADDR_pinmux_rw_gio_pb 8
195 unsigned int pc2 : 1;
196 unsigned int pc3 : 1;
197 unsigned int pc4 : 1;
198 unsigned int pc5 : 1;
199 unsigned int pc6 : 1;
200 unsigned int pc7 : 1;
201 unsigned int pc8 : 1;
202 unsigned int pc9 : 1;
203 unsigned int pc10 : 1;
204 unsigned int pc11 : 1;
205 unsigned int pc12 : 1;
206 unsigned int pc13 : 1;
207 unsigned int pc14 : 1;
208 unsigned int pc15 : 1;
209 unsigned int dummy1 : 16;
211 #define REG_RD_ADDR_pinmux_rw_gio_pc 12
212 #define REG_WR_ADDR_pinmux_rw_gio_pc 12
216 unsigned int pa0 : 1;
217 unsigned int pa1 : 1;
218 unsigned int pa2 : 1;
219 unsigned int pa3 : 1;
220 unsigned int pa4 : 1;
221 unsigned int pa5 : 1;
222 unsigned int pa6 : 1;
223 unsigned int pa7 : 1;
224 unsigned int pa8 : 1;
225 unsigned int pa9 : 1;
226 unsigned int pa10 : 1;
227 unsigned int pa11 : 1;
228 unsigned int pa12 : 1;
229 unsigned int pa13 : 1;
230 unsigned int pa14 : 1;
231 unsigned int pa15 : 1;
232 unsigned int pa16 : 1;
233 unsigned int pa17 : 1;
234 unsigned int pa18 : 1;
235 unsigned int pa19 : 1;
236 unsigned int pa20 : 1;
237 unsigned int pa21 : 1;
238 unsigned int pa22 : 1;
239 unsigned int pa23 : 1;
240 unsigned int pa24 : 1;
241 unsigned int pa25 : 1;
242 unsigned int pa26 : 1;
243 unsigned int pa27 : 1;
244 unsigned int pa28 : 1;
245 unsigned int pa29 : 1;
246 unsigned int pa30 : 1;
247 unsigned int pa31 : 1;
249 #define REG_RD_ADDR_pinmux_rw_iop_pa 16
250 #define REG_WR_ADDR_pinmux_rw_iop_pa 16
254 unsigned int pb0 : 1;
255 unsigned int pb1 : 1;
256 unsigned int pb2 : 1;
257 unsigned int pb3 : 1;
258 unsigned int pb4 : 1;
259 unsigned int pb5 : 1;
260 unsigned int pb6 : 1;
261 unsigned int pb7 : 1;
262 unsigned int dummy1 : 24;
264 #define REG_RD_ADDR_pinmux_rw_iop_pb 20
265 #define REG_WR_ADDR_pinmux_rw_iop_pb 20
277 unsigned int rd_n : 1;
278 unsigned int wr_n : 1;
281 unsigned int ce0_n : 1;
282 unsigned int ce1_n : 1;
283 unsigned int ce2_n : 1;
285 unsigned int dummy1 : 16;
287 #define REG_RD_ADDR_pinmux_rw_iop_pio 24
288 #define REG_WR_ADDR_pinmux_rw_iop_pio 24
293 unsigned int dummy1 : 31;
295 #define REG_RD_ADDR_pinmux_rw_iop_usb 28
296 #define REG_WR_ADDR_pinmux_rw_iop_usb 28