Linux Kernel
3.7.1
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#include <mach/dove.h>
Go to the source code of this file.
#define BRIDGE_INT_TIMER1_CLR (~0x0004) |
Definition at line 29 of file bridge-regs.h.
#define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0000) |
Definition at line 16 of file bridge-regs.h.
#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) |
Definition at line 18 of file bridge-regs.h.
#define CPU_CTRL_PCIE0_LINK 0x00000001 |
Definition at line 19 of file bridge-regs.h.
#define CPU_CTRL_PCIE1_LINK 0x00000008 |
Definition at line 21 of file bridge-regs.h.
#define CPU_RESET 0x00000002 |
Definition at line 20 of file bridge-regs.h.
#define ENDPOINT_MASK_HIGH (IRQ_VIRT_BASE + ENDPOINT_MASK_HIGH_OFF) |
Definition at line 47 of file bridge-regs.h.
#define ENDPOINT_MASK_HIGH_OFF 0x001c |
Definition at line 39 of file bridge-regs.h.
#define ENDPOINT_MASK_LOW (IRQ_VIRT_BASE + ENDPOINT_MASK_LOW_OFF) |
Definition at line 44 of file bridge-regs.h.
#define ENDPOINT_MASK_LOW_OFF 0x000c |
Definition at line 35 of file bridge-regs.h.
#define FIQ_MASK_HIGH (IRQ_VIRT_BASE + FIQ_MASK_HIGH_OFF) |
Definition at line 46 of file bridge-regs.h.
#define FIQ_MASK_HIGH_OFF 0x0018 |
Definition at line 38 of file bridge-regs.h.
#define FIQ_MASK_LOW (IRQ_VIRT_BASE + FIQ_MASK_LOW_OFF) |
Definition at line 43 of file bridge-regs.h.
#define FIQ_MASK_LOW_OFF 0x0008 |
Definition at line 34 of file bridge-regs.h.
#define IRQ_CAUSE_HIGH_OFF 0x0010 |
Definition at line 36 of file bridge-regs.h.
#define IRQ_CAUSE_LOW_OFF 0x0000 |
Definition at line 32 of file bridge-regs.h.
#define IRQ_MASK_HIGH (IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF) |
Definition at line 45 of file bridge-regs.h.
#define IRQ_MASK_HIGH_OFF 0x0014 |
Definition at line 37 of file bridge-regs.h.
#define IRQ_MASK_LOW (IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF) |
Definition at line 42 of file bridge-regs.h.
#define IRQ_MASK_LOW_OFF 0x0004 |
Definition at line 33 of file bridge-regs.h.
#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) |
Definition at line 31 of file bridge-regs.h.
#define PCIE_INTERRUPT_MASK (IRQ_VIRT_BASE + PCIE_INTERRUPT_MASK_OFF) |
Definition at line 48 of file bridge-regs.h.
#define PCIE_INTERRUPT_MASK_OFF 0x0020 |
Definition at line 40 of file bridge-regs.h.
#define POWER_MANAGEMENT (BRIDGE_VIRT_BASE + 0x011c) |
Definition at line 50 of file bridge-regs.h.
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) |
Definition at line 23 of file bridge-regs.h.
#define SOFT_RESET 0x00000001 |
Definition at line 27 of file bridge-regs.h.
#define SOFT_RESET_OUT_EN 0x00000004 |
Definition at line 24 of file bridge-regs.h.
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) |
Definition at line 26 of file bridge-regs.h.
#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300) |
Definition at line 53 of file bridge-regs.h.
#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300) |
Definition at line 52 of file bridge-regs.h.