mb86943a.h File Reference

#include <asm/mb-regs.h>

Go to the source code of this file.

Macros
#define	__reg_MB86943_sl_ctl   *(volatile uint32_t *) (__region_CS1 + 0x00)
#define	MB86943_SL_CTL_BUS_WIDTH_64   0x00000001
#define	MB86943_SL_CTL_AS_HOST   0x00000002
#define	MB86943_SL_CTL_DRCT_MASTER_SWAP   0x00000004
#define	MB86943_SL_CTL_DRCT_SLAVE_SWAP   0x00000008
#define	MB86943_SL_CTL_PCI_CONFIG_SWAP   0x00000010
#define	MB86943_SL_CTL_ECS0_ENABLE   0x00000020
#define	MB86943_SL_CTL_ECS1_ENABLE   0x00000040
#define	MB86943_SL_CTL_ECS2_ENABLE   0x00000080
#define	__reg_MB86943_ecs_ctl(N)   *(volatile uint32_t *) (__region_CS1 + 0x08 + (0x08*(N)))
#define	__reg_MB86943_ecs_range(N)   *(volatile uint32_t *) (__region_CS1 + 0x20 + (0x10*(N)))
#define	__reg_MB86943_ecs_base(N)   *(volatile uint32_t *) (__region_CS1 + 0x28 + (0x10*(N)))
#define	__reg_MB86943_sl_pci_io_range   *(volatile uint32_t *) (__region_CS1 + 0x50)
#define	__reg_MB86943_sl_pci_io_base   *(volatile uint32_t *) (__region_CS1 + 0x58)
#define	__reg_MB86943_sl_pci_mem_range   *(volatile uint32_t *) (__region_CS1 + 0x60)
#define	__reg_MB86943_sl_pci_mem_base   *(volatile uint32_t *) (__region_CS1 + 0x68)
#define	__reg_MB86943_pci_sl_io_base   *(volatile uint32_t *) (__region_CS1 + 0x70)
#define	__reg_MB86943_pci_sl_mem_base   *(volatile uint32_t *) (__region_CS1 + 0x78)
#define	__reg_MB86943_pci_arbiter   *(volatile uint32_t *) (__region_CS2 + 0x01300014)
#define	MB86943_PCIARB_EN   0x00000001

Macro Definition Documentation

#define __reg_MB86943_ecs_base

(

N

)

*(volatile uint32_t *) (__region_CS1 + 0x28 + (0x10*(N)))

Definition at line 30 of file mb86943a.h.

#define __reg_MB86943_ecs_ctl

(

N

)

*(volatile uint32_t *) (__region_CS1 + 0x08 + (0x08*(N)))

Definition at line 28 of file mb86943a.h.

#define __reg_MB86943_ecs_range

(

N

)

*(volatile uint32_t *) (__region_CS1 + 0x20 + (0x10*(N)))

Definition at line 29 of file mb86943a.h.

#define __reg_MB86943_pci_arbiter   *(volatile uint32_t *) (__region_CS2 + 0x01300014)

Definition at line 39 of file mb86943a.h.

#define __reg_MB86943_pci_sl_io_base   *(volatile uint32_t *) (__region_CS1 + 0x70)

Definition at line 36 of file mb86943a.h.

#define __reg_MB86943_pci_sl_mem_base   *(volatile uint32_t *) (__region_CS1 + 0x78)

Definition at line 37 of file mb86943a.h.

#define __reg_MB86943_sl_ctl   *(volatile uint32_t *) (__region_CS1 + 0x00)

Definition at line 17 of file mb86943a.h.

#define __reg_MB86943_sl_pci_io_base   *(volatile uint32_t *) (__region_CS1 + 0x58)

Definition at line 33 of file mb86943a.h.

#define __reg_MB86943_sl_pci_io_range   *(volatile uint32_t *) (__region_CS1 + 0x50)

Definition at line 32 of file mb86943a.h.

#define __reg_MB86943_sl_pci_mem_base   *(volatile uint32_t *) (__region_CS1 + 0x68)

Definition at line 35 of file mb86943a.h.

#define __reg_MB86943_sl_pci_mem_range   *(volatile uint32_t *) (__region_CS1 + 0x60)

Definition at line 34 of file mb86943a.h.

#define MB86943_PCIARB_EN   0x00000001

Definition at line 40 of file mb86943a.h.

#define MB86943_SL_CTL_AS_HOST   0x00000002

Definition at line 20 of file mb86943a.h.

#define MB86943_SL_CTL_BUS_WIDTH_64   0x00000001

Definition at line 19 of file mb86943a.h.

#define MB86943_SL_CTL_DRCT_MASTER_SWAP   0x00000004

Definition at line 21 of file mb86943a.h.

#define MB86943_SL_CTL_DRCT_SLAVE_SWAP   0x00000008

Definition at line 22 of file mb86943a.h.

#define MB86943_SL_CTL_ECS0_ENABLE   0x00000020

Definition at line 24 of file mb86943a.h.

#define MB86943_SL_CTL_ECS1_ENABLE   0x00000040

Definition at line 25 of file mb86943a.h.

#define MB86943_SL_CTL_ECS2_ENABLE   0x00000080

Definition at line 26 of file mb86943a.h.

#define MB86943_SL_CTL_PCI_CONFIG_SWAP   0x00000010

Definition at line 23 of file mb86943a.h.