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Macros | Functions
mcfmmu.h File Reference

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Macros

#define MMUBASE   0xfe000000
 
#define MMUCR   (MMUBASE + 0x00) /* Control register */
 
#define MMUOR   (MMUBASE + 0x04) /* Operation register */
 
#define MMUSR   (MMUBASE + 0x08) /* Status register */
 
#define MMUAR   (MMUBASE + 0x10) /* TLB Address register */
 
#define MMUTR   (MMUBASE + 0x14) /* TLB Tag register */
 
#define MMUDR   (MMUBASE + 0x18) /* TLB Data register */
 
#define MMUCR_EN   0x00000001 /* Virtual mode enable */
 
#define MMUCR_ASM   0x00000002 /* Address space mode */
 
#define MMUOR_UAA   0x00000001 /* Update allocatiom address */
 
#define MMUOR_ACC   0x00000002 /* TLB access */
 
#define MMUOR_RD   0x00000004 /* TLB access read */
 
#define MMUOR_WR   0x00000000 /* TLB access write */
 
#define MMUOR_ADR   0x00000008 /* TLB address select */
 
#define MMUOR_ITLB   0x00000010 /* ITLB operation */
 
#define MMUOR_CAS   0x00000020 /* Clear non-locked ASID TLBs */
 
#define MMUOR_CNL   0x00000040 /* Clear non-locked TLBs */
 
#define MMUOR_CA   0x00000080 /* Clear all TLBs */
 
#define MMUOR_STLB   0x00000100 /* Search TLBs */
 
#define MMUOR_AAN   16 /* TLB allocation address */
 
#define MMUOR_AAMASK   0xffff0000 /* AA mask */
 
#define MMUSR_HIT   0x00000002 /* Search TLB hit */
 
#define MMUSR_WF   0x00000008 /* Write access fault */
 
#define MMUSR_RF   0x00000010 /* Read access fault */
 
#define MMUSR_SPF   0x00000020 /* Supervisor protect fault */
 
#define MMUTR_V   0x00000001 /* Valid */
 
#define MMUTR_SG   0x00000002 /* Shared global */
 
#define MMUTR_IDN   2 /* Address Space ID */
 
#define MMUTR_IDMASK   0x000003fc /* ASID mask */
 
#define MMUTR_VAN   10 /* Virtual Address */
 
#define MMUTR_VAMASK   0xfffffc00 /* VA mask */
 
#define MMUDR_LK   0x00000002 /* Lock entry */
 
#define MMUDR_X   0x00000004 /* Execute access enable */
 
#define MMUDR_W   0x00000008 /* Write access enable */
 
#define MMUDR_R   0x00000010 /* Read access enable */
 
#define MMUDR_SP   0x00000020 /* Supervisor access enable */
 
#define MMUDR_CM_CWT   0x00000000 /* Cachable write thru */
 
#define MMUDR_CM_CCB   0x00000040 /* Cachable copy back */
 
#define MMUDR_CM_NCP   0x00000080 /* Non-cachable precise */
 
#define MMUDR_CM_NCI   0x000000c0 /* Non-cachable imprecise */
 
#define MMUDR_SZ_1MB   0x00000000 /* 1MB page size */
 
#define MMUDR_SZ_4KB   0x00000100 /* 4kB page size */
 
#define MMUDR_SZ_8KB   0x00000200 /* 8kB page size */
 
#define MMUDR_SZ_1KB   0x00000300 /* 1kB page size */
 
#define MMUDR_PAN   10 /* Physical address */
 
#define MMUDR_PAMASK   0xfffffc00 /* PA mask */
 

Functions

int cf_tlb_miss (struct pt_regs *regs, int write, int dtlb, int extension_word)
 

Macro Definition Documentation

#define MMUAR   (MMUBASE + 0x10) /* TLB Address register */

Definition at line 28 of file mcfmmu.h.

#define MMUBASE   0xfe000000

Definition at line 19 of file mcfmmu.h.

#define MMUCR   (MMUBASE + 0x00) /* Control register */

Definition at line 25 of file mcfmmu.h.

#define MMUCR_ASM   0x00000002 /* Address space mode */

Definition at line 36 of file mcfmmu.h.

#define MMUCR_EN   0x00000001 /* Virtual mode enable */

Definition at line 35 of file mcfmmu.h.

#define MMUDR   (MMUBASE + 0x18) /* TLB Data register */

Definition at line 30 of file mcfmmu.h.

#define MMUDR_CM_CCB   0x00000040 /* Cachable copy back */

Definition at line 81 of file mcfmmu.h.

#define MMUDR_CM_CWT   0x00000000 /* Cachable write thru */

Definition at line 80 of file mcfmmu.h.

#define MMUDR_CM_NCI   0x000000c0 /* Non-cachable imprecise */

Definition at line 83 of file mcfmmu.h.

#define MMUDR_CM_NCP   0x00000080 /* Non-cachable precise */

Definition at line 82 of file mcfmmu.h.

#define MMUDR_LK   0x00000002 /* Lock entry */

Definition at line 75 of file mcfmmu.h.

#define MMUDR_PAMASK   0xfffffc00 /* PA mask */

Definition at line 89 of file mcfmmu.h.

#define MMUDR_PAN   10 /* Physical address */

Definition at line 88 of file mcfmmu.h.

#define MMUDR_R   0x00000010 /* Read access enable */

Definition at line 78 of file mcfmmu.h.

#define MMUDR_SP   0x00000020 /* Supervisor access enable */

Definition at line 79 of file mcfmmu.h.

#define MMUDR_SZ_1KB   0x00000300 /* 1kB page size */

Definition at line 87 of file mcfmmu.h.

#define MMUDR_SZ_1MB   0x00000000 /* 1MB page size */

Definition at line 84 of file mcfmmu.h.

#define MMUDR_SZ_4KB   0x00000100 /* 4kB page size */

Definition at line 85 of file mcfmmu.h.

#define MMUDR_SZ_8KB   0x00000200 /* 8kB page size */

Definition at line 86 of file mcfmmu.h.

#define MMUDR_W   0x00000008 /* Write access enable */

Definition at line 77 of file mcfmmu.h.

#define MMUDR_X   0x00000004 /* Execute access enable */

Definition at line 76 of file mcfmmu.h.

#define MMUOR   (MMUBASE + 0x04) /* Operation register */

Definition at line 26 of file mcfmmu.h.

#define MMUOR_AAMASK   0xffff0000 /* AA mask */

Definition at line 52 of file mcfmmu.h.

#define MMUOR_AAN   16 /* TLB allocation address */

Definition at line 51 of file mcfmmu.h.

#define MMUOR_ACC   0x00000002 /* TLB access */

Definition at line 42 of file mcfmmu.h.

#define MMUOR_ADR   0x00000008 /* TLB address select */

Definition at line 45 of file mcfmmu.h.

#define MMUOR_CA   0x00000080 /* Clear all TLBs */

Definition at line 49 of file mcfmmu.h.

#define MMUOR_CAS   0x00000020 /* Clear non-locked ASID TLBs */

Definition at line 47 of file mcfmmu.h.

#define MMUOR_CNL   0x00000040 /* Clear non-locked TLBs */

Definition at line 48 of file mcfmmu.h.

#define MMUOR_ITLB   0x00000010 /* ITLB operation */

Definition at line 46 of file mcfmmu.h.

#define MMUOR_RD   0x00000004 /* TLB access read */

Definition at line 43 of file mcfmmu.h.

#define MMUOR_STLB   0x00000100 /* Search TLBs */

Definition at line 50 of file mcfmmu.h.

#define MMUOR_UAA   0x00000001 /* Update allocatiom address */

Definition at line 41 of file mcfmmu.h.

#define MMUOR_WR   0x00000000 /* TLB access write */

Definition at line 44 of file mcfmmu.h.

#define MMUSR   (MMUBASE + 0x08) /* Status register */

Definition at line 27 of file mcfmmu.h.

#define MMUSR_HIT   0x00000002 /* Search TLB hit */

Definition at line 57 of file mcfmmu.h.

#define MMUSR_RF   0x00000010 /* Read access fault */

Definition at line 59 of file mcfmmu.h.

#define MMUSR_SPF   0x00000020 /* Supervisor protect fault */

Definition at line 60 of file mcfmmu.h.

#define MMUSR_WF   0x00000008 /* Write access fault */

Definition at line 58 of file mcfmmu.h.

#define MMUTR   (MMUBASE + 0x14) /* TLB Tag register */

Definition at line 29 of file mcfmmu.h.

#define MMUTR_IDMASK   0x000003fc /* ASID mask */

Definition at line 68 of file mcfmmu.h.

#define MMUTR_IDN   2 /* Address Space ID */

Definition at line 67 of file mcfmmu.h.

#define MMUTR_SG   0x00000002 /* Shared global */

Definition at line 66 of file mcfmmu.h.

#define MMUTR_V   0x00000001 /* Valid */

Definition at line 65 of file mcfmmu.h.

#define MMUTR_VAMASK   0xfffffc00 /* VA mask */

Definition at line 70 of file mcfmmu.h.

#define MMUTR_VAN   10 /* Virtual Address */

Definition at line 69 of file mcfmmu.h.

Function Documentation

int cf_tlb_miss ( struct pt_regs regs,
int  write,
int  dtlb,
int  extension_word 
)

Definition at line 88 of file mcfmmu.c.