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Linux Kernel
3.7.1
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#include <asm/irq.h>Go to the source code of this file.
Data Structures | |
| struct | MK48T02 |
| struct | pcc_regs |
Macros | |
| #define | RTC_WRITE 0x80 |
| #define | RTC_READ 0x40 |
| #define | RTC_STOP 0x20 |
| #define | m147_rtc ((MK48T02 * volatile)0xfffe07f8) |
| #define | m147_pcc ((struct pcc_regs * volatile)0xfffe1000) |
| #define | PCC_INT_ENAB 0x08 |
| #define | PCC_TIMER_INT_CLR 0x80 |
| #define | PCC_TIMER_PRELOAD 63936l |
| #define | PCC_LEVEL_ABORT 0x07 |
| #define | PCC_LEVEL_SERIAL 0x04 |
| #define | PCC_LEVEL_ETH 0x04 |
| #define | PCC_LEVEL_TIMER1 0x04 |
| #define | PCC_LEVEL_SCSI_PORT 0x04 |
| #define | PCC_LEVEL_SCSI_DMA 0x04 |
| #define | PCC_IRQ_AC_FAIL (IRQ_USER+0) |
| #define | PCC_IRQ_BERR (IRQ_USER+1) |
| #define | PCC_IRQ_ABORT (IRQ_USER+2) |
| #define | PCC_IRQ_PRINTER (IRQ_USER+7) |
| #define | PCC_IRQ_TIMER1 (IRQ_USER+8) |
| #define | PCC_IRQ_TIMER2 (IRQ_USER+9) |
| #define | PCC_IRQ_SOFTWARE1 (IRQ_USER+10) |
| #define | PCC_IRQ_SOFTWARE2 (IRQ_USER+11) |
| #define | M147_SCC_A_ADDR 0xfffe3002 |
| #define | M147_SCC_B_ADDR 0xfffe3000 |
| #define | M147_SCC_PCLK 5000000 |
| #define | MVME147_IRQ_SCSI_PORT (IRQ_USER+0x45) |
| #define | MVME147_IRQ_SCSI_DMA (IRQ_USER+0x46) |
| #define | MVME147_IRQ_TYPE_PRIO 0 |
| #define | MVME147_IRQ_SCC_BASE (IRQ_USER+32) |
| #define | MVME147_IRQ_SCCB_TX (IRQ_USER+32) |
| #define | MVME147_IRQ_SCCB_STAT (IRQ_USER+34) |
| #define | MVME147_IRQ_SCCB_RX (IRQ_USER+36) |
| #define | MVME147_IRQ_SCCB_SPCOND (IRQ_USER+38) |
| #define | MVME147_IRQ_SCCA_TX (IRQ_USER+40) |
| #define | MVME147_IRQ_SCCA_STAT (IRQ_USER+42) |
| #define | MVME147_IRQ_SCCA_RX (IRQ_USER+44) |
| #define | MVME147_IRQ_SCCA_SPCOND (IRQ_USER+46) |
| #define | MVME147_LANCE_BASE 0xfffe1800 |
| #define | MVME147_LANCE_IRQ (IRQ_USER+4) |
| #define | ETHERNET_ADDRESS 0xfffe0778 |
| #define ETHERNET_ADDRESS 0xfffe0778 |
Definition at line 111 of file mvme147hw.h.
Definition at line 62 of file mvme147hw.h.
| #define m147_rtc ((MK48T02 * volatile)0xfffe07f8) |
Definition at line 22 of file mvme147hw.h.
| #define M147_SCC_A_ADDR 0xfffe3002 |
Definition at line 88 of file mvme147hw.h.
| #define M147_SCC_B_ADDR 0xfffe3000 |
Definition at line 89 of file mvme147hw.h.
| #define M147_SCC_PCLK 5000000 |
Definition at line 90 of file mvme147hw.h.
| #define MVME147_IRQ_SCC_BASE (IRQ_USER+32) |
Definition at line 98 of file mvme147hw.h.
| #define MVME147_IRQ_SCCA_RX (IRQ_USER+44) |
Definition at line 105 of file mvme147hw.h.
| #define MVME147_IRQ_SCCA_SPCOND (IRQ_USER+46) |
Definition at line 106 of file mvme147hw.h.
| #define MVME147_IRQ_SCCA_STAT (IRQ_USER+42) |
Definition at line 104 of file mvme147hw.h.
| #define MVME147_IRQ_SCCA_TX (IRQ_USER+40) |
Definition at line 103 of file mvme147hw.h.
| #define MVME147_IRQ_SCCB_RX (IRQ_USER+36) |
Definition at line 101 of file mvme147hw.h.
| #define MVME147_IRQ_SCCB_SPCOND (IRQ_USER+38) |
Definition at line 102 of file mvme147hw.h.
| #define MVME147_IRQ_SCCB_STAT (IRQ_USER+34) |
Definition at line 100 of file mvme147hw.h.
| #define MVME147_IRQ_SCCB_TX (IRQ_USER+32) |
Definition at line 99 of file mvme147hw.h.
| #define MVME147_IRQ_SCSI_DMA (IRQ_USER+0x46) |
Definition at line 93 of file mvme147hw.h.
| #define MVME147_IRQ_SCSI_PORT (IRQ_USER+0x45) |
Definition at line 92 of file mvme147hw.h.
| #define MVME147_IRQ_TYPE_PRIO 0 |
Definition at line 97 of file mvme147hw.h.
| #define MVME147_LANCE_BASE 0xfffe1800 |
Definition at line 108 of file mvme147hw.h.
| #define MVME147_LANCE_IRQ (IRQ_USER+4) |
Definition at line 109 of file mvme147hw.h.
| #define PCC_INT_ENAB 0x08 |
Definition at line 65 of file mvme147hw.h.
| #define PCC_IRQ_ABORT (IRQ_USER+2) |
Definition at line 79 of file mvme147hw.h.
| #define PCC_IRQ_AC_FAIL (IRQ_USER+0) |
Definition at line 77 of file mvme147hw.h.
| #define PCC_IRQ_BERR (IRQ_USER+1) |
Definition at line 78 of file mvme147hw.h.
| #define PCC_IRQ_PRINTER (IRQ_USER+7) |
Definition at line 81 of file mvme147hw.h.
| #define PCC_IRQ_SOFTWARE1 (IRQ_USER+10) |
Definition at line 84 of file mvme147hw.h.
| #define PCC_IRQ_SOFTWARE2 (IRQ_USER+11) |
Definition at line 85 of file mvme147hw.h.
| #define PCC_IRQ_TIMER1 (IRQ_USER+8) |
Definition at line 82 of file mvme147hw.h.
| #define PCC_IRQ_TIMER2 (IRQ_USER+9) |
Definition at line 83 of file mvme147hw.h.
| #define PCC_LEVEL_ABORT 0x07 |
Definition at line 70 of file mvme147hw.h.
| #define PCC_LEVEL_ETH 0x04 |
Definition at line 72 of file mvme147hw.h.
| #define PCC_LEVEL_SCSI_DMA 0x04 |
Definition at line 75 of file mvme147hw.h.
| #define PCC_LEVEL_SCSI_PORT 0x04 |
Definition at line 74 of file mvme147hw.h.
| #define PCC_LEVEL_SERIAL 0x04 |
Definition at line 71 of file mvme147hw.h.
| #define PCC_LEVEL_TIMER1 0x04 |
Definition at line 73 of file mvme147hw.h.
| #define PCC_TIMER_INT_CLR 0x80 |
Definition at line 67 of file mvme147hw.h.
| #define PCC_TIMER_PRELOAD 63936l |
Definition at line 68 of file mvme147hw.h.
| #define RTC_READ 0x40 |
Definition at line 19 of file mvme147hw.h.
| #define RTC_STOP 0x20 |
Definition at line 20 of file mvme147hw.h.
| #define RTC_WRITE 0x80 |
Definition at line 18 of file mvme147hw.h.
1.8.2