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arch
arm
mach-imx
mx31lilly-db.c
Go to the documentation of this file.
1
/*
2
* LILLY-1131 development board support
3
*
4
* Copyright (c) 2009 Daniel Mack <
[email protected]
>
5
*
6
* based on code for other MX31 boards,
7
*
8
* Copyright 2005-2007 Freescale Semiconductor
9
* Copyright (c) 2009 Alberto Panizzo <
[email protected]
>
10
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
11
*
12
* This program is free software; you can redistribute it and/or modify
13
* it under the terms of the GNU General Public License as published by
14
* the Free Software Foundation; either version 2 of the License, or
15
* (at your option) any later version.
16
*
17
* This program is distributed in the hope that it will be useful,
18
* but WITHOUT ANY WARRANTY; without even the implied warranty of
19
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20
* GNU General Public License for more details.
21
*/
22
23
#include <linux/kernel.h>
24
#include <linux/types.h>
25
#include <
linux/init.h
>
26
#include <
linux/gpio.h
>
27
#include <
linux/platform_device.h
>
28
29
#include <
asm/mach-types.h
>
30
#include <
asm/mach/arch.h
>
31
#include <
asm/mach/map.h
>
32
33
#include <mach/hardware.h>
34
#include <mach/common.h>
35
#include <
mach/iomux-mx3.h
>
36
#include <
mach/board-mx31lilly.h
>
37
38
#include "
devices-imx31.h
"
39
40
/*
41
* This file contains board-specific initialization routines for the
42
* LILLY-1131 development board. If you design an own baseboard for the
43
* module, use this file as base for support code.
44
*/
45
46
static
unsigned
int
lilly_db_board_pins[]
__initdata
= {
47
MX31_PIN_CTS1__CTS1
,
48
MX31_PIN_RTS1__RTS1
,
49
MX31_PIN_TXD1__TXD1
,
50
MX31_PIN_RXD1__RXD1
,
51
MX31_PIN_CTS2__CTS2
,
52
MX31_PIN_RTS2__RTS2
,
53
MX31_PIN_TXD2__TXD2
,
54
MX31_PIN_RXD2__RXD2
,
55
MX31_PIN_CSPI3_MOSI__RXD3
,
56
MX31_PIN_CSPI3_MISO__TXD3
,
57
MX31_PIN_CSPI3_SCLK__RTS3
,
58
MX31_PIN_CSPI3_SPI_RDY__CTS3
,
59
MX31_PIN_SD1_DATA3__SD1_DATA3
,
60
MX31_PIN_SD1_DATA2__SD1_DATA2
,
61
MX31_PIN_SD1_DATA1__SD1_DATA1
,
62
MX31_PIN_SD1_DATA0__SD1_DATA0
,
63
MX31_PIN_SD1_CLK__SD1_CLK
,
64
MX31_PIN_SD1_CMD__SD1_CMD
,
65
MX31_PIN_LD0__LD0
,
66
MX31_PIN_LD1__LD1
,
67
MX31_PIN_LD2__LD2
,
68
MX31_PIN_LD3__LD3
,
69
MX31_PIN_LD4__LD4
,
70
MX31_PIN_LD5__LD5
,
71
MX31_PIN_LD6__LD6
,
72
MX31_PIN_LD7__LD7
,
73
MX31_PIN_LD8__LD8
,
74
MX31_PIN_LD9__LD9
,
75
MX31_PIN_LD10__LD10
,
76
MX31_PIN_LD11__LD11
,
77
MX31_PIN_LD12__LD12
,
78
MX31_PIN_LD13__LD13
,
79
MX31_PIN_LD14__LD14
,
80
MX31_PIN_LD15__LD15
,
81
MX31_PIN_LD16__LD16
,
82
MX31_PIN_LD17__LD17
,
83
MX31_PIN_VSYNC3__VSYNC3
,
84
MX31_PIN_HSYNC__HSYNC
,
85
MX31_PIN_FPSHIFT__FPSHIFT
,
86
MX31_PIN_DRDY0__DRDY0
,
87
MX31_PIN_CONTRAST__CONTRAST
,
88
};
89
90
/* UART */
91
static
const
struct
imxuart_platform_data
uart_pdata
__initconst
= {
92
.flags =
IMXUART_HAVE_RTSCTS
,
93
};
94
95
/* MMC support */
96
97
static
int
mxc_mmc1_get_ro(
struct
device
*
dev
)
98
{
99
return
gpio_get_value
(
IOMUX_TO_GPIO
(
MX31_PIN_LCS0
));
100
}
101
102
static
int
gpio_det, gpio_wp;
103
104
#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
105
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
106
107
static
int
mxc_mmc1_init(
struct
device
*dev,
108
irq_handler_t
detect_irq,
void
*
data
)
109
{
110
int
ret
;
111
112
gpio_det =
IOMUX_TO_GPIO
(
MX31_PIN_GPIO1_1
);
113
gpio_wp =
IOMUX_TO_GPIO
(
MX31_PIN_LCS0
);
114
115
mxc_iomux_set_pad
(
MX31_PIN_SD1_DATA0
,
MMC_PAD_CFG
);
116
mxc_iomux_set_pad
(
MX31_PIN_SD1_DATA1
,
MMC_PAD_CFG
);
117
mxc_iomux_set_pad
(
MX31_PIN_SD1_DATA2
,
MMC_PAD_CFG
);
118
mxc_iomux_set_pad
(
MX31_PIN_SD1_DATA3
,
MMC_PAD_CFG
);
119
mxc_iomux_set_pad
(
MX31_PIN_SD1_CLK
,
MMC_PAD_CFG
);
120
mxc_iomux_set_pad
(
MX31_PIN_SD1_CMD
,
MMC_PAD_CFG
);
121
122
ret =
gpio_request
(gpio_det,
"MMC detect"
);
123
if
(ret)
124
return
ret
;
125
126
ret =
gpio_request
(gpio_wp,
"MMC w/p"
);
127
if
(ret)
128
goto
exit_free_det;
129
130
gpio_direction_input
(gpio_det);
131
gpio_direction_input
(gpio_wp);
132
133
ret =
request_irq
(
gpio_to_irq
(
IOMUX_TO_GPIO
(
MX31_PIN_GPIO1_1
)),
134
detect_irq,
135
IRQF_DISABLED
|
IRQF_TRIGGER_FALLING
,
136
"MMC detect"
, data);
137
if
(ret)
138
goto
exit_free_wp;
139
140
return
0;
141
142
exit_free_wp:
143
gpio_free
(gpio_wp);
144
145
exit_free_det:
146
gpio_free
(gpio_det);
147
148
return
ret
;
149
}
150
151
static
void
mxc_mmc1_exit(
struct
device
*dev,
void
*
data
)
152
{
153
gpio_free
(gpio_det);
154
gpio_free
(gpio_wp);
155
free_irq
(
gpio_to_irq
(
IOMUX_TO_GPIO
(
MX31_PIN_GPIO1_1
)), data);
156
}
157
158
static
const
struct
imxmmc_platform_data
mmc_pdata __initconst = {
159
.get_ro = mxc_mmc1_get_ro,
160
.init = mxc_mmc1_init,
161
.exit = mxc_mmc1_exit,
162
};
163
164
/* Framebuffer support */
165
static
const
struct
fb_videomode
fb_modedb = {
166
/* 640x480 TFT panel (IPS-056T) */
167
.name =
"CRT-VGA"
,
168
.refresh = 64,
169
.xres = 640,
170
.yres = 480,
171
.pixclock = 30000,
172
.left_margin = 200,
173
.right_margin = 2,
174
.upper_margin = 2,
175
.lower_margin = 2,
176
.hsync_len = 3,
177
.vsync_len = 1,
178
.sync =
FB_SYNC_VERT_HIGH_ACT
|
FB_SYNC_OE_ACT_HIGH
,
179
.vmode =
FB_VMODE_NONINTERLACED
,
180
.flag = 0,
181
};
182
183
static
struct
mx3fb_platform_data
fb_pdata
__initdata
= {
184
.name =
"CRT-VGA"
,
185
.mode = &fb_modedb,
186
.num_modes = 1,
187
};
188
189
#define LCD_VCC_EN_GPIO (7)
190
191
static
void
__init
mx31lilly_init_fb(
void
)
192
{
193
if
(
gpio_request
(
LCD_VCC_EN_GPIO
,
"LCD enable"
) != 0) {
194
printk
(
KERN_WARNING
"unable to request LCD_VCC_EN pin.\n"
);
195
return
;
196
}
197
198
imx31_add_ipu_core
();
199
imx31_add_mx3_sdc_fb
(&fb_pdata);
200
gpio_direction_output
(
LCD_VCC_EN_GPIO
, 1);
201
}
202
203
void
__init
mx31lilly_db_init
(
void
)
204
{
205
mxc_iomux_setup_multiple_pins
(lilly_db_board_pins,
206
ARRAY_SIZE
(lilly_db_board_pins),
207
"development board pins"
);
208
imx31_add_imx_uart0
(&uart_pdata);
209
imx31_add_imx_uart1
(&uart_pdata);
210
imx31_add_imx_uart2
(&uart_pdata);
211
imx31_add_mxc_mmc
(0, &mmc_pdata);
212
mx31lilly_init_fb();
213
}
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