#include <linux/types.h>
Go to the source code of this file.
#define cpu_is_mx1 |
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Definition at line 66 of file mxc.h.
#define cpu_is_mx21 |
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Definition at line 78 of file mxc.h.
#define cpu_is_mx25 |
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#define cpu_is_mx27 |
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#define cpu_is_mx31 |
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#define cpu_is_mx35 |
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#define cpu_is_mx50 |
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#define cpu_is_mx51 |
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#define cpu_is_mx53 |
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#define IMX_CHIP_REVISION_1_0 0x10 |
Definition at line 39 of file mxc.h.
#define IMX_CHIP_REVISION_1_1 0x11 |
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#define IMX_CHIP_REVISION_1_2 0x12 |
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#define IMX_CHIP_REVISION_1_3 0x13 |
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#define IMX_CHIP_REVISION_2_0 0x20 |
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#define IMX_CHIP_REVISION_2_1 0x21 |
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#define IMX_CHIP_REVISION_2_2 0x22 |
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#define IMX_CHIP_REVISION_2_3 0x23 |
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#define IMX_CHIP_REVISION_3_0 0x30 |
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#define IMX_CHIP_REVISION_3_1 0x31 |
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#define IMX_CHIP_REVISION_3_2 0x32 |
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#define IMX_CHIP_REVISION_3_3 0x33 |
Definition at line 50 of file mxc.h.
#define IMX_CHIP_REVISION_UNKNOWN 0xff |
Definition at line 51 of file mxc.h.
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tzic_enable_wake() - enable wakeup interrupt
- Returns
- 0 if successful; non-zero otherwise
This function provides an interrupt synchronization point that is required by tzic enabled platforms before entering imx specific low power modes (ie, those low power modes beyond the WAIT_CLOCKED basic ARM WFI only mode).
Definition at line 211 of file tzic.c.
unsigned int __mxc_cpu_type |
Definition at line 6 of file cpu.c.