Linux Kernel  3.7.1
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Macros
nanoengine.h File Reference
#include <mach/irqs.h>

Go to the source code of this file.

Macros

#define GPIO_PC_READY0   11 /* ready for socket 0 (active high)*/
 
#define GPIO_PC_READY1   12 /* ready for socket 1 (active high) */
 
#define GPIO_PC_CD0   13 /* detect for socket 0 (active low) */
 
#define GPIO_PC_CD1   14 /* detect for socket 1 (active low) */
 
#define GPIO_PC_RESET0   15 /* reset socket 0 */
 
#define GPIO_PC_RESET1   16 /* reset socket 1 */
 
#define NANOENGINE_IRQ_GPIO_PCI   IRQ_GPIO0
 
#define NANOENGINE_IRQ_GPIO_PC_READY0   IRQ_GPIO11
 
#define NANOENGINE_IRQ_GPIO_PC_READY1   IRQ_GPIO12
 
#define NANOENGINE_IRQ_GPIO_PC_CD0   IRQ_GPIO13
 
#define NANOENGINE_IRQ_GPIO_PC_CD1   IRQ_GPIO14
 
#define NANO_PCI_MEM_RW_PHYS   0x18600000
 
#define NANO_PCI_MEM_RW_VIRT   0xf1000000
 
#define NANO_PCI_MEM_RW_SIZE   SZ_1M
 
#define NANO_PCI_CONFIG_SPACE_PHYS   0x18A10000
 
#define NANO_PCI_CONFIG_SPACE_VIRT   0xf2000000
 
#define NANO_PCI_CONFIG_SPACE_SIZE   SZ_64K
 

Macro Definition Documentation

#define GPIO_PC_CD0   13 /* detect for socket 0 (active low) */

Definition at line 21 of file nanoengine.h.

#define GPIO_PC_CD1   14 /* detect for socket 1 (active low) */

Definition at line 22 of file nanoengine.h.

#define GPIO_PC_READY0   11 /* ready for socket 0 (active high)*/

Definition at line 19 of file nanoengine.h.

#define GPIO_PC_READY1   12 /* ready for socket 1 (active high) */

Definition at line 20 of file nanoengine.h.

#define GPIO_PC_RESET0   15 /* reset socket 0 */

Definition at line 23 of file nanoengine.h.

#define GPIO_PC_RESET1   16 /* reset socket 1 */

Definition at line 24 of file nanoengine.h.

#define NANO_PCI_CONFIG_SPACE_PHYS   0x18A10000

Definition at line 47 of file nanoengine.h.

#define NANO_PCI_CONFIG_SPACE_SIZE   SZ_64K

Definition at line 49 of file nanoengine.h.

#define NANO_PCI_CONFIG_SPACE_VIRT   0xf2000000

Definition at line 48 of file nanoengine.h.

#define NANO_PCI_MEM_RW_PHYS   0x18600000

Definition at line 44 of file nanoengine.h.

#define NANO_PCI_MEM_RW_SIZE   SZ_1M

Definition at line 46 of file nanoengine.h.

#define NANO_PCI_MEM_RW_VIRT   0xf1000000

Definition at line 45 of file nanoengine.h.

#define NANOENGINE_IRQ_GPIO_PC_CD0   IRQ_GPIO13

Definition at line 29 of file nanoengine.h.

#define NANOENGINE_IRQ_GPIO_PC_CD1   IRQ_GPIO14

Definition at line 30 of file nanoengine.h.

#define NANOENGINE_IRQ_GPIO_PC_READY0   IRQ_GPIO11

Definition at line 27 of file nanoengine.h.

#define NANOENGINE_IRQ_GPIO_PC_READY1   IRQ_GPIO12

Definition at line 28 of file nanoengine.h.

#define NANOENGINE_IRQ_GPIO_PCI   IRQ_GPIO0

Definition at line 26 of file nanoengine.h.