|
| enum | OpalVendorApiTokens { OPAL_START_VENDOR_API_RANGE = 1000,
OPAL_END_VENDOR_API_RANGE = 1999
} |
| |
| enum | OpalFreezeState {
OPAL_EEH_STOPPED_NOT_FROZEN = 0,
OPAL_EEH_STOPPED_MMIO_FREEZE = 1,
OPAL_EEH_STOPPED_DMA_FREEZE = 2,
OPAL_EEH_STOPPED_MMIO_DMA_FREEZE = 3,
OPAL_EEH_STOPPED_RESET = 4,
OPAL_EEH_STOPPED_TEMP_UNAVAIL = 5,
OPAL_EEH_STOPPED_PERM_UNAVAIL = 6
} |
| |
| enum | OpalEehFreezeActionToken { OPAL_EEH_ACTION_CLEAR_FREEZE_MMIO = 1,
OPAL_EEH_ACTION_CLEAR_FREEZE_DMA = 2,
OPAL_EEH_ACTION_CLEAR_FREEZE_ALL = 3
} |
| |
| enum | OpalPciStatusToken {
OPAL_EEH_PHB_NO_ERROR = 0,
OPAL_EEH_PHB_FATAL = 1,
OPAL_EEH_PHB_RECOVERABLE = 2,
OPAL_EEH_PHB_BUS_ERROR = 3,
OPAL_EEH_PCI_NO_DEVSEL = 4,
OPAL_EEH_PCI_TA = 5,
OPAL_EEH_PCIEX_UR = 6,
OPAL_EEH_PCIEX_CA = 7,
OPAL_EEH_PCI_MMIO_ERROR = 8,
OPAL_EEH_PCI_DMA_ERROR = 9
} |
| |
| enum | OpalShpcAction { OPAL_SHPC_GET_LINK_STATE = 0,
OPAL_SHPC_GET_SLOT_STATE = 1
} |
| |
| enum | OpalShpcLinkState { OPAL_SHPC_LINK_DOWN = 0,
OPAL_SHPC_LINK_UP = 1
} |
| |
| enum | OpalMmioWindowType { OPAL_M32_WINDOW_TYPE = 1,
OPAL_M64_WINDOW_TYPE = 2,
OPAL_IO_WINDOW_TYPE = 3
} |
| |
| enum | OpalShpcSlotState { OPAL_SHPC_DEV_NOT_PRESENT = 0,
OPAL_SHPC_DEV_PRESENT = 1
} |
| |
| enum | OpalExceptionHandler { OPAL_MACHINE_CHECK_HANDLER = 1,
OPAL_HYPERVISOR_MAINTENANCE_HANDLER = 2,
OPAL_SOFTPATCH_HANDLER = 3
} |
| |
| enum | OpalPendingState {
OPAL_EVENT_OPAL_INTERNAL = 0x1,
OPAL_EVENT_NVRAM = 0x2,
OPAL_EVENT_RTC = 0x4,
OPAL_EVENT_CONSOLE_OUTPUT = 0x8,
OPAL_EVENT_CONSOLE_INPUT = 0x10,
OPAL_EVENT_ERROR_LOG_AVAIL = 0x20,
OPAL_EVENT_ERROR_LOG = 0x40,
OPAL_EVENT_EPOW = 0x80,
OPAL_EVENT_LED_STATUS = 0x100
} |
| |
| enum | OpalMCE_Version { OpalMCE_V1 = 1
} |
| |
| enum | OpalMCE_Severity { OpalMCE_SEV_NO_ERROR = 0,
OpalMCE_SEV_WARNING = 1,
OpalMCE_SEV_ERROR_SYNC = 2,
OpalMCE_SEV_FATAL = 3
} |
| |
| enum | OpalMCE_Disposition { OpalMCE_DISPOSITION_RECOVERED = 0,
OpalMCE_DISPOSITION_NOT_RECOVERED = 1
} |
| |
| enum | OpalMCE_Initiator { OpalMCE_INITIATOR_UNKNOWN = 0,
OpalMCE_INITIATOR_CPU = 1
} |
| |
| enum | OpalMCE_ErrorType {
OpalMCE_ERROR_TYPE_UNKNOWN = 0,
OpalMCE_ERROR_TYPE_UE = 1,
OpalMCE_ERROR_TYPE_SLB = 2,
OpalMCE_ERROR_TYPE_ERAT = 3,
OpalMCE_ERROR_TYPE_TLB = 4
} |
| |
| enum | OpalMCE_UeErrorType {
OpalMCE_UE_ERROR_INDETERMINATE = 0,
OpalMCE_UE_ERROR_IFETCH = 1,
OpalMCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH = 2,
OpalMCE_UE_ERROR_LOAD_STORE = 3,
OpalMCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE = 4
} |
| |
| enum | OpalMCE_SlbErrorType { OpalMCE_SLB_ERROR_INDETERMINATE = 0,
OpalMCE_SLB_ERROR_PARITY = 1,
OpalMCE_SLB_ERROR_MULTIHIT = 2
} |
| |
| enum | OpalMCE_EratErrorType { OpalMCE_ERAT_ERROR_INDETERMINATE = 0,
OpalMCE_ERAT_ERROR_PARITY = 1,
OpalMCE_ERAT_ERROR_MULTIHIT = 2
} |
| |
| enum | OpalMCE_TlbErrorType { OpalMCE_TLB_ERROR_INDETERMINATE = 0,
OpalMCE_TLB_ERROR_PARITY = 1,
OpalMCE_TLB_ERROR_MULTIHIT = 2
} |
| |
| enum | OpalThreadStatus { OPAL_THREAD_INACTIVE = 0x0,
OPAL_THREAD_STARTED = 0x1
} |
| |
| enum | OpalPciBusCompare {
OpalPciBusAny = 0,
OpalPciBus3Bits = 2,
OpalPciBus4Bits = 3,
OpalPciBus5Bits = 4,
OpalPciBus6Bits = 5,
OpalPciBus7Bits = 6,
OpalPciBusAll = 7
} |
| |
| enum | OpalDeviceCompare { OPAL_IGNORE_RID_DEVICE_NUMBER = 0,
OPAL_COMPARE_RID_DEVICE_NUMBER = 1
} |
| |
| enum | OpalFuncCompare { OPAL_IGNORE_RID_FUNCTION_NUMBER = 0,
OPAL_COMPARE_RID_FUNCTION_NUMBER = 1
} |
| |
| enum | OpalPeAction { OPAL_UNMAP_PE = 0,
OPAL_MAP_PE = 1
} |
| |
| enum | OpalPeltvAction { OPAL_REMOVE_PE_FROM_DOMAIN = 0,
OPAL_ADD_PE_TO_DOMAIN = 1
} |
| |
| enum | OpalMveEnableAction { OPAL_DISABLE_MVE = 0,
OPAL_ENABLE_MVE = 1
} |
| |
| enum | OpalPciResetAndReinitScope {
OPAL_PHB_COMPLETE = 1,
OPAL_PCI_LINK = 2,
OPAL_PHB_ERROR = 3,
OPAL_PCI_HOT_RESET = 4,
OPAL_PCI_FUNDAMENTAL_RESET = 5,
OPAL_PCI_IODA_TABLE_RESET = 6
} |
| |
| enum | OpalPciResetState { OPAL_DEASSERT_RESET = 0,
OPAL_ASSERT_RESET = 1
} |
| |
| enum | OpalPciMaskAction { OPAL_UNMASK_ERROR_TYPE = 0,
OPAL_MASK_ERROR_TYPE = 1
} |
| |
| enum | OpalSlotLedType { OPAL_SLOT_LED_ID_TYPE = 0,
OPAL_SLOT_LED_FAULT_TYPE = 1
} |
| |
| enum | OpalLedAction { OPAL_TURN_OFF_LED = 0,
OPAL_TURN_ON_LED = 1,
OPAL_QUERY_LED_STATE_AFTER_BUSY = 2
} |
| |
| enum | OpalEpowStatus { OPAL_EPOW_NONE = 0,
OPAL_EPOW_UPS = 1,
OPAL_EPOW_OVER_AMBIENT_TEMP = 2,
OPAL_EPOW_OVER_INTERNAL_TEMP = 3
} |
| |
| enum | { OPAL_P7IOC_NUM_PEST_REGS = 128
} |
| |
|
| long | opal_query_takeover (u64 *hal_size, u64 *hal_align) |
| |
| long | opal_do_takeover (struct opal_takeover_args *args) |
| |
| int | opal_enter_rtas (struct rtas_args *args, unsigned long data, unsigned long entry) |
| |
| int64_t | opal_console_write (int64_t term_number, int64_t *length, const uint8_t *buffer) |
| |
| int64_t | opal_console_read (int64_t term_number, int64_t *length, uint8_t *buffer) |
| |
| int64_t | opal_console_write_buffer_space (int64_t term_number, int64_t *length) |
| |
| int64_t | opal_rtc_read (uint32_t *year_month_day, uint64_t *hour_minute_second_millisecond) |
| |
| int64_t | opal_rtc_write (uint32_t year_month_day, uint64_t hour_minute_second_millisecond) |
| |
| int64_t | opal_cec_power_down (uint64_t request) |
| |
| int64_t | opal_cec_reboot (void) |
| |
| int64_t | opal_read_nvram (uint64_t buffer, uint64_t size, uint64_t offset) |
| |
| int64_t | opal_write_nvram (uint64_t buffer, uint64_t size, uint64_t offset) |
| |
| int64_t | opal_handle_interrupt (uint64_t isn, uint64_t *outstanding_event_mask) |
| |
| int64_t | opal_poll_events (uint64_t *outstanding_event_mask) |
| |
| int64_t | opal_pci_set_hub_tce_memory (uint64_t hub_id, uint64_t tce_mem_addr, uint64_t tce_mem_size) |
| |
| int64_t | opal_pci_set_phb_tce_memory (uint64_t phb_id, uint64_t tce_mem_addr, uint64_t tce_mem_size) |
| |
| int64_t | opal_pci_config_read_byte (uint64_t phb_id, uint64_t bus_dev_func, uint64_t offset, uint8_t *data) |
| |
| int64_t | opal_pci_config_read_half_word (uint64_t phb_id, uint64_t bus_dev_func, uint64_t offset, uint16_t *data) |
| |
| int64_t | opal_pci_config_read_word (uint64_t phb_id, uint64_t bus_dev_func, uint64_t offset, uint32_t *data) |
| |
| int64_t | opal_pci_config_write_byte (uint64_t phb_id, uint64_t bus_dev_func, uint64_t offset, uint8_t data) |
| |
| int64_t | opal_pci_config_write_half_word (uint64_t phb_id, uint64_t bus_dev_func, uint64_t offset, uint16_t data) |
| |
| int64_t | opal_pci_config_write_word (uint64_t phb_id, uint64_t bus_dev_func, uint64_t offset, uint32_t data) |
| |
| int64_t | opal_set_xive (uint32_t isn, uint16_t server, uint8_t priority) |
| |
| int64_t | opal_get_xive (uint32_t isn, uint16_t *server, uint8_t *priority) |
| |
| int64_t | opal_register_exception_handler (uint64_t opal_exception, uint64_t handler_address, uint64_t glue_cache_line) |
| |
| int64_t | opal_pci_eeh_freeze_status (uint64_t phb_id, uint64_t pe_number, uint8_t *freeze_state, uint16_t *pci_error_type, uint64_t *phb_status) |
| |
| int64_t | opal_pci_eeh_freeze_clear (uint64_t phb_id, uint64_t pe_number, uint64_t eeh_action_token) |
| |
| int64_t | opal_pci_shpc (uint64_t phb_id, uint64_t shpc_action, uint8_t *state) |
| |
| int64_t | opal_pci_phb_mmio_enable (uint64_t phb_id, uint16_t window_type, uint16_t window_num, uint16_t enable) |
| |
| int64_t | opal_pci_set_phb_mem_window (uint64_t phb_id, uint16_t window_type, uint16_t window_num, uint64_t starting_real_address, uint64_t starting_pci_address, uint16_t segment_size) |
| |
| int64_t | opal_pci_map_pe_mmio_window (uint64_t phb_id, uint16_t pe_number, uint16_t window_type, uint16_t window_num, uint16_t segment_num) |
| |
| int64_t | opal_pci_set_phb_table_memory (uint64_t phb_id, uint64_t rtt_addr, uint64_t ivt_addr, uint64_t ivt_len, uint64_t reject_array_addr, uint64_t peltv_addr) |
| |
| int64_t | opal_pci_set_pe (uint64_t phb_id, uint64_t pe_number, uint64_t bus_dev_func, uint8_t bus_compare, uint8_t dev_compare, uint8_t func_compare, uint8_t pe_action) |
| |
| int64_t | opal_pci_set_peltv (uint64_t phb_id, uint32_t parent_pe, uint32_t child_pe, uint8_t state) |
| |
| int64_t | opal_pci_set_mve (uint64_t phb_id, uint32_t mve_number, uint32_t pe_number) |
| |
| int64_t | opal_pci_set_mve_enable (uint64_t phb_id, uint32_t mve_number, uint32_t state) |
| |
| int64_t | opal_pci_get_xive_reissue (uint64_t phb_id, uint32_t xive_number, uint8_t *p_bit, uint8_t *q_bit) |
| |
| int64_t | opal_pci_set_xive_reissue (uint64_t phb_id, uint32_t xive_number, uint8_t p_bit, uint8_t q_bit) |
| |
| int64_t | opal_pci_set_xive_pe (uint64_t phb_id, uint32_t pe_number, uint32_t xive_num) |
| |
| int64_t | opal_get_xive_source (uint64_t phb_id, uint32_t xive_num, int32_t *interrupt_source_number) |
| |
| int64_t | opal_get_msi_32 (uint64_t phb_id, uint32_t mve_number, uint32_t xive_num, uint8_t msi_range, uint32_t *msi_address, uint32_t *message_data) |
| |
| int64_t | opal_get_msi_64 (uint64_t phb_id, uint32_t mve_number, uint32_t xive_num, uint8_t msi_range, uint64_t *msi_address, uint32_t *message_data) |
| |
| int64_t | opal_start_cpu (uint64_t thread_number, uint64_t start_address) |
| |
| int64_t | opal_query_cpu_status (uint64_t thread_number, uint8_t *thread_status) |
| |
| int64_t | opal_write_oppanel (oppanel_line_t *lines, uint64_t num_lines) |
| |
| int64_t | opal_pci_map_pe_dma_window (uint64_t phb_id, uint16_t pe_number, uint16_t window_id, uint16_t tce_levels, uint64_t tce_table_addr, uint64_t tce_table_size, uint64_t tce_page_size) |
| |
| int64_t | opal_pci_map_pe_dma_window_real (uint64_t phb_id, uint16_t pe_number, uint16_t dma_window_number, uint64_t pci_start_addr, uint64_t pci_mem_size) |
| |
| int64_t | opal_pci_reset (uint64_t phb_id, uint8_t reset_scope, uint8_t assert_state) |
| |
| int64_t | opal_pci_get_hub_diag_data (uint64_t hub_id, void *diag_buffer, uint64_t diag_buffer_len) |
| |
| int64_t | opal_pci_get_phb_diag_data (uint64_t phb_id, void *diag_buffer, uint64_t diag_buffer_len) |
| |
| int64_t | opal_pci_fence_phb (uint64_t phb_id) |
| |
| int64_t | opal_pci_reinit (uint64_t phb_id, uint8_t reinit_scope) |
| |
| int64_t | opal_pci_mask_pe_error (uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action) |
| |
| int64_t | opal_set_slot_led_status (uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action) |
| |
| int64_t | opal_get_epow_status (uint64_t *status) |
| |
| int64_t | opal_set_system_attention_led (uint8_t led_action) |
| |
| int | early_init_dt_scan_opal (unsigned long node, const char *uname, int depth, void *data) |
| |
| int | opal_get_chars (uint32_t vtermno, char *buf, int count) |
| |
| int | opal_put_chars (uint32_t vtermno, const char *buf, int total_len) |
| |
| void | hvc_opal_init_early (void) |
| |
| int | opal_set_rtc_time (struct rtc_time *tm) |
| |
| void | opal_get_rtc_time (struct rtc_time *tm) |
| |
| unsigned long | opal_get_boot_time (void) |
| |
| void | opal_nvram_init (void) |
| |
| int | opal_machine_check (struct pt_regs *regs) |
| |
1.8.2