Linux Kernel
3.7.1
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#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/gfp.h>
#include <linux/delay.h>
#include <linux/libata.h>
#include <linux/of_platform.h>
#include <linux/types.h>
#include <asm/cacheflush.h>
#include <asm/prom.h>
#include <asm/mpc52xx.h>
#include <sysdev/bestcomm/bestcomm.h>
#include <sysdev/bestcomm/bestcomm_priv.h>
#include <sysdev/bestcomm/ata.h>
Go to the source code of this file.
Data Structures | |
struct | mpc52xx_ata_timings |
struct | mpc52xx_ata_priv |
struct | mdmaspec |
struct | udmaspec |
struct | mpc52xx_ata |
Macros | |
#define | DRV_NAME "mpc52xx_ata" |
#define | CALC_CLKCYC(c, v) ((((v)+(c)-1)/(c))) |
#define | MPC52xx_ATA_HOSTCONF_SMR 0x80000000UL /* State machine reset */ |
#define | MPC52xx_ATA_HOSTCONF_FR 0x40000000UL /* FIFO Reset */ |
#define | MPC52xx_ATA_HOSTCONF_IE 0x02000000UL /* Enable interrupt in PIO */ |
#define | MPC52xx_ATA_HOSTCONF_IORDY 0x01000000UL /* Drive supports IORDY protocol */ |
#define | MPC52xx_ATA_HOSTSTAT_TIP 0x80000000UL /* Transaction in progress */ |
#define | MPC52xx_ATA_HOSTSTAT_UREP 0x40000000UL /* UDMA Read Extended Pause */ |
#define | MPC52xx_ATA_HOSTSTAT_RERR 0x02000000UL /* Read Error */ |
#define | MPC52xx_ATA_HOSTSTAT_WERR 0x01000000UL /* Write Error */ |
#define | MPC52xx_ATA_FIFOSTAT_EMPTY 0x01 /* FIFO Empty */ |
#define | MPC52xx_ATA_FIFOSTAT_ERROR 0x40 /* FIFO Error */ |
#define | MPC52xx_ATA_DMAMODE_WRITE 0x01 /* Write DMA */ |
#define | MPC52xx_ATA_DMAMODE_READ 0x02 /* Read DMA */ |
#define | MPC52xx_ATA_DMAMODE_UDMA 0x04 /* UDMA enabled */ |
#define | MPC52xx_ATA_DMAMODE_IE 0x08 /* Enable drive interrupt to CPU in DMA mode */ |
#define | MPC52xx_ATA_DMAMODE_FE 0x10 /* FIFO Flush enable in Rx mode */ |
#define | MPC52xx_ATA_DMAMODE_FR 0x20 /* FIFO Reset */ |
#define | MPC52xx_ATA_DMAMODE_HUT 0x40 /* Host UDMA burst terminate */ |
#define | MAX_DMA_BUFFERS 128 |
#define | MAX_DMA_BUFFER_SIZE 0x20000u |
Functions | |
module_platform_driver (mpc52xx_ata_of_platform_driver) | |
MODULE_AUTHOR ("Sylvain Munaut <tnt@246tNt.com>") | |
MODULE_DESCRIPTION ("Freescale MPC52xx IDE/ATA libata driver") | |
MODULE_LICENSE ("GPL") | |
MODULE_DEVICE_TABLE (of, mpc52xx_ata_of_match) | |
#define DRV_NAME "mpc52xx_ata" |
Definition at line 33 of file pata_mpc52xx.c.
#define MAX_DMA_BUFFER_SIZE 0x20000u |
Definition at line 202 of file pata_mpc52xx.c.
#define MAX_DMA_BUFFERS 128 |
Definition at line 201 of file pata_mpc52xx.c.
#define MPC52xx_ATA_DMAMODE_FE 0x10 /* FIFO Flush enable in Rx mode */ |
Definition at line 197 of file pata_mpc52xx.c.
#define MPC52xx_ATA_DMAMODE_FR 0x20 /* FIFO Reset */ |
Definition at line 198 of file pata_mpc52xx.c.
#define MPC52xx_ATA_DMAMODE_HUT 0x40 /* Host UDMA burst terminate */ |
Definition at line 199 of file pata_mpc52xx.c.
#define MPC52xx_ATA_DMAMODE_IE 0x08 /* Enable drive interrupt to CPU in DMA mode */ |
Definition at line 196 of file pata_mpc52xx.c.
#define MPC52xx_ATA_DMAMODE_READ 0x02 /* Read DMA */ |
Definition at line 194 of file pata_mpc52xx.c.
#define MPC52xx_ATA_DMAMODE_UDMA 0x04 /* UDMA enabled */ |
Definition at line 195 of file pata_mpc52xx.c.
#define MPC52xx_ATA_DMAMODE_WRITE 0x01 /* Write DMA */ |
Definition at line 193 of file pata_mpc52xx.c.
#define MPC52xx_ATA_FIFOSTAT_EMPTY 0x01 /* FIFO Empty */ |
Definition at line 190 of file pata_mpc52xx.c.
#define MPC52xx_ATA_FIFOSTAT_ERROR 0x40 /* FIFO Error */ |
Definition at line 191 of file pata_mpc52xx.c.
#define MPC52xx_ATA_HOSTCONF_FR 0x40000000UL /* FIFO Reset */ |
Definition at line 181 of file pata_mpc52xx.c.
#define MPC52xx_ATA_HOSTCONF_IE 0x02000000UL /* Enable interrupt in PIO */ |
Definition at line 182 of file pata_mpc52xx.c.
#define MPC52xx_ATA_HOSTCONF_IORDY 0x01000000UL /* Drive supports IORDY protocol */ |
Definition at line 183 of file pata_mpc52xx.c.
#define MPC52xx_ATA_HOSTCONF_SMR 0x80000000UL /* State machine reset */ |
Definition at line 180 of file pata_mpc52xx.c.
#define MPC52xx_ATA_HOSTSTAT_RERR 0x02000000UL /* Read Error */ |
Definition at line 187 of file pata_mpc52xx.c.
#define MPC52xx_ATA_HOSTSTAT_TIP 0x80000000UL /* Transaction in progress */ |
Definition at line 185 of file pata_mpc52xx.c.
#define MPC52xx_ATA_HOSTSTAT_UREP 0x40000000UL /* UDMA Read Extended Pause */ |
Definition at line 186 of file pata_mpc52xx.c.
#define MPC52xx_ATA_HOSTSTAT_WERR 0x01000000UL /* Write Error */ |
Definition at line 188 of file pata_mpc52xx.c.
MODULE_AUTHOR | ( | "Sylvain Munaut <tnt@246tNt.com>" | ) |
MODULE_DEVICE_TABLE | ( | of | , |
mpc52xx_ata_of_match | |||
) |
MODULE_LICENSE | ( | "GPL" | ) |
module_platform_driver | ( | mpc52xx_ata_of_platform_driver | ) |