patch_ca0132.c File Reference

#include <linux/init.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/mutex.h>
#include <linux/module.h>
#include <sound/core.h>
#include "hda_codec.h"
#include "hda_local.h"
#include "hda_auto_parser.h"

Go to the source code of this file.

Data Structures
struct	ca0132_spec

Macros
#define	WIDGET_CHIP_CTRL   0x15
#define	WIDGET_DSP_CTRL   0x16
#define	WUH_MEM_CONNID   10
#define	DSP_MEM_CONNID   16
#define	add_out_switch(codec, nid, pfx)   _add_switch(codec, nid, pfx, 3, 0)
#define	add_out_volume(codec, nid, pfx)   _add_volume(codec, nid, pfx, 3, 0)
#define	add_in_switch(codec, nid, pfx)   _add_switch(codec, nid, pfx, 3, 1)
#define	add_in_volume(codec, nid, pfx)   _add_volume(codec, nid, pfx, 3, 1)
#define	add_mono_switch(codec, nid, pfx, chan)   _add_switch(codec, nid, pfx, chan, 0)
#define	add_mono_volume(codec, nid, pfx, chan)   _add_volume(codec, nid, pfx, chan, 0)
#define	add_in_mono_switch(codec, nid, pfx, chan)   _add_switch(codec, nid, pfx, chan, 1)
#define	add_in_mono_volume(codec, nid, pfx, chan)   _add_volume(codec, nid, pfx, chan, 1)
#define	REG_CODEC_MUTE   0x18b014
#define	REG_CODEC_HP_VOL_L   0x18b070
#define	REG_CODEC_HP_VOL_R   0x18b074

Enumerations
enum	hda_cmd_vendor_io {   VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100, VENDOR_DSPIO_STATUS = 0xF01, VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,   VENDOR_DSPIO_SCP_READ_DATA = 0xF02, VENDOR_DSPIO_DSP_INIT = 0x703, VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704, VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,   VENDOR_CHIPIO_ADDRESS_LOW = 0x000, VENDOR_CHIPIO_ADDRESS_HIGH = 0x100, VENDOR_CHIPIO_STREAM_FORMAT = 0x200, VENDOR_CHIPIO_DATA_LOW = 0x300,   VENDOR_CHIPIO_DATA_HIGH = 0x400, VENDOR_CHIPIO_GET_PARAMETER = 0xF00, VENDOR_CHIPIO_STATUS = 0xF01, VENDOR_CHIPIO_HIC_POST_READ = 0x702,   VENDOR_CHIPIO_HIC_READ_DATA = 0xF03, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A, VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C, VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,   VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D, VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E, VENDOR_CHIPIO_FLAG_SET = 0x70F, VENDOR_CHIPIO_FLAGS_GET = 0xF0F,   VENDOR_CHIPIO_PARAMETER_SET = 0x710, VENDOR_CHIPIO_PARAMETER_GET = 0xF10, VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711, VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,   VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12, VENDOR_CHIPIO_PORT_FREE_SET = 0x713, VENDOR_CHIPIO_PARAMETER_EX_ID_GET = 0xF17, VENDOR_CHIPIO_PARAMETER_EX_ID_SET = 0x717,   VENDOR_CHIPIO_PARAMETER_EX_VALUE_GET = 0xF18, VENDOR_CHIPIO_PARAMETER_EX_VALUE_SET = 0x718 }
enum	control_flag_id {   CONTROL_FLAG_C_MGR = 0, CONTROL_FLAG_DMA = 1, CONTROL_FLAG_IDLE_ENABLE = 2, CONTROL_FLAG_TRACKER = 3,   CONTROL_FLAG_SPDIF2OUT = 4, CONTROL_FLAG_DMIC = 5, CONTROL_FLAG_ADC_B_96KHZ = 6, CONTROL_FLAG_ADC_C_96KHZ = 7,   CONTROL_FLAG_DAC_96KHZ = 8, CONTROL_FLAG_DSP_96KHZ = 9, CONTROL_FLAG_SRC_CLOCK_196MHZ = 10, CONTROL_FLAG_SRC_RATE_96KHZ = 11,   CONTROL_FLAG_DECODE_LOOP = 12, CONTROL_FLAG_DAC1_DEEMPHASIS = 13, CONTROL_FLAG_DAC2_DEEMPHASIS = 14, CONTROL_FLAG_DAC3_DEEMPHASIS = 15,   CONTROL_FLAG_ADC_B_HIGH_PASS = 16, CONTROL_FLAG_ADC_C_HIGH_PASS = 17, CONTROL_FLAG_PORT_A_COMMON_MODE = 18, CONTROL_FLAG_PORT_D_COMMON_MODE = 19,   CONTROL_FLAG_PORT_A_10KOHM_LOAD = 20, CONTROL_FLAG_PORT_D_10K0HM_LOAD = 21, CONTROL_FLAG_ASI_96KHZ = 22, CONTROL_FLAG_DACS_CONTROL_PORTS = 23,   CONTROL_FLAG_CONTROL_STOP_OK_ENABLE = 24, CONTROL_FLAGS_MAX = (CONTROL_FLAG_CONTROL_STOP_OK_ENABLE+1) }
enum	control_parameter_id {   CONTROL_PARAM_SPDIF1_SOURCE = 2, CONTROL_PARAM_STREAM_ID = 24, CONTROL_PARAM_STREAM_SOURCE_CONN_POINT = 25, CONTROL_PARAM_STREAM_DEST_CONN_POINT = 26,   CONTROL_PARAM_STREAMS_CHANNELS = 27, CONTROL_PARAM_STREAM_CONTROL = 28, CONTROL_PARAM_CONN_POINT_ID = 29, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE = 30,   CONTROL_PARAM_NODE_ID = 31 }
enum	hda_vendor_status_dspio { VENDOR_STATUS_DSPIO_OK = 0x00, VENDOR_STATUS_DSPIO_BUSY = 0x01, VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02, VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03 }
enum	hda_vendor_status_chipio { VENDOR_STATUS_CHIPIO_OK = 0x00, VENDOR_STATUS_CHIPIO_BUSY = 0x01 }
enum	ca0132_sample_rate {   SR_6_000 = 0x00, SR_8_000 = 0x01, SR_9_600 = 0x02, SR_11_025 = 0x03,   SR_16_000 = 0x04, SR_22_050 = 0x05, SR_24_000 = 0x06, SR_32_000 = 0x07,   SR_44_100 = 0x08, SR_48_000 = 0x09, SR_88_200 = 0x0A, SR_96_000 = 0x0B,   SR_144_000 = 0x0C, SR_176_400 = 0x0D, SR_192_000 = 0x0E, SR_384_000 = 0x0F,   SR_COUNT = 0x10, SR_RATE_UNKNOWN = 0x1F }
enum	get_set { IS_SET = 0, IS_GET = 1 }

Functions
	MODULE_ALIAS ("snd-hda-codec-id:11020011")
	MODULE_LICENSE ("GPL")
	MODULE_DESCRIPTION ("Creative CA0132, CA0132 HD-audio codec")

Macro Definition Documentation

#define add_in_mono_switch	(		codec,
			nid,
			pfx,
			chan
	)		_add_switch(codec, nid, pfx, chan, 1)

Definition at line 309 of file patch_ca0132.c.

#define add_in_mono_volume	(		codec,
			nid,
			pfx,
			chan
	)		_add_volume(codec, nid, pfx, chan, 1)

Definition at line 311 of file patch_ca0132.c.

#define add_in_switch	(		codec,
			nid,
			pfx
	)		_add_switch(codec, nid, pfx, 3, 1)

Definition at line 303 of file patch_ca0132.c.

#define add_in_volume	(		codec,
			nid,
			pfx
	)		_add_volume(codec, nid, pfx, 3, 1)

Definition at line 304 of file patch_ca0132.c.

#define add_mono_switch	(		codec,
			nid,
			pfx,
			chan
	)		_add_switch(codec, nid, pfx, chan, 0)

Definition at line 305 of file patch_ca0132.c.

#define add_mono_volume	(		codec,
			nid,
			pfx,
			chan
	)		_add_volume(codec, nid, pfx, chan, 0)

Definition at line 307 of file patch_ca0132.c.

#define add_out_switch	(		codec,
			nid,
			pfx
	)		_add_switch(codec, nid, pfx, 3, 0)

Definition at line 301 of file patch_ca0132.c.

#define add_out_volume	(		codec,
			nid,
			pfx
	)		_add_volume(codec, nid, pfx, 3, 0)

Definition at line 302 of file patch_ca0132.c.

#define DSP_MEM_CONNID   16

Definition at line 39 of file patch_ca0132.c.

#define REG_CODEC_HP_VOL_L   0x18b070

Definition at line 620 of file patch_ca0132.c.

#define REG_CODEC_HP_VOL_R   0x18b074

Definition at line 621 of file patch_ca0132.c.

#define REG_CODEC_MUTE   0x18b014

Definition at line 619 of file patch_ca0132.c.

#define WIDGET_CHIP_CTRL   0x15

Definition at line 35 of file patch_ca0132.c.

#define WIDGET_DSP_CTRL   0x16

Definition at line 36 of file patch_ca0132.c.

#define WUH_MEM_CONNID   10

Definition at line 38 of file patch_ca0132.c.

Enumeration Type Documentation

enum ca0132_sample_rate

Enumerator:

SR_6_000
SR_8_000
SR_9_600
SR_11_025
SR_16_000
SR_22_050
SR_24_000
SR_32_000
SR_44_100
SR_48_000
SR_88_200
SR_96_000
SR_144_000
SR_176_400
SR_192_000
SR_384_000
SR_COUNT
SR_RATE_UNKNOWN

Definition at line 205 of file patch_ca0132.c.

enum control_flag_id

Enumerator:

CONTROL_FLAG_C_MGR
CONTROL_FLAG_DMA
CONTROL_FLAG_IDLE_ENABLE
CONTROL_FLAG_TRACKER
CONTROL_FLAG_SPDIF2OUT
CONTROL_FLAG_DMIC
CONTROL_FLAG_ADC_B_96KHZ
CONTROL_FLAG_ADC_C_96KHZ
CONTROL_FLAG_DAC_96KHZ
CONTROL_FLAG_DSP_96KHZ
CONTROL_FLAG_SRC_CLOCK_196MHZ
CONTROL_FLAG_SRC_RATE_96KHZ
CONTROL_FLAG_DECODE_LOOP
CONTROL_FLAG_DAC1_DEEMPHASIS
CONTROL_FLAG_DAC2_DEEMPHASIS
CONTROL_FLAG_DAC3_DEEMPHASIS
CONTROL_FLAG_ADC_B_HIGH_PASS
CONTROL_FLAG_ADC_C_HIGH_PASS
CONTROL_FLAG_PORT_A_COMMON_MODE
CONTROL_FLAG_PORT_D_COMMON_MODE
CONTROL_FLAG_PORT_A_10KOHM_LOAD
CONTROL_FLAG_PORT_D_10K0HM_LOAD
CONTROL_FLAG_ASI_96KHZ
CONTROL_FLAG_DACS_CONTROL_PORTS
CONTROL_FLAG_CONTROL_STOP_OK_ENABLE
CONTROL_FLAGS_MAX

Definition at line 90 of file patch_ca0132.c.

enum control_parameter_id

Enumerator:

CONTROL_PARAM_SPDIF1_SOURCE
CONTROL_PARAM_STREAM_ID
CONTROL_PARAM_STREAM_SOURCE_CONN_POINT
CONTROL_PARAM_STREAM_DEST_CONN_POINT
CONTROL_PARAM_STREAMS_CHANNELS
CONTROL_PARAM_STREAM_CONTROL
CONTROL_PARAM_CONN_POINT_ID
CONTROL_PARAM_CONN_POINT_SAMPLE_RATE
CONTROL_PARAM_NODE_ID

Definition at line 148 of file patch_ca0132.c.

enum get_set

Enumerator:

IS_SET
IS_GET

Definition at line 231 of file patch_ca0132.c.

enum hda_cmd_vendor_io

Enumerator:

VENDOR_DSPIO_SCP_WRITE_DATA_LOW
VENDOR_DSPIO_SCP_WRITE_DATA_HIGH
VENDOR_DSPIO_STATUS
VENDOR_DSPIO_SCP_POST_READ_DATA
VENDOR_DSPIO_SCP_READ_DATA
VENDOR_DSPIO_DSP_INIT
VENDOR_DSPIO_SCP_POST_COUNT_QUERY
VENDOR_DSPIO_SCP_READ_COUNT
VENDOR_CHIPIO_ADDRESS_LOW
VENDOR_CHIPIO_ADDRESS_HIGH
VENDOR_CHIPIO_STREAM_FORMAT
VENDOR_CHIPIO_DATA_LOW
VENDOR_CHIPIO_DATA_HIGH
VENDOR_CHIPIO_GET_PARAMETER
VENDOR_CHIPIO_STATUS
VENDOR_CHIPIO_HIC_POST_READ
VENDOR_CHIPIO_HIC_READ_DATA
VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE
VENDOR_CHIPIO_PLL_PMU_WRITE
VENDOR_CHIPIO_PLL_PMU_READ
VENDOR_CHIPIO_8051_ADDRESS_LOW
VENDOR_CHIPIO_8051_ADDRESS_HIGH
VENDOR_CHIPIO_FLAG_SET
VENDOR_CHIPIO_FLAGS_GET
VENDOR_CHIPIO_PARAMETER_SET
VENDOR_CHIPIO_PARAMETER_GET
VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET
VENDOR_CHIPIO_PORT_ALLOC_SET
VENDOR_CHIPIO_PORT_ALLOC_GET
VENDOR_CHIPIO_PORT_FREE_SET
VENDOR_CHIPIO_PARAMETER_EX_ID_GET
VENDOR_CHIPIO_PARAMETER_EX_ID_SET
VENDOR_CHIPIO_PARAMETER_EX_VALUE_GET
VENDOR_CHIPIO_PARAMETER_EX_VALUE_SET

Definition at line 41 of file patch_ca0132.c.

enum hda_vendor_status_chipio

Enumerator:

VENDOR_STATUS_CHIPIO_OK
VENDOR_STATUS_CHIPIO_BUSY

Definition at line 195 of file patch_ca0132.c.

enum hda_vendor_status_dspio

Enumerator:

VENDOR_STATUS_DSPIO_OK
VENDOR_STATUS_DSPIO_BUSY
VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL
VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY

Definition at line 181 of file patch_ca0132.c.

Function Documentation

MODULE_ALIAS

(

"snd-hda-codec-id:11020011"

)

MODULE_DESCRIPTION	(	"Creative	CA0132,
		CA0132 HD-audio codec"
	)

MODULE_LICENSE

(

"GPL"

)