Linux Kernel
3.7.1
|
#include <mach/pcm027.h>
Go to the source code of this file.
Macros | |
#define | PCM990_CTRL_INT_IRQ_GPIO 9 |
#define | PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO) |
#define | PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
#define | PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ |
#define | PCM990_CTRL_SIZE (1*1024*1024) |
#define | PCM990_CTRL_PWR_IRQ_GPIO 14 |
#define | PCM990_CTRL_PWR_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO) |
#define | PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
#define | PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */ |
#define | PCM990_CTRL_SYSRES 0x0001 /* System RESET REGISTER */ |
#define | PCM990_CTRL_RESOUT 0x0002 /* RESETOUT Enable REGISTER */ |
#define | PCM990_CTRL_RESGPIO 0x0004 /* RESETGPIO Enable REGISTER */ |
#define | PCM990_CTRL_REG1 0x0002 /* Power REGISTER */ |
#define | PCM990_CTRL_5VOFF 0x0001 /* Disable 5V Regulators */ |
#define | PCM990_CTRL_CANPWR 0x0004 /* Enable CANPWR ADUM */ |
#define | PCM990_CTRL_PM_5V 0x0008 /* Read 5V OK */ |
#define | PCM990_CTRL_REG2 0x0004 /* LED REGISTER */ |
#define | PCM990_CTRL_LEDPWR 0x0001 /* POWER LED enable */ |
#define | PCM990_CTRL_LEDBAS 0x0002 /* BASIS LED enable */ |
#define | PCM990_CTRL_LEDUSR 0x0004 /* USER LED enable */ |
#define | PCM990_CTRL_REG3 0x0006 /* LCD CTRL REGISTER 3 */ |
#define | PCM990_CTRL_LCDPWR 0x0001 /* RW LCD Power on */ |
#define | PCM990_CTRL_LCDON 0x0002 /* RW LCD Latch on */ |
#define | PCM990_CTRL_LCDPOS1 0x0004 /* RW POS 1 */ |
#define | PCM990_CTRL_LCDPOS2 0x0008 /* RW POS 2 */ |
#define | PCM990_CTRL_REG4 0x0008 /* MMC1 CTRL REGISTER 4 */ |
#define | PCM990_CTRL_MMC1PWR 0x0001 /* RW MMC1 Power on */ |
#define | PCM990_CTRL_REG5 0x000A /* MMC2 CTRL REGISTER 5 */ |
#define | PCM990_CTRL_MMC2PWR 0x0001 /* RW MMC2 Power on */ |
#define | PCM990_CTRL_MMC2LED 0x0002 /* RW MMC2 LED */ |
#define | PCM990_CTRL_MMC2DE 0x0004 /* R MMC2 Card detect */ |
#define | PCM990_CTRL_MMC2WP 0x0008 /* R MMC2 Card write protect */ |
#define | PCM990_CTRL_INTSETCLR 0x000C /* Interrupt Clear REGISTER */ |
#define | PCM990_CTRL_INTC0 0x0001 /* Clear Reg BT Detect */ |
#define | PCM990_CTRL_INTC1 0x0002 /* Clear Reg FR RI */ |
#define | PCM990_CTRL_INTC2 0x0004 /* Clear Reg MMC1 Detect */ |
#define | PCM990_CTRL_INTC3 0x0008 /* Clear Reg PM_5V off */ |
#define | PCM990_CTRL_INTMSKENA 0x000E /* Interrupt Enable REGISTER */ |
#define | PCM990_CTRL_ENAINT0 0x0001 /* Enable Int BT Detect */ |
#define | PCM990_CTRL_ENAINT1 0x0002 /* Enable Int FR RI */ |
#define | PCM990_CTRL_ENAINT2 0x0004 /* Enable Int MMC1 Detect */ |
#define | PCM990_CTRL_ENAINT3 0x0008 /* Enable Int PM_5V off */ |
#define | PCM990_CTRL_REG8 0x0014 /* Uart REGISTER */ |
#define | PCM990_CTRL_FFSD 0x0001 /* BT Uart Enable */ |
#define | PCM990_CTRL_BTSD 0x0002 /* FF Uart Enable */ |
#define | PCM990_CTRL_FFRI 0x0004 /* FF Uart RI detect */ |
#define | PCM990_CTRL_BTRX 0x0008 /* BT Uart Rx detect */ |
#define | PCM990_CTRL_REG9 0x0010 /* AC97 Flash REGISTER */ |
#define | PCM990_CTRL_FLWP 0x0001 /* pC Flash Write Protect */ |
#define | PCM990_CTRL_FLDIS 0x0002 /* pC Flash Disable */ |
#define | PCM990_CTRL_AC97ENA 0x0004 /* Enable AC97 Expansion */ |
#define | PCM990_CTRL_REG10 0x0012 /* GPS-REGISTER */ |
#define | PCM990_CTRL_GPSPWR 0x0004 /* GPS-Modul Power on */ |
#define | PCM990_CTRL_GPSENA 0x0008 /* GPS-Modul Enable */ |
#define | PCM990_CTRL_REG11 0x0014 /* Accu REGISTER */ |
#define | PCM990_CTRL_ACENA 0x0001 /* Charge Enable */ |
#define | PCM990_CTRL_ACSEL 0x0002 /* Charge Akku -> DC Enable */ |
#define | PCM990_CTRL_ACPRES 0x0004 /* DC Present */ |
#define | PCM990_CTRL_ACALARM 0x0008 /* Error Akku */ |
#define | PCM990_IDE_IRQ_GPIO 13 |
#define | PCM990_IDE_IRQ PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO) |
#define | PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
#define | PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ |
#define | PCM990_IDE_PLD_BASE 0xee000000 |
#define | PCM990_IDE_PLD_SIZE (1*1024*1024) |
#define | PCM990_IDE_PLD_REG0 0x1000 /* OFFSET IDE REGISTER 0 */ |
#define | PCM990_IDE_PM5V 0x0004 /* R System VCC_5V */ |
#define | PCM990_IDE_STBY 0x0008 /* R System StandBy */ |
#define | PCM990_IDE_PLD_REG1 0x1002 /* OFFSET IDE REGISTER 1 */ |
#define | PCM990_IDE_IDEMODE 0x0001 /* R TrueIDE Mode */ |
#define | PCM990_IDE_DMAENA 0x0004 /* RW DMA Enable */ |
#define | PCM990_IDE_DMA1_0 0x0008 /* RW 1=DREQ1 0=DREQ0 */ |
#define | PCM990_IDE_PLD_REG2 0x1004 /* OFFSET IDE REGISTER 2 */ |
#define | PCM990_IDE_RESENA 0x0001 /* RW IDE Reset Bit enable */ |
#define | PCM990_IDE_RES 0x0002 /* RW IDE Reset Bit */ |
#define | PCM990_IDE_RDY 0x0008 /* RDY */ |
#define | PCM990_IDE_PLD_REG3 0x1006 /* OFFSET IDE REGISTER 3 */ |
#define | PCM990_IDE_IDEOE 0x0001 /* RW Latch on Databus */ |
#define | PCM990_IDE_IDEON 0x0002 /* RW Latch on Control Address */ |
#define | PCM990_IDE_IDEIN 0x0004 /* RW Latch on Interrupt usw. */ |
#define | PCM990_IDE_PLD_REG4 0x1008 /* OFFSET IDE REGISTER 4 */ |
#define | PCM990_IDE_PWRENA 0x0001 /* RW IDE Power enable */ |
#define | PCM990_IDE_5V 0x0002 /* R IDE Power 5V */ |
#define | PCM990_IDE_PWG 0x0008 /* R IDE Power is on */ |
#define | PCM990_IDE_PLD_P2V(x) ((x) - PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_BASE) |
#define | PCM990_IDE_PLD_V2P(x) ((x) - PCM990_IDE_PLD_BASE + PCM990_IDE_PLD_PHYS) |
#define | PCM990_CF_IRQ_GPIO 11 |
#define | PCM990_CF_IRQ PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO) |
#define | PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
#define | PCM990_CF_CD_GPIO 12 |
#define | PCM990_CF_CD PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO) |
#define | PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING |
#define | PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ |
#define | PCM990_CF_PLD_REG0 0x1000 /* OFFSET CF REGISTER 0 */ |
#define | PCM990_CF_REG0_LED 0x0001 /* RW LED on */ |
#define | PCM990_CF_REG0_BLK 0x0002 /* RW LED flash when access */ |
#define | PCM990_CF_REG0_PM5V 0x0004 /* R System VCC_5V enable */ |
#define | PCM990_CF_REG0_STBY 0x0008 /* R System StandBy */ |
#define | PCM990_CF_PLD_REG1 0x1002 /* OFFSET CF REGISTER 1 */ |
#define | PCM990_CF_REG1_IDEMODE 0x0001 /* RW CF card run as TrueIDE */ |
#define | PCM990_CF_REG1_CF0 0x0002 /* RW CF card at ADDR 0x28000000 */ |
#define | PCM990_CF_PLD_REG2 0x1004 /* OFFSET CF REGISTER 2 */ |
#define | PCM990_CF_REG2_RES 0x0002 /* RW CF RESET BIT */ |
#define | PCM990_CF_REG2_RDYENA 0x0004 /* RW Enable CF_RDY */ |
#define | PCM990_CF_REG2_RDY 0x0008 /* R CF_RDY auf PWAIT */ |
#define | PCM990_CF_PLD_REG3 0x1006 /* OFFSET CF REGISTER 3 */ |
#define | PCM990_CF_REG3_CFOE 0x0001 /* RW Latch on Databus */ |
#define | PCM990_CF_REG3_CFON 0x0002 /* RW Latch on Control Address */ |
#define | PCM990_CF_REG3_CFIN 0x0004 /* RW Latch on Interrupt usw. */ |
#define | PCM990_CF_REG3_CFCD 0x0008 /* RW Latch on CD1/2 VS1/2 usw */ |
#define | PCM990_CF_PLD_REG4 0x1008 /* OFFSET CF REGISTER 4 */ |
#define | PCM990_CF_REG4_PWRENA 0x0001 /* RW CF Power on (CD1/2 = "00") */ |
#define | PCM990_CF_REG4_5_3V 0x0002 /* RW 1 = 5V CF_VCC 0 = 3 V CF_VCC */ |
#define | PCM990_CF_REG4_3B 0x0004 /* RW 3.0V Backup from VCC (5_3V=0) */ |
#define | PCM990_CF_REG4_PWG 0x0008 /* R CF-Power is on */ |
#define | PCM990_CF_PLD_REG5 0x100A /* OFFSET CF REGISTER 5 */ |
#define | PCM990_CF_REG5_BVD1 0x0001 /* R CF /BVD1 */ |
#define | PCM990_CF_REG5_BVD2 0x0002 /* R CF /BVD2 */ |
#define | PCM990_CF_REG5_VS1 0x0004 /* R CF /VS1 */ |
#define | PCM990_CF_REG5_VS2 0x0008 /* R CF /VS2 */ |
#define | PCM990_CF_PLD_REG6 0x100C /* OFFSET CF REGISTER 6 */ |
#define | PCM990_CF_REG6_CD1 0x0001 /* R CF Card_Detect1 */ |
#define | PCM990_CF_REG6_CD2 0x0002 /* R CF Card_Detect2 */ |
#define | PCM990_AC97_IRQ_GPIO 10 |
#define | PCM990_AC97_IRQ PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO) |
#define | PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
#define | PCM990_MMC0_IRQ_GPIO 9 |
#define | PCM990_MMC0_IRQ PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO) |
#define | PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING |
#define | PCM990_USB_OVERCURRENT (88 | GPIO_ALT_FN_1_IN) |
#define | PCM990_USB_PWR_EN (89 | GPIO_ALT_FN_2_OUT) |
#define PCM990_AC97_IRQ PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO) |
Definition at line 197 of file pcm990_baseboard.h.
#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
Definition at line 198 of file pcm990_baseboard.h.
#define PCM990_AC97_IRQ_GPIO 10 |
Definition at line 196 of file pcm990_baseboard.h.
#define PCM990_CF_CD PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO) |
Definition at line 150 of file pcm990_baseboard.h.
#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING |
Definition at line 151 of file pcm990_baseboard.h.
#define PCM990_CF_CD_GPIO 12 |
Definition at line 149 of file pcm990_baseboard.h.
#define PCM990_CF_IRQ PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO) |
Definition at line 146 of file pcm990_baseboard.h.
#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
Definition at line 147 of file pcm990_baseboard.h.
#define PCM990_CF_IRQ_GPIO 11 |
Definition at line 145 of file pcm990_baseboard.h.
#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ |
Definition at line 153 of file pcm990_baseboard.h.
#define PCM990_CF_PLD_REG0 0x1000 /* OFFSET CF REGISTER 0 */ |
Definition at line 156 of file pcm990_baseboard.h.
#define PCM990_CF_PLD_REG1 0x1002 /* OFFSET CF REGISTER 1 */ |
Definition at line 162 of file pcm990_baseboard.h.
#define PCM990_CF_PLD_REG2 0x1004 /* OFFSET CF REGISTER 2 */ |
Definition at line 166 of file pcm990_baseboard.h.
#define PCM990_CF_PLD_REG3 0x1006 /* OFFSET CF REGISTER 3 */ |
Definition at line 171 of file pcm990_baseboard.h.
#define PCM990_CF_PLD_REG4 0x1008 /* OFFSET CF REGISTER 4 */ |
Definition at line 177 of file pcm990_baseboard.h.
#define PCM990_CF_PLD_REG5 0x100A /* OFFSET CF REGISTER 5 */ |
Definition at line 183 of file pcm990_baseboard.h.
#define PCM990_CF_PLD_REG6 0x100C /* OFFSET CF REGISTER 6 */ |
Definition at line 189 of file pcm990_baseboard.h.
#define PCM990_CF_REG0_BLK 0x0002 /* RW LED flash when access */ |
Definition at line 158 of file pcm990_baseboard.h.
#define PCM990_CF_REG0_LED 0x0001 /* RW LED on */ |
Definition at line 157 of file pcm990_baseboard.h.
#define PCM990_CF_REG0_PM5V 0x0004 /* R System VCC_5V enable */ |
Definition at line 159 of file pcm990_baseboard.h.
#define PCM990_CF_REG0_STBY 0x0008 /* R System StandBy */ |
Definition at line 160 of file pcm990_baseboard.h.
#define PCM990_CF_REG1_CF0 0x0002 /* RW CF card at ADDR 0x28000000 */ |
Definition at line 164 of file pcm990_baseboard.h.
#define PCM990_CF_REG1_IDEMODE 0x0001 /* RW CF card run as TrueIDE */ |
Definition at line 163 of file pcm990_baseboard.h.
#define PCM990_CF_REG2_RDY 0x0008 /* R CF_RDY auf PWAIT */ |
Definition at line 169 of file pcm990_baseboard.h.
#define PCM990_CF_REG2_RDYENA 0x0004 /* RW Enable CF_RDY */ |
Definition at line 168 of file pcm990_baseboard.h.
#define PCM990_CF_REG2_RES 0x0002 /* RW CF RESET BIT */ |
Definition at line 167 of file pcm990_baseboard.h.
#define PCM990_CF_REG3_CFCD 0x0008 /* RW Latch on CD1/2 VS1/2 usw */ |
Definition at line 175 of file pcm990_baseboard.h.
#define PCM990_CF_REG3_CFIN 0x0004 /* RW Latch on Interrupt usw. */ |
Definition at line 174 of file pcm990_baseboard.h.
#define PCM990_CF_REG3_CFOE 0x0001 /* RW Latch on Databus */ |
Definition at line 172 of file pcm990_baseboard.h.
#define PCM990_CF_REG3_CFON 0x0002 /* RW Latch on Control Address */ |
Definition at line 173 of file pcm990_baseboard.h.
#define PCM990_CF_REG4_3B 0x0004 /* RW 3.0V Backup from VCC (5_3V=0) */ |
Definition at line 180 of file pcm990_baseboard.h.
#define PCM990_CF_REG4_5_3V 0x0002 /* RW 1 = 5V CF_VCC 0 = 3 V CF_VCC */ |
Definition at line 179 of file pcm990_baseboard.h.
#define PCM990_CF_REG4_PWG 0x0008 /* R CF-Power is on */ |
Definition at line 181 of file pcm990_baseboard.h.
#define PCM990_CF_REG4_PWRENA 0x0001 /* RW CF Power on (CD1/2 = "00") */ |
Definition at line 178 of file pcm990_baseboard.h.
#define PCM990_CF_REG5_BVD1 0x0001 /* R CF /BVD1 */ |
Definition at line 184 of file pcm990_baseboard.h.
#define PCM990_CF_REG5_BVD2 0x0002 /* R CF /BVD2 */ |
Definition at line 185 of file pcm990_baseboard.h.
#define PCM990_CF_REG5_VS1 0x0004 /* R CF /VS1 */ |
Definition at line 186 of file pcm990_baseboard.h.
#define PCM990_CF_REG5_VS2 0x0008 /* R CF /VS2 */ |
Definition at line 187 of file pcm990_baseboard.h.
#define PCM990_CF_REG6_CD1 0x0001 /* R CF Card_Detect1 */ |
Definition at line 190 of file pcm990_baseboard.h.
#define PCM990_CF_REG6_CD2 0x0002 /* R CF Card_Detect2 */ |
Definition at line 191 of file pcm990_baseboard.h.
#define PCM990_CTRL_5VOFF 0x0001 /* Disable 5V Regulators */ |
Definition at line 47 of file pcm990_baseboard.h.
#define PCM990_CTRL_AC97ENA 0x0004 /* Enable AC97 Expansion */ |
Definition at line 92 of file pcm990_baseboard.h.
#define PCM990_CTRL_ACALARM 0x0008 /* Error Akku */ |
Definition at line 102 of file pcm990_baseboard.h.
#define PCM990_CTRL_ACENA 0x0001 /* Charge Enable */ |
Definition at line 99 of file pcm990_baseboard.h.
#define PCM990_CTRL_ACPRES 0x0004 /* DC Present */ |
Definition at line 101 of file pcm990_baseboard.h.
#define PCM990_CTRL_ACSEL 0x0002 /* Charge Akku -> DC Enable */ |
Definition at line 100 of file pcm990_baseboard.h.
#define PCM990_CTRL_BTRX 0x0008 /* BT Uart Rx detect */ |
Definition at line 87 of file pcm990_baseboard.h.
#define PCM990_CTRL_BTSD 0x0002 /* FF Uart Enable */ |
Definition at line 85 of file pcm990_baseboard.h.
#define PCM990_CTRL_CANPWR 0x0004 /* Enable CANPWR ADUM */ |
Definition at line 48 of file pcm990_baseboard.h.
#define PCM990_CTRL_ENAINT0 0x0001 /* Enable Int BT Detect */ |
Definition at line 78 of file pcm990_baseboard.h.
#define PCM990_CTRL_ENAINT1 0x0002 /* Enable Int FR RI */ |
Definition at line 79 of file pcm990_baseboard.h.
#define PCM990_CTRL_ENAINT2 0x0004 /* Enable Int MMC1 Detect */ |
Definition at line 80 of file pcm990_baseboard.h.
#define PCM990_CTRL_ENAINT3 0x0008 /* Enable Int PM_5V off */ |
Definition at line 81 of file pcm990_baseboard.h.
#define PCM990_CTRL_FFRI 0x0004 /* FF Uart RI detect */ |
Definition at line 86 of file pcm990_baseboard.h.
#define PCM990_CTRL_FFSD 0x0001 /* BT Uart Enable */ |
Definition at line 84 of file pcm990_baseboard.h.
#define PCM990_CTRL_FLDIS 0x0002 /* pC Flash Disable */ |
Definition at line 91 of file pcm990_baseboard.h.
#define PCM990_CTRL_FLWP 0x0001 /* pC Flash Write Protect */ |
Definition at line 90 of file pcm990_baseboard.h.
#define PCM990_CTRL_GPSENA 0x0008 /* GPS-Modul Enable */ |
Definition at line 96 of file pcm990_baseboard.h.
#define PCM990_CTRL_GPSPWR 0x0004 /* GPS-Modul Power on */ |
Definition at line 95 of file pcm990_baseboard.h.
#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO) |
Definition at line 31 of file pcm990_baseboard.h.
#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
Definition at line 32 of file pcm990_baseboard.h.
#define PCM990_CTRL_INT_IRQ_GPIO 9 |
Definition at line 30 of file pcm990_baseboard.h.
#define PCM990_CTRL_INTC0 0x0001 /* Clear Reg BT Detect */ |
Definition at line 72 of file pcm990_baseboard.h.
#define PCM990_CTRL_INTC1 0x0002 /* Clear Reg FR RI */ |
Definition at line 73 of file pcm990_baseboard.h.
#define PCM990_CTRL_INTC2 0x0004 /* Clear Reg MMC1 Detect */ |
Definition at line 74 of file pcm990_baseboard.h.
#define PCM990_CTRL_INTC3 0x0008 /* Clear Reg PM_5V off */ |
Definition at line 75 of file pcm990_baseboard.h.
#define PCM990_CTRL_INTMSKENA 0x000E /* Interrupt Enable REGISTER */ |
Definition at line 77 of file pcm990_baseboard.h.
#define PCM990_CTRL_INTSETCLR 0x000C /* Interrupt Clear REGISTER */ |
Definition at line 71 of file pcm990_baseboard.h.
#define PCM990_CTRL_LCDON 0x0002 /* RW LCD Latch on */ |
Definition at line 58 of file pcm990_baseboard.h.
#define PCM990_CTRL_LCDPOS1 0x0004 /* RW POS 1 */ |
Definition at line 59 of file pcm990_baseboard.h.
#define PCM990_CTRL_LCDPOS2 0x0008 /* RW POS 2 */ |
Definition at line 60 of file pcm990_baseboard.h.
#define PCM990_CTRL_LCDPWR 0x0001 /* RW LCD Power on */ |
Definition at line 57 of file pcm990_baseboard.h.
#define PCM990_CTRL_LEDBAS 0x0002 /* BASIS LED enable */ |
Definition at line 53 of file pcm990_baseboard.h.
#define PCM990_CTRL_LEDPWR 0x0001 /* POWER LED enable */ |
Definition at line 52 of file pcm990_baseboard.h.
#define PCM990_CTRL_LEDUSR 0x0004 /* USER LED enable */ |
Definition at line 54 of file pcm990_baseboard.h.
#define PCM990_CTRL_MMC1PWR 0x0001 /* RW MMC1 Power on */ |
Definition at line 63 of file pcm990_baseboard.h.
#define PCM990_CTRL_MMC2DE 0x0004 /* R MMC2 Card detect */ |
Definition at line 68 of file pcm990_baseboard.h.
#define PCM990_CTRL_MMC2LED 0x0002 /* RW MMC2 LED */ |
Definition at line 67 of file pcm990_baseboard.h.
#define PCM990_CTRL_MMC2PWR 0x0001 /* RW MMC2 Power on */ |
Definition at line 66 of file pcm990_baseboard.h.
#define PCM990_CTRL_MMC2WP 0x0008 /* R MMC2 Card write protect */ |
Definition at line 69 of file pcm990_baseboard.h.
#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ |
Definition at line 33 of file pcm990_baseboard.h.
#define PCM990_CTRL_PM_5V 0x0008 /* Read 5V OK */ |
Definition at line 49 of file pcm990_baseboard.h.
#define PCM990_CTRL_PWR_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO) |
Definition at line 37 of file pcm990_baseboard.h.
#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
Definition at line 38 of file pcm990_baseboard.h.
#define PCM990_CTRL_PWR_IRQ_GPIO 14 |
Definition at line 36 of file pcm990_baseboard.h.
#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */ |
Definition at line 41 of file pcm990_baseboard.h.
#define PCM990_CTRL_REG1 0x0002 /* Power REGISTER */ |
Definition at line 46 of file pcm990_baseboard.h.
#define PCM990_CTRL_REG10 0x0012 /* GPS-REGISTER */ |
Definition at line 94 of file pcm990_baseboard.h.
#define PCM990_CTRL_REG11 0x0014 /* Accu REGISTER */ |
Definition at line 98 of file pcm990_baseboard.h.
#define PCM990_CTRL_REG2 0x0004 /* LED REGISTER */ |
Definition at line 51 of file pcm990_baseboard.h.
#define PCM990_CTRL_REG3 0x0006 /* LCD CTRL REGISTER 3 */ |
Definition at line 56 of file pcm990_baseboard.h.
#define PCM990_CTRL_REG4 0x0008 /* MMC1 CTRL REGISTER 4 */ |
Definition at line 62 of file pcm990_baseboard.h.
#define PCM990_CTRL_REG5 0x000A /* MMC2 CTRL REGISTER 5 */ |
Definition at line 65 of file pcm990_baseboard.h.
#define PCM990_CTRL_REG8 0x0014 /* Uart REGISTER */ |
Definition at line 83 of file pcm990_baseboard.h.
#define PCM990_CTRL_REG9 0x0010 /* AC97 Flash REGISTER */ |
Definition at line 89 of file pcm990_baseboard.h.
#define PCM990_CTRL_RESGPIO 0x0004 /* RESETGPIO Enable REGISTER */ |
Definition at line 44 of file pcm990_baseboard.h.
#define PCM990_CTRL_RESOUT 0x0002 /* RESETOUT Enable REGISTER */ |
Definition at line 43 of file pcm990_baseboard.h.
#define PCM990_CTRL_SIZE (1*1024*1024) |
Definition at line 34 of file pcm990_baseboard.h.
#define PCM990_CTRL_SYSRES 0x0001 /* System RESET REGISTER */ |
Definition at line 42 of file pcm990_baseboard.h.
#define PCM990_IDE_5V 0x0002 /* R IDE Power 5V */ |
Definition at line 136 of file pcm990_baseboard.h.
#define PCM990_IDE_DMA1_0 0x0008 /* RW 1=DREQ1 0=DREQ0 */ |
Definition at line 122 of file pcm990_baseboard.h.
#define PCM990_IDE_DMAENA 0x0004 /* RW DMA Enable */ |
Definition at line 121 of file pcm990_baseboard.h.
#define PCM990_IDE_IDEIN 0x0004 /* RW Latch on Interrupt usw. */ |
Definition at line 132 of file pcm990_baseboard.h.
#define PCM990_IDE_IDEMODE 0x0001 /* R TrueIDE Mode */ |
Definition at line 120 of file pcm990_baseboard.h.
#define PCM990_IDE_IDEOE 0x0001 /* RW Latch on Databus */ |
Definition at line 130 of file pcm990_baseboard.h.
#define PCM990_IDE_IDEON 0x0002 /* RW Latch on Control Address */ |
Definition at line 131 of file pcm990_baseboard.h.
#define PCM990_IDE_IRQ PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO) |
Definition at line 108 of file pcm990_baseboard.h.
#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
Definition at line 109 of file pcm990_baseboard.h.
#define PCM990_IDE_IRQ_GPIO 13 |
Definition at line 107 of file pcm990_baseboard.h.
#define PCM990_IDE_PLD_BASE 0xee000000 |
Definition at line 111 of file pcm990_baseboard.h.
#define PCM990_IDE_PLD_P2V | ( | x | ) | ((x) - PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_BASE) |
Definition at line 139 of file pcm990_baseboard.h.
#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ |
Definition at line 110 of file pcm990_baseboard.h.
#define PCM990_IDE_PLD_REG0 0x1000 /* OFFSET IDE REGISTER 0 */ |
Definition at line 115 of file pcm990_baseboard.h.
#define PCM990_IDE_PLD_REG1 0x1002 /* OFFSET IDE REGISTER 1 */ |
Definition at line 119 of file pcm990_baseboard.h.
#define PCM990_IDE_PLD_REG2 0x1004 /* OFFSET IDE REGISTER 2 */ |
Definition at line 124 of file pcm990_baseboard.h.
#define PCM990_IDE_PLD_REG3 0x1006 /* OFFSET IDE REGISTER 3 */ |
Definition at line 129 of file pcm990_baseboard.h.
#define PCM990_IDE_PLD_REG4 0x1008 /* OFFSET IDE REGISTER 4 */ |
Definition at line 134 of file pcm990_baseboard.h.
#define PCM990_IDE_PLD_SIZE (1*1024*1024) |
Definition at line 112 of file pcm990_baseboard.h.
#define PCM990_IDE_PLD_V2P | ( | x | ) | ((x) - PCM990_IDE_PLD_BASE + PCM990_IDE_PLD_PHYS) |
Definition at line 140 of file pcm990_baseboard.h.
#define PCM990_IDE_PM5V 0x0004 /* R System VCC_5V */ |
Definition at line 116 of file pcm990_baseboard.h.
#define PCM990_IDE_PWG 0x0008 /* R IDE Power is on */ |
Definition at line 137 of file pcm990_baseboard.h.
#define PCM990_IDE_PWRENA 0x0001 /* RW IDE Power enable */ |
Definition at line 135 of file pcm990_baseboard.h.
#define PCM990_IDE_RDY 0x0008 /* RDY */ |
Definition at line 127 of file pcm990_baseboard.h.
#define PCM990_IDE_RES 0x0002 /* RW IDE Reset Bit */ |
Definition at line 126 of file pcm990_baseboard.h.
#define PCM990_IDE_RESENA 0x0001 /* RW IDE Reset Bit enable */ |
Definition at line 125 of file pcm990_baseboard.h.
#define PCM990_IDE_STBY 0x0008 /* R System StandBy */ |
Definition at line 117 of file pcm990_baseboard.h.
#define PCM990_MMC0_IRQ PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO) |
Definition at line 204 of file pcm990_baseboard.h.
#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING |
Definition at line 205 of file pcm990_baseboard.h.
#define PCM990_MMC0_IRQ_GPIO 9 |
Definition at line 203 of file pcm990_baseboard.h.
#define PCM990_USB_OVERCURRENT (88 | GPIO_ALT_FN_1_IN) |
Definition at line 210 of file pcm990_baseboard.h.
#define PCM990_USB_PWR_EN (89 | GPIO_ALT_FN_2_OUT) |
Definition at line 211 of file pcm990_baseboard.h.