| enum | {
PINMUX_RESERVED = 0,
PINMUX_DATA_BEGIN,
PORT_ALL =(DATA),
PINMUX_DATA_END,
PINMUX_INPUT_BEGIN,
PORT_ALL =(DATA),
PINMUX_INPUT_END,
PINMUX_INPUT_PULLUP_BEGIN,
PORT_ALL =(DATA),
PINMUX_INPUT_PULLUP_END,
PINMUX_INPUT_PULLDOWN_BEGIN,
PORT_ALL =(DATA),
PINMUX_INPUT_PULLDOWN_END,
PINMUX_OUTPUT_BEGIN,
PORT_ALL =(DATA),
PINMUX_OUTPUT_END,
PINMUX_FUNCTION_BEGIN,
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
MSEL1CR_31_0,
MSEL1CR_31_1,
MSEL1CR_30_0,
MSEL1CR_30_1,
MSEL1CR_29_0,
MSEL1CR_29_1,
MSEL1CR_28_0,
MSEL1CR_28_1,
MSEL1CR_27_0,
MSEL1CR_27_1,
MSEL1CR_26_0,
MSEL1CR_26_1,
MSEL1CR_16_0,
MSEL1CR_16_1,
MSEL1CR_15_0,
MSEL1CR_15_1,
MSEL1CR_14_0,
MSEL1CR_14_1,
MSEL1CR_13_0,
MSEL1CR_13_1,
MSEL1CR_12_0,
MSEL1CR_12_1,
MSEL1CR_9_0,
MSEL1CR_9_1,
MSEL1CR_7_0,
MSEL1CR_7_1,
MSEL1CR_6_0,
MSEL1CR_6_1,
MSEL1CR_5_0,
MSEL1CR_5_1,
MSEL1CR_4_0,
MSEL1CR_4_1,
MSEL1CR_3_0,
MSEL1CR_3_1,
MSEL1CR_2_0,
MSEL1CR_2_1,
MSEL1CR_0_0,
MSEL1CR_0_1,
MSEL3CR_15_0,
MSEL3CR_15_1,
MSEL3CR_6_0,
MSEL3CR_6_1,
MSEL4CR_19_0,
MSEL4CR_19_1,
MSEL4CR_18_0,
MSEL4CR_18_1,
MSEL4CR_15_0,
MSEL4CR_15_1,
MSEL4CR_10_0,
MSEL4CR_10_1,
MSEL4CR_6_0,
MSEL4CR_6_1,
MSEL4CR_4_0,
MSEL4CR_4_1,
MSEL4CR_1_0,
MSEL4CR_1_1,
MSEL5CR_31_0,
MSEL5CR_31_1,
MSEL5CR_30_0,
MSEL5CR_30_1,
MSEL5CR_29_0,
MSEL5CR_29_1,
MSEL5CR_27_0,
MSEL5CR_27_1,
MSEL5CR_25_0,
MSEL5CR_25_1,
MSEL5CR_23_0,
MSEL5CR_23_1,
MSEL5CR_21_0,
MSEL5CR_21_1,
MSEL5CR_19_0,
MSEL5CR_19_1,
MSEL5CR_17_0,
MSEL5CR_17_1,
MSEL5CR_15_0,
MSEL5CR_15_1,
MSEL5CR_14_0,
MSEL5CR_14_1,
MSEL5CR_13_0,
MSEL5CR_13_1,
MSEL5CR_12_0,
MSEL5CR_12_1,
MSEL5CR_11_0,
MSEL5CR_11_1,
MSEL5CR_10_0,
MSEL5CR_10_1,
MSEL5CR_8_0,
MSEL5CR_8_1,
MSEL5CR_7_0,
MSEL5CR_7_1,
MSEL5CR_6_0,
MSEL5CR_6_1,
MSEL5CR_5_0,
MSEL5CR_5_1,
MSEL5CR_4_0,
MSEL5CR_4_1,
MSEL5CR_3_0,
MSEL5CR_3_1,
MSEL5CR_2_0,
MSEL5CR_2_1,
MSEL5CR_0_0,
MSEL5CR_0_1,
PINMUX_FUNCTION_END,
PINMUX_MARK_BEGIN,
IRQ0_PORT2_MARK,
IRQ0_PORT13_MARK,
IRQ1_MARK,
IRQ2_PORT11_MARK,
IRQ2_PORT12_MARK,
IRQ3_PORT10_MARK,
IRQ3_PORT14_MARK,
IRQ4_PORT15_MARK,
IRQ4_PORT172_MARK,
IRQ5_PORT0_MARK,
IRQ5_PORT1_MARK,
IRQ6_PORT121_MARK,
IRQ6_PORT173_MARK,
IRQ7_PORT120_MARK,
IRQ7_PORT209_MARK,
IRQ8_MARK,
IRQ9_PORT118_MARK,
IRQ9_PORT210_MARK,
IRQ10_MARK,
IRQ11_MARK,
IRQ12_PORT42_MARK,
IRQ12_PORT97_MARK,
IRQ13_PORT64_MARK,
IRQ13_PORT98_MARK,
IRQ14_PORT63_MARK,
IRQ14_PORT99_MARK,
IRQ15_PORT62_MARK,
IRQ15_PORT100_MARK,
IRQ16_PORT68_MARK,
IRQ16_PORT211_MARK,
IRQ17_MARK,
IRQ18_MARK,
IRQ19_MARK,
IRQ20_MARK,
IRQ21_MARK,
IRQ22_MARK,
IRQ23_MARK,
IRQ24_MARK,
IRQ25_MARK,
IRQ26_PORT58_MARK,
IRQ26_PORT81_MARK,
IRQ27_PORT57_MARK,
IRQ27_PORT168_MARK,
IRQ28_PORT56_MARK,
IRQ28_PORT169_MARK,
IRQ29_PORT50_MARK,
IRQ29_PORT170_MARK,
IRQ30_PORT49_MARK,
IRQ30_PORT171_MARK,
IRQ31_PORT41_MARK,
IRQ31_PORT167_MARK,
DBGMDT2_MARK,
DBGMDT1_MARK,
DBGMDT0_MARK,
DBGMD10_MARK,
DBGMD11_MARK,
DBGMD20_MARK,
DBGMD21_MARK,
FSIAISLD_PORT0_MARK,
FSIAISLD_PORT5_MARK,
FSIASPDIF_PORT9_MARK,
FSIASPDIF_PORT18_MARK,
FSIAOSLD1_MARK,
FSIAOSLD2_MARK,
FSIAOLR_MARK,
FSIAOBT_MARK,
FSIAOSLD_MARK,
FSIAOMC_MARK,
FSIACK_MARK,
FSIAILR_MARK,
FSIAIBT_MARK,
FSIBCK_MARK,
FMSISLD_PORT1_MARK,
FMSISLD_PORT6_MARK,
FMSIILR_MARK,
FMSIIBT_MARK,
FMSIOLR_MARK,
FMSIOBT_MARK,
FMSICK_MARK,
FMSOILR_MARK,
FMSOIBT_MARK,
FMSOOLR_MARK,
FMSOOBT_MARK,
FMSOSLD_MARK,
FMSOCK_MARK,
SCIFA0_SCK_MARK,
SCIFA0_CTS_MARK,
SCIFA0_RTS_MARK,
SCIFA0_RXD_MARK,
SCIFA0_TXD_MARK,
SCIFA1_CTS_MARK,
SCIFA1_SCK_MARK,
SCIFA1_RXD_MARK,
SCIFA1_TXD_MARK,
SCIFA1_RTS_MARK,
SCIFA2_SCK_PORT22_MARK,
SCIFA2_SCK_PORT199_MARK,
SCIFA2_RXD_MARK,
SCIFA2_TXD_MARK,
SCIFA2_CTS_MARK,
SCIFA2_RTS_MARK,
SCIFA3_RTS_PORT105_MARK,
SCIFA3_SCK_PORT116_MARK,
SCIFA3_CTS_PORT117_MARK,
SCIFA3_RXD_PORT174_MARK,
SCIFA3_TXD_PORT175_MARK,
SCIFA3_RTS_PORT161_MARK,
SCIFA3_SCK_PORT158_MARK,
SCIFA3_CTS_PORT162_MARK,
SCIFA3_RXD_PORT159_MARK,
SCIFA3_TXD_PORT160_MARK,
SCIFA4_RXD_PORT12_MARK,
SCIFA4_TXD_PORT13_MARK,
SCIFA4_RXD_PORT204_MARK,
SCIFA4_TXD_PORT203_MARK,
SCIFA4_RXD_PORT94_MARK,
SCIFA4_TXD_PORT93_MARK,
SCIFA4_SCK_PORT21_MARK,
SCIFA4_SCK_PORT205_MARK,
SCIFA5_TXD_PORT20_MARK,
SCIFA5_RXD_PORT10_MARK,
SCIFA5_RXD_PORT207_MARK,
SCIFA5_TXD_PORT208_MARK,
SCIFA5_TXD_PORT91_MARK,
SCIFA5_RXD_PORT92_MARK,
SCIFA5_SCK_PORT23_MARK,
SCIFA5_SCK_PORT206_MARK,
SCIFA6_SCK_MARK,
SCIFA6_RXD_MARK,
SCIFA6_TXD_MARK,
SCIFA7_TXD_MARK,
SCIFA7_RXD_MARK,
SCIFB_SCK_PORT190_MARK,
SCIFB_RXD_PORT191_MARK,
SCIFB_TXD_PORT192_MARK,
SCIFB_RTS_PORT186_MARK,
SCIFB_CTS_PORT187_MARK,
SCIFB_SCK_PORT2_MARK,
SCIFB_RXD_PORT3_MARK,
SCIFB_TXD_PORT4_MARK,
SCIFB_RTS_PORT172_MARK,
SCIFB_CTS_PORT173_MARK,
LCDC0_SELECT_MARK,
LCD0_D0_MARK,
LCD0_D1_MARK,
LCD0_D2_MARK,
LCD0_D3_MARK,
LCD0_D4_MARK,
LCD0_D5_MARK,
LCD0_D6_MARK,
LCD0_D7_MARK,
LCD0_D8_MARK,
LCD0_D9_MARK,
LCD0_D10_MARK,
LCD0_D11_MARK,
LCD0_D12_MARK,
LCD0_D13_MARK,
LCD0_D14_MARK,
LCD0_D15_MARK,
LCD0_D16_MARK,
LCD0_D17_MARK,
LCD0_DON_MARK,
LCD0_VCPWC_MARK,
LCD0_VEPWC_MARK,
LCD0_DCK_MARK,
LCD0_VSYN_MARK,
LCD0_HSYN_MARK,
LCD0_DISP_MARK,
LCD0_WR_MARK,
LCD0_RD_MARK,
LCD0_CS_MARK,
LCD0_RS_MARK,
LCD0_D21_PORT158_MARK,
LCD0_D23_PORT159_MARK,
LCD0_D22_PORT160_MARK,
LCD0_D20_PORT161_MARK,
LCD0_D19_PORT162_MARK,
LCD0_D18_PORT163_MARK,
LCD0_LCLK_PORT165_MARK,
LCD0_D18_PORT40_MARK,
LCD0_D22_PORT0_MARK,
LCD0_D23_PORT1_MARK,
LCD0_D21_PORT2_MARK,
LCD0_D20_PORT3_MARK,
LCD0_D19_PORT4_MARK,
LCD0_LCLK_PORT102_MARK,
LCDC1_SELECT_MARK,
LCD1_D0_MARK,
LCD1_D1_MARK,
LCD1_D2_MARK,
LCD1_D3_MARK,
LCD1_D4_MARK,
LCD1_D5_MARK,
LCD1_D6_MARK,
LCD1_D7_MARK,
LCD1_D8_MARK,
LCD1_D9_MARK,
LCD1_D10_MARK,
LCD1_D11_MARK,
LCD1_D12_MARK,
LCD1_D13_MARK,
LCD1_D14_MARK,
LCD1_D15_MARK,
LCD1_D16_MARK,
LCD1_D17_MARK,
LCD1_D18_MARK,
LCD1_D19_MARK,
LCD1_D20_MARK,
LCD1_D21_MARK,
LCD1_D22_MARK,
LCD1_D23_MARK,
LCD1_DON_MARK,
LCD1_VCPWC_MARK,
LCD1_LCLK_MARK,
LCD1_VEPWC_MARK,
LCD1_DCK_MARK,
LCD1_VSYN_MARK,
LCD1_HSYN_MARK,
LCD1_DISP_MARK,
LCD1_RS_MARK,
LCD1_CS_MARK,
LCD1_RD_MARK,
LCD1_WR_MARK,
RSPI_SSL0_A_MARK,
RSPI_SSL1_A_MARK,
RSPI_SSL2_A_MARK,
RSPI_SSL3_A_MARK,
RSPI_CK_A_MARK,
RSPI_MOSI_A_MARK,
RSPI_MISO_A_MARK,
VIO_CKO1_MARK,
VIO_CKO2_MARK,
VIO_CKO_1_MARK,
VIO_CKO_MARK,
VIO0_D0_MARK,
VIO0_D1_MARK,
VIO0_D2_MARK,
VIO0_D3_MARK,
VIO0_D4_MARK,
VIO0_D5_MARK,
VIO0_D6_MARK,
VIO0_D7_MARK,
VIO0_D8_MARK,
VIO0_D9_MARK,
VIO0_D10_MARK,
VIO0_D11_MARK,
VIO0_D12_MARK,
VIO0_VD_MARK,
VIO0_HD_MARK,
VIO0_CLK_MARK,
VIO0_FIELD_MARK,
VIO0_D13_PORT26_MARK,
VIO0_D14_PORT25_MARK,
VIO0_D15_PORT24_MARK,
VIO0_D13_PORT22_MARK,
VIO0_D14_PORT95_MARK,
VIO0_D15_PORT96_MARK,
VIO1_D0_MARK,
VIO1_D1_MARK,
VIO1_D2_MARK,
VIO1_D3_MARK,
VIO1_D4_MARK,
VIO1_D5_MARK,
VIO1_D6_MARK,
VIO1_D7_MARK,
VIO1_VD_MARK,
VIO1_HD_MARK,
VIO1_CLK_MARK,
VIO1_FIELD_MARK,
TPU0TO0_MARK,
TPU0TO1_MARK,
TPU0TO3_MARK,
TPU0TO2_PORT66_MARK,
TPU0TO2_PORT202_MARK,
STP0_IPD0_MARK,
STP0_IPD1_MARK,
STP0_IPD2_MARK,
STP0_IPD3_MARK,
STP0_IPD4_MARK,
STP0_IPD5_MARK,
STP0_IPD6_MARK,
STP0_IPD7_MARK,
STP0_IPEN_MARK,
STP0_IPCLK_MARK,
STP0_IPSYNC_MARK,
STP1_IPD1_MARK,
STP1_IPD2_MARK,
STP1_IPD3_MARK,
STP1_IPD4_MARK,
STP1_IPD5_MARK,
STP1_IPD6_MARK,
STP1_IPD7_MARK,
STP1_IPCLK_MARK,
STP1_IPSYNC_MARK,
STP1_IPD0_PORT186_MARK,
STP1_IPEN_PORT187_MARK,
STP1_IPD0_PORT194_MARK,
STP1_IPEN_PORT193_MARK,
SIM_RST_MARK,
SIM_CLK_MARK,
SIM_D_PORT22_MARK,
SIM_D_PORT199_MARK,
SDHI0_D0_MARK,
SDHI0_D1_MARK,
SDHI0_D2_MARK,
SDHI0_D3_MARK,
SDHI0_CD_MARK,
SDHI0_WP_MARK,
SDHI0_CMD_MARK,
SDHI0_CLK_MARK,
SDHI1_D0_MARK,
SDHI1_D1_MARK,
SDHI1_D2_MARK,
SDHI1_D3_MARK,
SDHI1_CD_MARK,
SDHI1_WP_MARK,
SDHI1_CMD_MARK,
SDHI1_CLK_MARK,
SDHI2_D0_MARK,
SDHI2_D1_MARK,
SDHI2_D2_MARK,
SDHI2_D3_MARK,
SDHI2_CLK_MARK,
SDHI2_CMD_MARK,
SDHI2_CD_PORT24_MARK,
SDHI2_WP_PORT25_MARK,
SDHI2_WP_PORT177_MARK,
SDHI2_CD_PORT202_MARK,
MSIOF2_TXD_MARK,
MSIOF2_RXD_MARK,
MSIOF2_TSCK_MARK,
MSIOF2_SS2_MARK,
MSIOF2_TSYNC_MARK,
MSIOF2_SS1_MARK,
MSIOF2_MCK1_MARK,
MSIOF2_MCK0_MARK,
MSIOF2_RSYNC_MARK,
MSIOF2_RSCK_MARK,
KEYIN4_MARK,
KEYIN5_MARK,
KEYIN6_MARK,
KEYIN7_MARK,
KEYOUT0_MARK,
KEYOUT1_MARK,
KEYOUT2_MARK,
KEYOUT3_MARK,
KEYOUT4_MARK,
KEYOUT5_MARK,
KEYOUT6_MARK,
KEYOUT7_MARK,
KEYIN0_PORT43_MARK,
KEYIN1_PORT44_MARK,
KEYIN2_PORT45_MARK,
KEYIN3_PORT46_MARK,
KEYIN0_PORT58_MARK,
KEYIN1_PORT57_MARK,
KEYIN2_PORT56_MARK,
KEYIN3_PORT55_MARK,
DV_D0_MARK,
DV_D1_MARK,
DV_D2_MARK,
DV_D3_MARK,
DV_D4_MARK,
DV_D5_MARK,
DV_D6_MARK,
DV_D7_MARK,
DV_D8_MARK,
DV_D9_MARK,
DV_D10_MARK,
DV_D11_MARK,
DV_D12_MARK,
DV_D13_MARK,
DV_D14_MARK,
DV_D15_MARK,
DV_CLK_MARK,
DV_VSYNC_MARK,
DV_HSYNC_MARK,
MEMC_AD0_MARK,
MEMC_AD1_MARK,
MEMC_AD2_MARK,
MEMC_AD3_MARK,
MEMC_AD4_MARK,
MEMC_AD5_MARK,
MEMC_AD6_MARK,
MEMC_AD7_MARK,
MEMC_AD8_MARK,
MEMC_AD9_MARK,
MEMC_AD10_MARK,
MEMC_AD11_MARK,
MEMC_AD12_MARK,
MEMC_AD13_MARK,
MEMC_AD14_MARK,
MEMC_AD15_MARK,
MEMC_CS0_MARK,
MEMC_INT_MARK,
MEMC_NWE_MARK,
MEMC_NOE_MARK,
MEMC_CS1_MARK,
MEMC_ADV_MARK,
MEMC_WAIT_MARK,
MEMC_BUSCLK_MARK,
MEMC_A1_MARK,
MEMC_DREQ0_MARK,
MEMC_DREQ1_MARK,
MEMC_A0_MARK,
MMC0_D0_PORT68_MARK,
MMC0_D1_PORT69_MARK,
MMC0_D2_PORT70_MARK,
MMC0_D3_PORT71_MARK,
MMC0_D4_PORT72_MARK,
MMC0_D5_PORT73_MARK,
MMC0_D6_PORT74_MARK,
MMC0_D7_PORT75_MARK,
MMC0_CLK_PORT66_MARK,
MMC0_CMD_PORT67_MARK,
MMC1_D0_PORT149_MARK,
MMC1_D1_PORT148_MARK,
MMC1_D2_PORT147_MARK,
MMC1_D3_PORT146_MARK,
MMC1_D4_PORT145_MARK,
MMC1_D5_PORT144_MARK,
MMC1_D6_PORT143_MARK,
MMC1_D7_PORT142_MARK,
MMC1_CLK_PORT103_MARK,
MMC1_CMD_PORT104_MARK,
MSIOF0_SS1_MARK,
MSIOF0_SS2_MARK,
MSIOF0_RXD_MARK,
MSIOF0_TXD_MARK,
MSIOF0_MCK0_MARK,
MSIOF0_MCK1_MARK,
MSIOF0_RSYNC_MARK,
MSIOF0_RSCK_MARK,
MSIOF0_TSCK_MARK,
MSIOF0_TSYNC_MARK,
MSIOF1_RSCK_MARK,
MSIOF1_RSYNC_MARK,
MSIOF1_MCK0_MARK,
MSIOF1_MCK1_MARK,
MSIOF1_SS2_PORT116_MARK,
MSIOF1_SS1_PORT117_MARK,
MSIOF1_RXD_PORT118_MARK,
MSIOF1_TXD_PORT119_MARK,
MSIOF1_TSYNC_PORT120_MARK,
MSIOF1_TSCK_PORT121_MARK,
MSIOF1_SS1_PORT67_MARK,
MSIOF1_TSCK_PORT72_MARK,
MSIOF1_TSYNC_PORT73_MARK,
MSIOF1_TXD_PORT74_MARK,
MSIOF1_RXD_PORT75_MARK,
MSIOF1_SS2_PORT202_MARK,
GPO0_MARK,
GPI0_MARK,
GPO1_MARK,
GPI1_MARK,
USB0_OCI_MARK,
USB0_PPON_MARK,
VBUS_MARK,
USB1_OCI_MARK,
USB1_PPON_MARK,
BBIF1_RXD_MARK,
BBIF1_TXD_MARK,
BBIF1_TSYNC_MARK,
BBIF1_TSCK_MARK,
BBIF1_RSCK_MARK,
BBIF1_RSYNC_MARK,
BBIF1_FLOW_MARK,
BBIF1_RX_FLOW_N_MARK,
BBIF2_TXD2_PORT5_MARK,
BBIF2_RXD2_PORT60_MARK,
BBIF2_TSYNC2_PORT6_MARK,
BBIF2_TSCK2_PORT59_MARK,
BBIF2_RXD2_PORT90_MARK,
BBIF2_TXD2_PORT183_MARK,
BBIF2_TSCK2_PORT89_MARK,
BBIF2_TSYNC2_PORT184_MARK,
CS0_MARK,
CS2_MARK,
CS4_MARK,
CS5B_MARK,
CS6A_MARK,
CS5A_PORT105_MARK,
CS5A_PORT19_MARK,
IOIS16_MARK,
A0_MARK,
A1_MARK,
A2_MARK,
A3_MARK,
A4_FOE_MARK,
A5_FCDE_MARK,
A6_MARK,
A7_MARK,
A8_MARK,
A9_MARK,
A10_MARK,
A11_MARK,
A12_MARK,
A13_MARK,
A14_MARK,
A15_MARK,
A16_MARK,
A17_MARK,
A18_MARK,
A19_MARK,
A20_MARK,
A21_MARK,
A22_MARK,
A23_MARK,
A24_MARK,
A25_MARK,
A26_MARK,
D0_NAF0_MARK,
D1_NAF1_MARK,
D2_NAF2_MARK,
D3_NAF3_MARK,
D4_NAF4_MARK,
D5_NAF5_MARK,
D6_NAF6_MARK,
D7_NAF7_MARK,
D8_NAF8_MARK,
D9_NAF9_MARK,
D10_NAF10_MARK,
D11_NAF11_MARK,
D12_NAF12_MARK,
D13_NAF13_MARK,
D14_NAF14_MARK,
D15_NAF15_MARK,
D16_MARK,
D17_MARK,
D18_MARK,
D19_MARK,
D20_MARK,
D21_MARK,
D22_MARK,
D23_MARK,
D24_MARK,
D25_MARK,
D26_MARK,
D27_MARK,
D28_MARK,
D29_MARK,
D30_MARK,
D31_MARK,
WE0_FWE_MARK,
WE1_MARK,
WE2_ICIORD_MARK,
WE3_ICIOWR_MARK,
CKO_MARK,
BS_MARK,
RDWR_MARK,
RD_FSC_MARK,
WAIT_PORT177_MARK,
WAIT_PORT90_MARK,
FCE0_MARK,
FCE1_MARK,
FRB_MARK,
IRDA_FIRSEL_MARK,
IRDA_IN_MARK,
IRDA_OUT_MARK,
IDE_D0_MARK,
IDE_D1_MARK,
IDE_D2_MARK,
IDE_D3_MARK,
IDE_D4_MARK,
IDE_D5_MARK,
IDE_D6_MARK,
IDE_D7_MARK,
IDE_D8_MARK,
IDE_D9_MARK,
IDE_D10_MARK,
IDE_D11_MARK,
IDE_D12_MARK,
IDE_D13_MARK,
IDE_D14_MARK,
IDE_D15_MARK,
IDE_A0_MARK,
IDE_A1_MARK,
IDE_A2_MARK,
IDE_CS0_MARK,
IDE_CS1_MARK,
IDE_IOWR_MARK,
IDE_IORD_MARK,
IDE_IORDY_MARK,
IDE_INT_MARK,
IDE_RST_MARK,
IDE_DIRECTION_MARK,
IDE_EXBUF_ENB_MARK,
IDE_IODACK_MARK,
IDE_IODREQ_MARK,
RMII_CRS_DV_MARK,
RMII_RX_ER_MARK,
RMII_RXD0_MARK,
RMII_RXD1_MARK,
RMII_TX_EN_MARK,
RMII_TXD0_MARK,
RMII_MDC_MARK,
RMII_TXD1_MARK,
RMII_MDIO_MARK,
RMII_REF50CK_MARK,
RMII_REF125CK_MARK,
ET_TX_CLK_MARK,
ET_TX_EN_MARK,
ET_ETXD0_MARK,
ET_ETXD1_MARK,
ET_ETXD2_MARK,
ET_ETXD3_MARK,
ET_ETXD4_MARK,
ET_ETXD5_MARK,
ET_ETXD6_MARK,
ET_ETXD7_MARK,
ET_COL_MARK,
ET_TX_ER_MARK,
ET_RX_CLK_MARK,
ET_RX_DV_MARK,
ET_ERXD0_MARK,
ET_ERXD1_MARK,
ET_ERXD2_MARK,
ET_ERXD3_MARK,
ET_ERXD4_MARK,
ET_ERXD5_MARK,
ET_ERXD6_MARK,
ET_ERXD7_MARK,
ET_RX_ER_MARK,
ET_CRS_MARK,
ET_MDC_MARK,
ET_MDIO_MARK,
ET_LINK_MARK,
ET_PHY_INT_MARK,
ET_WOL_MARK,
ET_GTX_CLK_MARK,
DREQ0_MARK,
DACK0_MARK,
DREQ1_MARK,
DACK1_MARK,
RESETOUTS_MARK,
RESETP_PULLUP_MARK,
RESETP_PLAIN_MARK,
IROUT_MARK,
SDENC_CPG_MARK,
SDENC_DV_CLKI_MARK,
HDMI_HPD_MARK,
HDMI_CEC_MARK,
EDEBGREQ_PULLUP_MARK,
EDEBGREQ_PULLDOWN_MARK,
TRACEAUD_FROM_VIO_MARK,
TRACEAUD_FROM_LCDC0_MARK,
TRACEAUD_FROM_MEMC_MARK,
PINMUX_MARK_END
} |
1.8.2