| enum | {
PINMUX_RESERVED = 0,
PINMUX_DATA_BEGIN,
PORT_ALL =(DATA),
PINMUX_DATA_END,
PINMUX_INPUT_BEGIN,
PORT_ALL =(DATA),
PINMUX_INPUT_END,
PINMUX_INPUT_PULLUP_BEGIN,
PORT_ALL =(DATA),
PINMUX_INPUT_PULLUP_END,
PINMUX_INPUT_PULLDOWN_BEGIN,
PORT_ALL =(DATA),
PINMUX_INPUT_PULLDOWN_END,
PINMUX_OUTPUT_BEGIN,
PORT_ALL =(DATA),
PINMUX_OUTPUT_END,
PINMUX_FUNCTION_BEGIN,
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
MSELBCR_MSEL2_1,
MSELBCR_MSEL2_0,
PINMUX_FUNCTION_END,
PINMUX_MARK_BEGIN,
PORT48_KEYIN0_PU_MARK,
PORT49_KEYIN1_PU_MARK,
PORT50_KEYIN2_PU_MARK,
PORT55_KEYIN3_PU_MARK,
PORT56_KEYIN4_PU_MARK,
PORT57_KEYIN5_PU_MARK,
PORT58_KEYIN6_PU_MARK,
VBUS0_MARK,
CPORT0_MARK,
CPORT1_MARK,
CPORT2_MARK,
CPORT3_MARK,
CPORT4_MARK,
CPORT5_MARK,
CPORT6_MARK,
CPORT7_MARK,
CPORT8_MARK,
CPORT9_MARK,
CPORT10_MARK,
CPORT11_MARK,
SIN2_MARK,
CPORT12_MARK,
XCTS2_MARK,
CPORT13_MARK,
RFSPO4_MARK,
CPORT14_MARK,
RFSPO5_MARK,
CPORT15_MARK,
CPORT16_MARK,
CPORT17_MARK,
SOUT2_MARK,
CPORT18_MARK,
XRTS2_MARK,
CPORT19_MARK,
CPORT20_MARK,
RFSPO6_MARK,
CPORT21_MARK,
STATUS0_MARK,
CPORT22_MARK,
STATUS1_MARK,
CPORT23_MARK,
STATUS2_MARK,
RFSPO7_MARK,
MPORT0_MARK,
MPORT1_MARK,
B_SYNLD1_MARK,
B_SYNLD2_MARK,
XMAINPS_MARK,
XDIVPS_MARK,
XIDRST_MARK,
IDCLK_MARK,
IDIO_MARK,
SOUT1_MARK,
SCIFA4_TXD_MARK,
M02_BERDAT_MARK,
SIN1_MARK,
SCIFA4_RXD_MARK,
XWUP_MARK,
XRTS1_MARK,
SCIFA4_RTS_MARK,
M03_BERCLK_MARK,
XCTS1_MARK,
SCIFA4_CTS_MARK,
HSU_IQ_AGC6_MARK,
MFG2_IN2_MARK,
MSIOF2_MCK0_MARK,
HSU_IQ_AGC5_MARK,
MFG2_IN1_MARK,
MSIOF2_MCK1_MARK,
HSU_IQ_AGC4_MARK,
MSIOF2_RSYNC_MARK,
HSU_IQ_AGC3_MARK,
MFG2_OUT1_MARK,
MSIOF2_RSCK_MARK,
HSU_IQ_AGC2_MARK,
PORT42_KEYOUT0_MARK,
HSU_IQ_AGC1_MARK,
PORT43_KEYOUT1_MARK,
HSU_IQ_AGC0_MARK,
PORT44_KEYOUT2_MARK,
HSU_IQ_AGC_ST_MARK,
PORT45_KEYOUT3_MARK,
HSU_IQ_PDO_MARK,
PORT46_KEYOUT4_MARK,
HSU_IQ_PYO_MARK,
PORT47_KEYOUT5_MARK,
HSU_EN_TXMUX_G3MO_MARK,
PORT48_KEYIN0_MARK,
HSU_I_TXMUX_G3MO_MARK,
PORT49_KEYIN1_MARK,
HSU_Q_TXMUX_G3MO_MARK,
PORT50_KEYIN2_MARK,
HSU_SYO_MARK,
PORT51_MSIOF2_TSYNC_MARK,
HSU_SDO_MARK,
PORT52_MSIOF2_TSCK_MARK,
HSU_TGTTI_G3MO_MARK,
PORT53_MSIOF2_TXD_MARK,
B_TIME_STAMP_MARK,
PORT54_MSIOF2_RXD_MARK,
HSU_SDI_MARK,
PORT55_KEYIN3_MARK,
HSU_SCO_MARK,
PORT56_KEYIN4_MARK,
HSU_DREQ_MARK,
PORT57_KEYIN5_MARK,
HSU_DACK_MARK,
PORT58_KEYIN6_MARK,
HSU_CLK61M_MARK,
PORT59_MSIOF2_SS1_MARK,
HSU_XRST_MARK,
PORT60_MSIOF2_SS2_MARK,
PCMCLKO_MARK,
SYNC8KO_MARK,
DNPCM_A_MARK,
UPPCM_A_MARK,
XTALB1L_MARK,
GPS_AGC1_MARK,
SCIFA0_RTS_MARK,
GPS_AGC2_MARK,
SCIFA0_SCK_MARK,
GPS_AGC3_MARK,
SCIFA0_TXD_MARK,
GPS_AGC4_MARK,
SCIFA0_RXD_MARK,
GPS_PWRD_MARK,
SCIFA0_CTS_MARK,
GPS_IM_MARK,
GPS_IS_MARK,
GPS_QM_MARK,
GPS_QS_MARK,
SIUBOMC_MARK,
TPU2TO0_MARK,
SIUCKB_MARK,
TPU2TO1_MARK,
SIUBOLR_MARK,
BBIF2_TSYNC_MARK,
TPU2TO2_MARK,
SIUBOBT_MARK,
BBIF2_TSCK_MARK,
TPU2TO3_MARK,
SIUBOSLD_MARK,
BBIF2_TXD_MARK,
TPU3TO0_MARK,
SIUBILR_MARK,
TPU3TO1_MARK,
SIUBIBT_MARK,
TPU3TO2_MARK,
SIUBISLD_MARK,
TPU3TO3_MARK,
NMI_MARK,
TPU4TO0_MARK,
DNPCM_M_MARK,
TPU4TO1_MARK,
TPU4TO2_MARK,
TPU4TO3_MARK,
IRQ_TMPB_MARK,
PWEN_MARK,
MFG1_OUT1_MARK,
OVCN_MARK,
MFG1_IN1_MARK,
OVCN2_MARK,
MFG1_IN2_MARK,
RFSPO1_MARK,
RFSPO2_MARK,
RFSPO3_MARK,
PORT93_VIO_CKO2_MARK,
USBTERM_MARK,
EXTLP_MARK,
IDIN_MARK,
SCIFA5_CTS_MARK,
MFG0_IN1_MARK,
SCIFA5_RTS_MARK,
MFG0_IN2_MARK,
SCIFA5_RXD_MARK,
SCIFA5_TXD_MARK,
SCIFA5_SCK_MARK,
MFG0_OUT1_MARK,
A0_EA0_MARK,
BS_MARK,
A14_EA14_MARK,
PORT102_KEYOUT0_MARK,
A15_EA15_MARK,
PORT103_KEYOUT1_MARK,
DV_CLKOL_MARK,
A16_EA16_MARK,
PORT104_KEYOUT2_MARK,
DV_VSYNCL_MARK,
MSIOF0_SS1_MARK,
A17_EA17_MARK,
PORT105_KEYOUT3_MARK,
DV_HSYNCL_MARK,
MSIOF0_TSYNC_MARK,
A18_EA18_MARK,
PORT106_KEYOUT4_MARK,
DV_DL0_MARK,
MSIOF0_TSCK_MARK,
A19_EA19_MARK,
PORT107_KEYOUT5_MARK,
DV_DL1_MARK,
MSIOF0_TXD_MARK,
A20_EA20_MARK,
PORT108_KEYIN0_MARK,
DV_DL2_MARK,
MSIOF0_RSCK_MARK,
A21_EA21_MARK,
PORT109_KEYIN1_MARK,
DV_DL3_MARK,
MSIOF0_RSYNC_MARK,
A22_EA22_MARK,
PORT110_KEYIN2_MARK,
DV_DL4_MARK,
MSIOF0_MCK0_MARK,
A23_EA23_MARK,
PORT111_KEYIN3_MARK,
DV_DL5_MARK,
MSIOF0_MCK1_MARK,
A24_EA24_MARK,
PORT112_KEYIN4_MARK,
DV_DL6_MARK,
MSIOF0_RXD_MARK,
A25_EA25_MARK,
PORT113_KEYIN5_MARK,
DV_DL7_MARK,
MSIOF0_SS2_MARK,
A26_MARK,
PORT113_KEYIN6_MARK,
DV_CLKIL_MARK,
D0_ED0_NAF0_MARK,
D1_ED1_NAF1_MARK,
D2_ED2_NAF2_MARK,
D3_ED3_NAF3_MARK,
D4_ED4_NAF4_MARK,
D5_ED5_NAF5_MARK,
D6_ED6_NAF6_MARK,
D7_ED7_NAF7_MARK,
D8_ED8_NAF8_MARK,
D9_ED9_NAF9_MARK,
D10_ED10_NAF10_MARK,
D11_ED11_NAF11_MARK,
D12_ED12_NAF12_MARK,
D13_ED13_NAF13_MARK,
D14_ED14_NAF14_MARK,
D15_ED15_NAF15_MARK,
CS4_MARK,
CS5A_MARK,
CS5B_MARK,
FCE1_MARK,
CS6B_MARK,
XCS2_MARK,
FCE0_MARK,
CS6A_MARK,
DACK0_MARK,
WAIT_MARK,
DREQ0_MARK,
RD_XRD_MARK,
A27_MARK,
RDWR_XWE_MARK,
WE0_XWR0_FWE_MARK,
WE1_XWR1_MARK,
FRB_MARK,
CKO_MARK,
NBRSTOUT_MARK,
NBRST_MARK,
RFSPO0_MARK,
PORT146_VIO_CKO2_MARK,
TSTMD_MARK,
VIO_VD_MARK,
VIO_HD_MARK,
VIO_D0_MARK,
VIO_D1_MARK,
VIO_D2_MARK,
VIO_D3_MARK,
VIO_D4_MARK,
VIO_D5_MARK,
VIO_D6_MARK,
VIO_D7_MARK,
VIO_D8_MARK,
VIO_D9_MARK,
VIO_D10_MARK,
VIO_D11_MARK,
VIO_D12_MARK,
VIO_D13_MARK,
VIO_D14_MARK,
VIO_D15_MARK,
VIO_CLK_MARK,
VIO_FIELD_MARK,
VIO_CKO_MARK,
MFG3_IN1_MARK,
MFG3_IN2_MARK,
M9_SLCD_A01_MARK,
MFG3_OUT1_MARK,
TPU0TO0_MARK,
M10_SLCD_CK1_MARK,
MFG4_IN1_MARK,
TPU0TO1_MARK,
M11_SLCD_SO1_MARK,
MFG4_IN2_MARK,
TPU0TO2_MARK,
M12_SLCD_CE1_MARK,
MFG4_OUT1_MARK,
TPU0TO3_MARK,
LCDD0_MARK,
PORT175_KEYOUT0_MARK,
DV_D0_MARK,
SIUCKA_MARK,
MFG0_OUT2_MARK,
LCDD1_MARK,
PORT176_KEYOUT1_MARK,
DV_D1_MARK,
SIUAOLR_MARK,
BBIF2_TSYNC1_MARK,
LCDD2_MARK,
PORT177_KEYOUT2_MARK,
DV_D2_MARK,
SIUAOBT_MARK,
BBIF2_TSCK1_MARK,
LCDD3_MARK,
PORT178_KEYOUT3_MARK,
DV_D3_MARK,
SIUAOSLD_MARK,
BBIF2_TXD1_MARK,
LCDD4_MARK,
PORT179_KEYOUT4_MARK,
DV_D4_MARK,
SIUAISPD_MARK,
MFG1_OUT2_MARK,
LCDD5_MARK,
PORT180_KEYOUT5_MARK,
DV_D5_MARK,
SIUAILR_MARK,
MFG2_OUT2_MARK,
LCDD6_MARK,
DV_D6_MARK,
SIUAIBT_MARK,
MFG3_OUT2_MARK,
XWR2_MARK,
LCDD7_MARK,
DV_D7_MARK,
SIUAISLD_MARK,
MFG4_OUT2_MARK,
XWR3_MARK,
LCDD8_MARK,
DV_D8_MARK,
D16_MARK,
ED16_MARK,
LCDD9_MARK,
DV_D9_MARK,
D17_MARK,
ED17_MARK,
LCDD10_MARK,
DV_D10_MARK,
D18_MARK,
ED18_MARK,
LCDD11_MARK,
DV_D11_MARK,
D19_MARK,
ED19_MARK,
LCDD12_MARK,
DV_D12_MARK,
D20_MARK,
ED20_MARK,
LCDD13_MARK,
DV_D13_MARK,
D21_MARK,
ED21_MARK,
LCDD14_MARK,
DV_D14_MARK,
D22_MARK,
ED22_MARK,
LCDD15_MARK,
DV_D15_MARK,
D23_MARK,
ED23_MARK,
LCDD16_MARK,
DV_HSYNC_MARK,
D24_MARK,
ED24_MARK,
LCDD17_MARK,
DV_VSYNC_MARK,
D25_MARK,
ED25_MARK,
LCDD18_MARK,
DREQ2_MARK,
MSIOF0L_TSCK_MARK,
D26_MARK,
ED26_MARK,
LCDD19_MARK,
MSIOF0L_TSYNC_MARK,
D27_MARK,
ED27_MARK,
LCDD20_MARK,
TS_SPSYNC1_MARK,
MSIOF0L_MCK0_MARK,
D28_MARK,
ED28_MARK,
LCDD21_MARK,
TS_SDAT1_MARK,
MSIOF0L_MCK1_MARK,
D29_MARK,
ED29_MARK,
LCDD22_MARK,
TS_SDEN1_MARK,
MSIOF0L_SS1_MARK,
D30_MARK,
ED30_MARK,
LCDD23_MARK,
TS_SCK1_MARK,
MSIOF0L_SS2_MARK,
D31_MARK,
ED31_MARK,
LCDDCK_MARK,
LCDWR_MARK,
DV_CKO_MARK,
SIUAOSPD_MARK,
LCDRD_MARK,
DACK2_MARK,
MSIOF0L_RSYNC_MARK,
LCDHSYN_MARK,
LCDCS_MARK,
LCDCS2_MARK,
DACK3_MARK,
LCDDISP_MARK,
LCDRS_MARK,
DREQ3_MARK,
MSIOF0L_RSCK_MARK,
LCDCSYN_MARK,
LCDCSYN2_MARK,
DV_CKI_MARK,
LCDLCLK_MARK,
DREQ1_MARK,
MSIOF0L_RXD_MARK,
LCDDON_MARK,
LCDDON2_MARK,
DACK1_MARK,
MSIOF0L_TXD_MARK,
VIO_DR0_MARK,
VIO_DR1_MARK,
VIO_DR2_MARK,
VIO_DR3_MARK,
VIO_DR4_MARK,
VIO_DR5_MARK,
VIO_DR6_MARK,
VIO_DR7_MARK,
VIO_VDR_MARK,
VIO_HDR_MARK,
VIO_CLKR_MARK,
VIO_CKOR_MARK,
SCIFA1_TXD_MARK,
GPS_PGFA0_MARK,
SCIFA1_SCK_MARK,
GPS_PGFA1_MARK,
SCIFA1_RTS_MARK,
GPS_EPPSINMON_MARK,
SCIFA1_RXD_MARK,
SCIFA1_CTS_MARK,
MSIOF1_TXD_MARK,
SCIFA1_TXD2_MARK,
GPS_TXD_MARK,
MSIOF1_TSYNC_MARK,
SCIFA1_CTS2_MARK,
I2C_SDA2_MARK,
MSIOF1_TSCK_MARK,
SCIFA1_SCK2_MARK,
MSIOF1_RXD_MARK,
SCIFA1_RXD2_MARK,
GPS_RXD_MARK,
MSIOF1_RSCK_MARK,
SCIFA1_RTS2_MARK,
MSIOF1_RSYNC_MARK,
I2C_SCL2_MARK,
MSIOF1_MCK0_MARK,
MSIOF1_MCK1_MARK,
MSIOF1_SS1_MARK,
EDBGREQ3_MARK,
MSIOF1_SS2_MARK,
PORT236_IROUT_MARK,
IRDA_OUT_MARK,
IRDA_IN_MARK,
IRDA_FIRSEL_MARK,
TPU1TO0_MARK,
TS_SPSYNC3_MARK,
TPU1TO1_MARK,
TS_SDAT3_MARK,
TPU1TO2_MARK,
TS_SDEN3_MARK,
PORT241_MSIOF2_SS1_MARK,
TPU1TO3_MARK,
PORT242_MSIOF2_TSCK_MARK,
M13_BSW_MARK,
PORT243_MSIOF2_TSYNC_MARK,
M14_GSW_MARK,
PORT244_MSIOF2_TXD_MARK,
PORT245_IROUT_MARK,
M15_RSW_MARK,
SOUT3_MARK,
SCIFA2_TXD1_MARK,
SIN3_MARK,
SCIFA2_RXD1_MARK,
XRTS3_MARK,
SCIFA2_RTS1_MARK,
PORT248_MSIOF2_SS2_MARK,
XCTS3_MARK,
SCIFA2_CTS1_MARK,
PORT249_MSIOF2_RXD_MARK,
DINT_MARK,
SCIFA2_SCK1_MARK,
TS_SCK3_MARK,
SDHICLK0_MARK,
TCK2_MARK,
SDHICD0_MARK,
SDHID0_0_MARK,
TMS2_MARK,
SDHID0_1_MARK,
TDO2_MARK,
SDHID0_2_MARK,
TDI2_MARK,
SDHID0_3_MARK,
RTCK2_MARK,
SDHICMD0_MARK,
TRST2_MARK,
SDHIWP0_MARK,
EDBGREQ2_MARK,
SDHICLK1_MARK,
TCK3_MARK,
SDHID1_0_MARK,
M11_SLCD_SO2_MARK,
TS_SPSYNC2_MARK,
TMS3_MARK,
SDHID1_1_MARK,
M9_SLCD_AO2_MARK,
TS_SDAT2_MARK,
TDO3_MARK,
SDHID1_2_MARK,
M10_SLCD_CK2_MARK,
TS_SDEN2_MARK,
TDI3_MARK,
SDHID1_3_MARK,
M12_SLCD_CE2_MARK,
TS_SCK2_MARK,
RTCK3_MARK,
SDHICMD1_MARK,
TRST3_MARK,
SDHICLK2_MARK,
SCIFB_SCK_MARK,
SDHID2_0_MARK,
SCIFB_TXD_MARK,
SDHID2_1_MARK,
SCIFB_CTS_MARK,
SDHID2_2_MARK,
SCIFB_RXD_MARK,
SDHID2_3_MARK,
SCIFB_RTS_MARK,
SDHICMD2_MARK,
RESETOUTS_MARK,
DIVLOCK_MARK,
PINMUX_MARK_END
} |
1.8.2