| enum | {
PINMUX_RESERVED = 0,
PINMUX_DATA_BEGIN,
PORT_ALL =(DATA),
PINMUX_DATA_END,
PINMUX_INPUT_BEGIN,
PORT_ALL =(DATA),
PINMUX_INPUT_END,
PINMUX_INPUT_PULLUP_BEGIN,
PORT_ALL =(DATA),
PINMUX_INPUT_PULLUP_END,
PINMUX_INPUT_PULLDOWN_BEGIN,
PORT_ALL =(DATA),
PINMUX_INPUT_PULLDOWN_END,
PINMUX_OUTPUT_BEGIN,
PORT_ALL =(DATA),
PINMUX_OUTPUT_END,
PINMUX_FUNCTION_BEGIN,
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
PORT_ALL =(DATA),
MSEL1CR_31_0,
MSEL1CR_31_1,
MSEL1CR_30_0,
MSEL1CR_30_1,
MSEL1CR_29_0,
MSEL1CR_29_1,
MSEL1CR_28_0,
MSEL1CR_28_1,
MSEL1CR_27_0,
MSEL1CR_27_1,
MSEL1CR_26_0,
MSEL1CR_26_1,
MSEL1CR_16_0,
MSEL1CR_16_1,
MSEL1CR_15_0,
MSEL1CR_15_1,
MSEL1CR_14_0,
MSEL1CR_14_1,
MSEL1CR_13_0,
MSEL1CR_13_1,
MSEL1CR_12_0,
MSEL1CR_12_1,
MSEL1CR_9_0,
MSEL1CR_9_1,
MSEL1CR_8_0,
MSEL1CR_8_1,
MSEL1CR_7_0,
MSEL1CR_7_1,
MSEL1CR_6_0,
MSEL1CR_6_1,
MSEL1CR_4_0,
MSEL1CR_4_1,
MSEL1CR_3_0,
MSEL1CR_3_1,
MSEL1CR_2_0,
MSEL1CR_2_1,
MSEL1CR_0_0,
MSEL1CR_0_1,
MSEL3CR_27_0,
MSEL3CR_27_1,
MSEL3CR_26_0,
MSEL3CR_26_1,
MSEL3CR_21_0,
MSEL3CR_21_1,
MSEL3CR_20_0,
MSEL3CR_20_1,
MSEL3CR_15_0,
MSEL3CR_15_1,
MSEL3CR_9_0,
MSEL3CR_9_1,
MSEL3CR_6_0,
MSEL3CR_6_1,
MSEL4CR_19_0,
MSEL4CR_19_1,
MSEL4CR_18_0,
MSEL4CR_18_1,
MSEL4CR_17_0,
MSEL4CR_17_1,
MSEL4CR_16_0,
MSEL4CR_16_1,
MSEL4CR_15_0,
MSEL4CR_15_1,
MSEL4CR_14_0,
MSEL4CR_14_1,
MSEL4CR_10_0,
MSEL4CR_10_1,
MSEL4CR_6_0,
MSEL4CR_6_1,
MSEL4CR_4_0,
MSEL4CR_4_1,
MSEL4CR_1_0,
MSEL4CR_1_1,
PINMUX_FUNCTION_END,
PINMUX_MARK_BEGIN,
IRQ0_6_MARK,
IRQ0_162_MARK,
IRQ1_MARK,
IRQ2_4_MARK,
IRQ2_5_MARK,
IRQ3_8_MARK,
IRQ3_16_MARK,
IRQ4_17_MARK,
IRQ4_163_MARK,
IRQ5_MARK,
IRQ6_39_MARK,
IRQ6_164_MARK,
IRQ7_40_MARK,
IRQ7_167_MARK,
IRQ8_41_MARK,
IRQ8_168_MARK,
IRQ9_42_MARK,
IRQ9_169_MARK,
IRQ10_MARK,
IRQ11_MARK,
IRQ12_80_MARK,
IRQ12_137_MARK,
IRQ13_81_MARK,
IRQ13_145_MARK,
IRQ14_82_MARK,
IRQ14_146_MARK,
IRQ15_83_MARK,
IRQ15_147_MARK,
IRQ16_84_MARK,
IRQ16_170_MARK,
IRQ17_MARK,
IRQ18_MARK,
IRQ19_MARK,
IRQ20_MARK,
IRQ21_MARK,
IRQ22_MARK,
IRQ23_MARK,
IRQ24_MARK,
IRQ25_MARK,
IRQ26_121_MARK,
IRQ26_172_MARK,
IRQ27_122_MARK,
IRQ27_180_MARK,
IRQ28_123_MARK,
IRQ28_181_MARK,
IRQ29_129_MARK,
IRQ29_182_MARK,
IRQ30_130_MARK,
IRQ30_183_MARK,
IRQ31_138_MARK,
IRQ31_184_MARK,
MSIOF0_TSYNC_MARK,
MSIOF0_TSCK_MARK,
MSIOF0_RXD_MARK,
MSIOF0_RSCK_MARK,
MSIOF0_RSYNC_MARK,
MSIOF0_MCK0_MARK,
MSIOF0_MCK1_MARK,
MSIOF0_SS1_MARK,
MSIOF0_SS2_MARK,
MSIOF0_TXD_MARK,
MSIOF1_TSCK_39_MARK,
MSIOF1_TSYNC_40_MARK,
MSIOF1_TSCK_88_MARK,
MSIOF1_TSYNC_89_MARK,
MSIOF1_TXD_41_MARK,
MSIOF1_RXD_42_MARK,
MSIOF1_TXD_90_MARK,
MSIOF1_RXD_91_MARK,
MSIOF1_SS1_43_MARK,
MSIOF1_SS2_44_MARK,
MSIOF1_SS1_92_MARK,
MSIOF1_SS2_93_MARK,
MSIOF1_RSCK_MARK,
MSIOF1_RSYNC_MARK,
MSIOF1_MCK0_MARK,
MSIOF1_MCK1_MARK,
MSIOF2_RSCK_MARK,
MSIOF2_RSYNC_MARK,
MSIOF2_MCK0_MARK,
MSIOF2_MCK1_MARK,
MSIOF2_SS1_MARK,
MSIOF2_SS2_MARK,
MSIOF2_TSYNC_MARK,
MSIOF2_TSCK_MARK,
MSIOF2_RXD_MARK,
MSIOF2_TXD_MARK,
BBIF1_RXD_MARK,
BBIF1_TSYNC_MARK,
BBIF1_TSCK_MARK,
BBIF1_TXD_MARK,
BBIF1_RSCK_MARK,
BBIF1_RSYNC_MARK,
BBIF1_FLOW_MARK,
BB_RX_FLOW_N_MARK,
BBIF2_TSCK1_MARK,
BBIF2_TSYNC1_MARK,
BBIF2_TXD1_MARK,
BBIF2_RXD_MARK,
FSIACK_MARK,
FSIBCK_MARK,
FSIAILR_MARK,
FSIAIBT_MARK,
FSIAISLD_MARK,
FSIAOMC_MARK,
FSIAOLR_MARK,
FSIAOBT_MARK,
FSIAOSLD_MARK,
FSIASPDIF_11_MARK,
FSIASPDIF_15_MARK,
FMSOCK_MARK,
FMSOOLR_MARK,
FMSIOLR_MARK,
FMSOOBT_MARK,
FMSIOBT_MARK,
FMSOSLD_MARK,
FMSOILR_MARK,
FMSIILR_MARK,
FMSOIBT_MARK,
FMSIIBT_MARK,
FMSISLD_MARK,
FMSICK_MARK,
SCIFA0_TXD_MARK,
SCIFA0_RXD_MARK,
SCIFA0_SCK_MARK,
SCIFA0_RTS_MARK,
SCIFA0_CTS_MARK,
SCIFA1_TXD_MARK,
SCIFA1_RXD_MARK,
SCIFA1_SCK_MARK,
SCIFA1_RTS_MARK,
SCIFA1_CTS_MARK,
SCIFA2_CTS1_MARK,
SCIFA2_RTS1_MARK,
SCIFA2_TXD1_MARK,
SCIFA2_RXD1_MARK,
SCIFA2_SCK1_MARK,
SCIFA3_CTS_43_MARK,
SCIFA3_CTS_140_MARK,
SCIFA3_RTS_44_MARK,
SCIFA3_RTS_141_MARK,
SCIFA3_SCK_MARK,
SCIFA3_TXD_MARK,
SCIFA3_RXD_MARK,
SCIFA4_RXD_MARK,
SCIFA4_TXD_MARK,
SCIFA5_RXD_MARK,
SCIFA5_TXD_MARK,
SCIFB_SCK_MARK,
SCIFB_RTS_MARK,
SCIFB_CTS_MARK,
SCIFB_TXD_MARK,
SCIFB_RXD_MARK,
VIO_HD_MARK,
VIO_CKO1_MARK,
VIO_CKO2_MARK,
VIO_VD_MARK,
VIO_CLK_MARK,
VIO_FIELD_MARK,
VIO_CKO_MARK,
VIO_D0_MARK,
VIO_D1_MARK,
VIO_D2_MARK,
VIO_D3_MARK,
VIO_D4_MARK,
VIO_D5_MARK,
VIO_D6_MARK,
VIO_D7_MARK,
VIO_D8_MARK,
VIO_D9_MARK,
VIO_D10_MARK,
VIO_D11_MARK,
VIO_D12_MARK,
VIO_D13_MARK,
VIO_D14_MARK,
VIO_D15_MARK,
IDIN_0_MARK,
EXTLP_0_MARK,
OVCN2_0_MARK,
PWEN_0_MARK,
OVCN_0_MARK,
VBUS0_0_MARK,
IDIN_1_18_MARK,
IDIN_1_113_MARK,
PWEN_1_115_MARK,
PWEN_1_138_MARK,
OVCN_1_114_MARK,
OVCN_1_162_MARK,
EXTLP_1_MARK,
OVCN2_1_MARK,
VBUS0_1_MARK,
GPI0_MARK,
GPI1_MARK,
GPO0_MARK,
GPO1_MARK,
BS_MARK,
WE1_MARK,
CKO_MARK,
WAIT_MARK,
RDWR_MARK,
A0_MARK,
A1_MARK,
A2_MARK,
A3_MARK,
A6_MARK,
A7_MARK,
A8_MARK,
A9_MARK,
A10_MARK,
A11_MARK,
A12_MARK,
A13_MARK,
A14_MARK,
A15_MARK,
A16_MARK,
A17_MARK,
A18_MARK,
A19_MARK,
A20_MARK,
A21_MARK,
A22_MARK,
A23_MARK,
A24_MARK,
A25_MARK,
A26_MARK,
CS0_MARK,
CS2_MARK,
CS4_MARK,
CS5A_MARK,
CS5B_MARK,
CS6A_MARK,
RD_FSC_MARK,
WE0_FWE_MARK,
A4_FOE_MARK,
A5_FCDE_MARK,
D0_NAF0_MARK,
D1_NAF1_MARK,
D2_NAF2_MARK,
D3_NAF3_MARK,
D4_NAF4_MARK,
D5_NAF5_MARK,
D6_NAF6_MARK,
D7_NAF7_MARK,
D8_NAF8_MARK,
D9_NAF9_MARK,
D10_NAF10_MARK,
D11_NAF11_MARK,
D12_NAF12_MARK,
D13_NAF13_MARK,
D14_NAF14_MARK,
D15_NAF15_MARK,
MMCD0_0_MARK,
MMCD0_1_MARK,
MMCD0_2_MARK,
MMCD0_3_MARK,
MMCD0_4_MARK,
MMCD0_5_MARK,
MMCD0_6_MARK,
MMCD0_7_MARK,
MMCCMD0_MARK,
MMCCLK0_MARK,
MMCD1_0_MARK,
MMCD1_1_MARK,
MMCD1_2_MARK,
MMCD1_3_MARK,
MMCD1_4_MARK,
MMCD1_5_MARK,
MMCD1_6_MARK,
MMCD1_7_MARK,
MMCCLK1_MARK,
MMCCMD1_MARK,
VINT_I_MARK,
FCE1_MARK,
FCE0_MARK,
FRB_MARK,
GP_RX_FLAG_MARK,
GP_RX_DATA_MARK,
GP_TX_READY_MARK,
GP_RX_WAKE_MARK,
MP_TX_FLAG_MARK,
MP_TX_DATA_MARK,
MP_RX_READY_MARK,
MP_TX_WAKE_MARK,
MFIv6_MARK,
MFIv4_MARK,
MEMC_CS0_MARK,
MEMC_BUSCLK_MEMC_A0_MARK,
MEMC_CS1_MEMC_A1_MARK,
MEMC_ADV_MEMC_DREQ0_MARK,
MEMC_WAIT_MEMC_DREQ1_MARK,
MEMC_NOE_MARK,
MEMC_NWE_MARK,
MEMC_INT_MARK,
MEMC_AD0_MARK,
MEMC_AD1_MARK,
MEMC_AD2_MARK,
MEMC_AD3_MARK,
MEMC_AD4_MARK,
MEMC_AD5_MARK,
MEMC_AD6_MARK,
MEMC_AD7_MARK,
MEMC_AD8_MARK,
MEMC_AD9_MARK,
MEMC_AD10_MARK,
MEMC_AD11_MARK,
MEMC_AD12_MARK,
MEMC_AD13_MARK,
MEMC_AD14_MARK,
MEMC_AD15_MARK,
SIM_RST_MARK,
SIM_CLK_MARK,
SIM_D_MARK,
TPU0TO0_MARK,
TPU0TO1_MARK,
TPU0TO2_93_MARK,
TPU0TO2_99_MARK,
TPU0TO3_MARK,
I2C_SCL2_MARK,
I2C_SDA2_MARK,
I2C_SCL3_MARK,
I2C_SDA3_MARK,
I2C_SCL3S_MARK,
I2C_SDA3S_MARK,
I2C_SCL4_MARK,
I2C_SDA4_MARK,
I2C_SCL4S_MARK,
I2C_SDA4S_MARK,
KEYOUT0_MARK,
KEYIN0_121_MARK,
KEYIN0_136_MARK,
KEYOUT1_MARK,
KEYIN1_122_MARK,
KEYIN1_135_MARK,
KEYOUT2_MARK,
KEYIN2_123_MARK,
KEYIN2_134_MARK,
KEYOUT3_MARK,
KEYIN3_124_MARK,
KEYIN3_133_MARK,
KEYOUT4_MARK,
KEYIN4_MARK,
KEYOUT5_MARK,
KEYIN5_MARK,
KEYOUT6_MARK,
KEYIN6_MARK,
KEYOUT7_MARK,
KEYIN7_MARK,
LCDC0_SELECT_MARK,
LCDC1_SELECT_MARK,
LCDHSYN_MARK,
LCDCS_MARK,
LCDVSYN_MARK,
LCDDCK_MARK,
LCDWR_MARK,
LCDRD_MARK,
LCDDISP_MARK,
LCDRS_MARK,
LCDLCLK_MARK,
LCDDON_MARK,
LCDD0_MARK,
LCDD1_MARK,
LCDD2_MARK,
LCDD3_MARK,
LCDD4_MARK,
LCDD5_MARK,
LCDD6_MARK,
LCDD7_MARK,
LCDD8_MARK,
LCDD9_MARK,
LCDD10_MARK,
LCDD11_MARK,
LCDD12_MARK,
LCDD13_MARK,
LCDD14_MARK,
LCDD15_MARK,
LCDD16_MARK,
LCDD17_MARK,
LCDD18_MARK,
LCDD19_MARK,
LCDD20_MARK,
LCDD21_MARK,
LCDD22_MARK,
LCDD23_MARK,
IRDA_OUT_MARK,
IRDA_IN_MARK,
IRDA_FIRSEL_MARK,
IROUT_139_MARK,
IROUT_140_MARK,
TS0_1SELECT_MARK,
TS0_2SELECT_MARK,
TS1_1SELECT_MARK,
TS1_2SELECT_MARK,
TS_SPSYNC1_MARK,
TS_SDAT1_MARK,
TS_SDEN1_MARK,
TS_SCK1_MARK,
TS_SPSYNC2_MARK,
TS_SDAT2_MARK,
TS_SDEN2_MARK,
TS_SCK2_MARK,
HDMI_HPD_MARK,
HDMI_CEC_MARK,
SDHICLK0_MARK,
SDHICD0_MARK,
SDHICMD0_MARK,
SDHIWP0_MARK,
SDHID0_0_MARK,
SDHID0_1_MARK,
SDHID0_2_MARK,
SDHID0_3_MARK,
SDHICLK1_MARK,
SDHICMD1_MARK,
SDHID1_0_MARK,
SDHID1_1_MARK,
SDHID1_2_MARK,
SDHID1_3_MARK,
SDHICLK2_MARK,
SDHICMD2_MARK,
SDHID2_0_MARK,
SDHID2_1_MARK,
SDHID2_2_MARK,
SDHID2_3_MARK,
SDENC_CPG_MARK,
SDENC_DV_CLKI_MARK,
PINMUX_MARK_END
} |
1.8.2