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pfc-sh7377.c File Reference
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sh_pfc.h>
#include <mach/sh7377.h>

Go to the source code of this file.

Macros

#define CPU_ALL_PORT(fn, pfx, sfx)
 

Enumerations

enum  {
  PINMUX_RESERVED = 0, PINMUX_DATA_BEGIN, PORT_ALL =(DATA), PINMUX_DATA_END,
  PINMUX_INPUT_BEGIN, PORT_ALL =(DATA), PINMUX_INPUT_END, PINMUX_INPUT_PULLUP_BEGIN,
  PORT_ALL =(DATA), PINMUX_INPUT_PULLUP_END, PINMUX_INPUT_PULLDOWN_BEGIN, PORT_ALL =(DATA),
  PINMUX_INPUT_PULLDOWN_END, PINMUX_OUTPUT_BEGIN, PORT_ALL =(DATA), PINMUX_OUTPUT_END,
  PINMUX_FUNCTION_BEGIN, PORT_ALL =(DATA), PORT_ALL =(DATA), PORT_ALL =(DATA),
  PORT_ALL =(DATA), PORT_ALL =(DATA), PORT_ALL =(DATA), PORT_ALL =(DATA),
  PORT_ALL =(DATA), PORT_ALL =(DATA), PORT_ALL =(DATA), MSELBCR_MSEL17_1,
  MSELBCR_MSEL17_0, MSELBCR_MSEL16_1, MSELBCR_MSEL16_0, PINMUX_FUNCTION_END,
  PINMUX_MARK_BEGIN, PORT66_KEYIN0_PU_MARK, PORT67_KEYIN1_PU_MARK, PORT68_KEYIN2_PU_MARK,
  PORT69_KEYIN3_PU_MARK, PORT70_KEYIN4_PU_MARK, PORT71_KEYIN5_PU_MARK, PORT72_KEYIN6_PU_MARK,
  VBUS_0_MARK, CPORT0_MARK, CPORT1_MARK, CPORT2_MARK,
  CPORT3_MARK, CPORT4_MARK, CPORT5_MARK, CPORT6_MARK,
  CPORT7_MARK, CPORT8_MARK, CPORT9_MARK, CPORT10_MARK,
  CPORT11_MARK, SIN2_MARK, CPORT12_MARK, XCTS2_MARK,
  CPORT13_MARK, RFSPO4_MARK, CPORT14_MARK, RFSPO5_MARK,
  CPORT15_MARK, SCIFA0_SCK_MARK, GPS_AGC2_MARK, CPORT16_MARK,
  SCIFA0_TXD_MARK, GPS_AGC3_MARK, CPORT17_IC_OE_MARK, SOUT2_MARK,
  CPORT18_MARK, XRTS2_MARK, PORT19_VIO_CKO2_MARK, CPORT19_MPORT1_MARK,
  CPORT20_MARK, RFSPO6_MARK, CPORT21_MARK, STATUS0_MARK,
  CPORT22_MARK, STATUS1_MARK, CPORT23_MARK, STATUS2_MARK,
  RFSPO7_MARK, B_SYNLD1_MARK, B_SYNLD2_MARK, SYSENMSK_MARK,
  XMAINPS_MARK, XDIVPS_MARK, XIDRST_MARK, IDCLK_MARK,
  IC_DP_MARK, IDIO_MARK, IC_DM_MARK, SOUT1_MARK,
  SCIFA4_TXD_MARK, M02_BERDAT_MARK, SIN1_MARK, SCIFA4_RXD_MARK,
  XWUP_MARK, XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK,
  XCTS1_MARK, SCIFA4_CTS_MARK, PCMCLKO_MARK, SYNC8KO_MARK,
  DNPCM_A_MARK, UPPCM_A_MARK, VACK_MARK, XTALB1L_MARK,
  GPS_AGC1_MARK, SCIFA0_RTS_MARK, GPS_AGC4_MARK, SCIFA0_RXD_MARK,
  GPS_PWRDOWN_MARK, SCIFA0_CTS_MARK, GPS_IM_MARK, GPS_IS_MARK,
  GPS_QM_MARK, GPS_QS_MARK, FMSOCK_MARK, PORT49_IRDA_OUT_MARK,
  PORT49_IROUT_MARK, FMSOOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK,
  IPORT3_MARK, FMSIOLR_MARK, FMSOOBT_MARK, BBIF2_TSCK2_MARK,
  TPU2TO3_MARK, OPORT1_MARK, FMSIOBT_MARK, FMSOSLD_MARK,
  BBIF2_TXD2_MARK, OPORT2_MARK, FMSOILR_MARK, PORT53_IRDA_IN_MARK,
  TPU3TO3_MARK, OPORT3_MARK, FMSIILR_MARK, FMSOIBT_MARK,
  PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FMSIIBT_MARK, FMSISLD_MARK,
  MFG0_OUT1_MARK, TPU0TO0_MARK, A0_EA0_MARK, BS_MARK,
  A12_EA12_MARK, PORT58_VIO_CKOR_MARK, TPU4TO2_MARK, A13_EA13_MARK,
  PORT59_IROUT_MARK, MFG0_OUT2_MARK, TPU0TO1_MARK, A14_EA14_MARK,
  PORT60_KEYOUT5_MARK, A15_EA15_MARK, PORT61_KEYOUT4_MARK, A16_EA16_MARK,
  PORT62_KEYOUT3_MARK, MSIOF0_SS1_MARK, A17_EA17_MARK, PORT63_KEYOUT2_MARK,
  MSIOF0_TSYNC_MARK, A18_EA18_MARK, PORT64_KEYOUT1_MARK, MSIOF0_TSCK_MARK,
  A19_EA19_MARK, PORT65_KEYOUT0_MARK, MSIOF0_TXD_MARK, A20_EA20_MARK,
  PORT66_KEYIN0_MARK, MSIOF0_RSCK_MARK, A21_EA21_MARK, PORT67_KEYIN1_MARK,
  MSIOF0_RSYNC_MARK, A22_EA22_MARK, PORT68_KEYIN2_MARK, MSIOF0_MCK0_MARK,
  A23_EA23_MARK, PORT69_KEYIN3_MARK, MSIOF0_MCK1_MARK, A24_EA24_MARK,
  PORT70_KEYIN4_MARK, MSIOF0_RXD_MARK, A25_EA25_MARK, PORT71_KEYIN5_MARK,
  MSIOF0_SS2_MARK, A26_MARK, PORT72_KEYIN6_MARK, D0_ED0_NAF0_MARK,
  D1_ED1_NAF1_MARK, D2_ED2_NAF2_MARK, D3_ED3_NAF3_MARK, D4_ED4_NAF4_MARK,
  D5_ED5_NAF5_MARK, D6_ED6_NAF6_MARK, D7_ED7_NAF7_MARK, D8_ED8_NAF8_MARK,
  D9_ED9_NAF9_MARK, D10_ED10_NAF10_MARK, D11_ED11_NAF11_MARK, D12_ED12_NAF12_MARK,
  D13_ED13_NAF13_MARK, D14_ED14_NAF14_MARK, D15_ED15_NAF15_MARK, CS4_MARK,
  CS5A_MARK, FMSICK_MARK, CS5B_MARK, FCE1_MARK,
  CS6B_MARK, XCS2_MARK, CS6A_MARK, DACK0_MARK,
  FCE0_MARK, WAIT_MARK, DREQ0_MARK, RD_XRD_MARK,
  WE0_XWR0_FWE_MARK, WE1_XWR1_MARK, FRB_MARK, CKO_MARK,
  NBRSTOUT_MARK, NBRST_MARK, GPS_EPPSIN_MARK, LATCHPULSE_MARK,
  LTESIGNAL_MARK, LEGACYSTATE_MARK, TCKON_MARK, VIO_VD_MARK,
  PORT128_KEYOUT0_MARK, IPORT0_MARK, VIO_HD_MARK, PORT129_KEYOUT1_MARK,
  IPORT1_MARK, VIO_D0_MARK, PORT130_KEYOUT2_MARK, PORT130_MSIOF2_RXD_MARK,
  VIO_D1_MARK, PORT131_KEYOUT3_MARK, PORT131_MSIOF2_SS1_MARK, VIO_D2_MARK,
  PORT132_KEYOUT4_MARK, PORT132_MSIOF2_SS2_MARK, VIO_D3_MARK, PORT133_KEYOUT5_MARK,
  PORT133_MSIOF2_TSYNC_MARK, VIO_D4_MARK, PORT134_KEYIN0_MARK, PORT134_MSIOF2_TXD_MARK,
  VIO_D5_MARK, PORT135_KEYIN1_MARK, PORT135_MSIOF2_TSCK_MARK, VIO_D6_MARK,
  PORT136_KEYIN2_MARK, VIO_D7_MARK, PORT137_KEYIN3_MARK, VIO_D8_MARK,
  M9_SLCD_A01_MARK, PORT138_FSIAOMC_MARK, VIO_D9_MARK, M10_SLCD_CK1_MARK,
  PORT139_FSIAOLR_MARK, VIO_D10_MARK, M11_SLCD_SO1_MARK, TPU0TO2_MARK,
  PORT140_FSIAOBT_MARK, VIO_D11_MARK, M12_SLCD_CE1_MARK, TPU0TO3_MARK,
  PORT141_FSIAOSLD_MARK, VIO_D12_MARK, M13_BSW_MARK, PORT142_FSIACK_MARK,
  VIO_D13_MARK, M14_GSW_MARK, PORT143_FSIAILR_MARK, VIO_D14_MARK,
  M15_RSW_MARK, PORT144_FSIAIBT_MARK, VIO_D15_MARK, TPU1TO3_MARK,
  PORT145_FSIAISLD_MARK, VIO_CLK_MARK, PORT146_KEYIN4_MARK, IPORT2_MARK,
  VIO_FIELD_MARK, PORT147_KEYIN5_MARK, VIO_CKO_MARK, PORT148_KEYIN6_MARK,
  A27_MARK, RDWR_XWE_MARK, MFG0_IN1_MARK, MFG0_IN2_MARK,
  TS_SPSYNC3_MARK, MSIOF2_RSCK_MARK, TS_SDAT3_MARK, MSIOF2_RSYNC_MARK,
  TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK, SOUT3_MARK,
  SCIFA2_TXD1_MARK, MSIOF2_MCK0_MARK, SIN3_MARK, SCIFA2_RXD1_MARK,
  MSIOF2_MCK1_MARK, XRTS3_MARK, SCIFA2_RTS1_MARK, PORT156_MSIOF2_SS2_MARK,
  XCTS3_MARK, SCIFA2_CTS1_MARK, PORT157_MSIOF2_RXD_MARK, DINT_MARK,
  SCIFA2_SCK1_MARK, TS_SCK3_MARK, PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK,
  NMI_MARK, PORT160_SCIFB_TXD_MARK, PORT160_SCIFA5_TXD_MARK, SOUT0_MARK,
  PORT161_SCIFB_CTS_MARK, PORT161_SCIFA5_CTS_MARK, XCTS0_MARK, MFG3_IN2_MARK,
  PORT162_SCIFB_RXD_MARK, PORT162_SCIFA5_RXD_MARK, SIN0_MARK, MFG3_IN1_MARK,
  PORT163_SCIFB_RTS_MARK, PORT163_SCIFA5_RTS_MARK, XRTS0_MARK, MFG3_OUT1_MARK,
  TPU3TO0_MARK, LCDD0_MARK, PORT192_KEYOUT0_MARK, EXT_CKI_MARK,
  LCDD1_MARK, PORT193_KEYOUT1_MARK, PORT193_SCIFA5_CTS_MARK, BBIF2_TSYNC1_MARK,
  LCDD2_MARK, PORT194_KEYOUT2_MARK, PORT194_SCIFA5_RTS_MARK, BBIF2_TSCK1_MARK,
  LCDD3_MARK, PORT195_KEYOUT3_MARK, PORT195_SCIFA5_RXD_MARK, BBIF2_TXD1_MARK,
  LCDD4_MARK, PORT196_KEYOUT4_MARK, PORT196_SCIFA5_TXD_MARK, LCDD5_MARK,
  PORT197_KEYOUT5_MARK, PORT197_SCIFA5_SCK_MARK, MFG2_OUT2_MARK, TPU2TO1_MARK,
  LCDD6_MARK, XWR2_MARK, LCDD7_MARK, TPU4TO1_MARK,
  MFG4_OUT2_MARK, XWR3_MARK, LCDD8_MARK, PORT200_KEYIN0_MARK,
  VIO_DR0_MARK, D16_MARK, ED16_MARK, LCDD9_MARK,
  PORT201_KEYIN1_MARK, VIO_DR1_MARK, D17_MARK, ED17_MARK,
  LCDD10_MARK, PORT202_KEYIN2_MARK, VIO_DR2_MARK, D18_MARK,
  ED18_MARK, LCDD11_MARK, PORT203_KEYIN3_MARK, VIO_DR3_MARK,
  D19_MARK, ED19_MARK, LCDD12_MARK, PORT204_KEYIN4_MARK,
  VIO_DR4_MARK, D20_MARK, ED20_MARK, LCDD13_MARK,
  PORT205_KEYIN5_MARK, VIO_DR5_MARK, D21_MARK, ED21_MARK,
  LCDD14_MARK, PORT206_KEYIN6_MARK, VIO_DR6_MARK, D22_MARK,
  ED22_MARK, LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, PORT207_KEYOUT0_MARK,
  VIO_DR7_MARK, D23_MARK, ED23_MARK, LCDD16_MARK,
  PORT208_MSIOF0L_SS2_MARK, PORT208_KEYOUT1_MARK, VIO_VDR_MARK, D24_MARK,
  ED24_MARK, LCDD17_MARK, PORT209_KEYOUT2_MARK, VIO_HDR_MARK,
  D25_MARK, ED25_MARK, LCDD18_MARK, DREQ2_MARK,
  PORT210_MSIOF0L_SS1_MARK, D26_MARK, ED26_MARK, LCDD19_MARK,
  PORT211_MSIOF0L_SS2_MARK, D27_MARK, ED27_MARK, LCDD20_MARK,
  TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK, ED28_MARK,
  LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK,
  ED29_MARK, LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK,
  D30_MARK, ED30_MARK, LCDD23_MARK, TS_SCK1_MARK,
  MSIOF0L_RSYNC_MARK, D31_MARK, ED31_MARK, LCDDCK_MARK,
  LCDWR_MARK, PORT216_KEYOUT3_MARK, VIO_CLKR_MARK, LCDRD_MARK,
  DACK2_MARK, MSIOF0L_TSYNC_MARK, LCDHSYN_MARK, LCDCS_MARK,
  LCDCS2_MARK, DACK3_MARK, PORT218_VIO_CKOR_MARK, PORT218_KEYOUT4_MARK,
  LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_TSCK_MARK,
  LCDVSYN_MARK, LCDVSYN2_MARK, PORT220_KEYOUT5_MARK, LCDLCLK_MARK,
  DREQ1_MARK, PWEN_MARK, MSIOF0L_RXD_MARK, LCDDON_MARK,
  LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK,
  SCIFA1_TXD_MARK, OVCN2_MARK, EXTLP_MARK, SCIFA1_SCK_MARK,
  USBTERM_MARK, PORT226_VIO_CKO2_MARK, SCIFA1_RTS_MARK, IDIN_MARK,
  SCIFA1_RXD_MARK, SCIFA1_CTS_MARK, MFG1_IN1_MARK, MSIOF1_TXD_MARK,
  SCIFA2_TXD2_MARK, PORT230_FSIAOMC_MARK, MSIOF1_TSYNC_MARK, SCIFA2_CTS2_MARK,
  PORT231_FSIAOLR_MARK, MSIOF1_TSCK_MARK, SCIFA2_SCK2_MARK, PORT232_FSIAOBT_MARK,
  MSIOF1_RXD_MARK, SCIFA2_RXD2_MARK, GPS_VCOTRIG_MARK, PORT233_FSIACK_MARK,
  MSIOF1_RSCK_MARK, SCIFA2_RTS2_MARK, PORT234_FSIAOSLD_MARK, MSIOF1_RSYNC_MARK,
  OPORT0_MARK, MFG1_IN2_MARK, PORT235_FSIAILR_MARK, MSIOF1_MCK0_MARK,
  I2C_SDA2_MARK, PORT236_FSIAIBT_MARK, MSIOF1_MCK1_MARK, I2C_SCL2_MARK,
  PORT237_FSIAISLD_MARK, MSIOF1_SS1_MARK, EDBGREQ3_MARK, MSIOF1_SS2_MARK,
  SCIFA6_TXD_MARK, PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK,
  TPU4TO0_MARK, PORT242_IRDA_IN_MARK, MFG4_IN2_MARK, PORT243_IRDA_FIRSEL_MARK,
  PORT243_VIO_CKO2_MARK, PORT244_SCIFA5_CTS_MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS_MARK,
  PORT244_MSIOF2_RXD_MARK, PORT245_SCIFA5_RTS_MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS_MARK,
  PORT245_MSIOF2_TXD_MARK, PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK,
  TPU1TO0_MARK, PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK,
  TPU3TO1_MARK, PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK,
  TPU2TO0_MARK, PORT248_MSIOF2_TSCK_MARK, PORT249_IROUT_MARK, MFG4_IN1_MARK,
  PORT249_MSIOF2_TSYNC_MARK, SDHICLK0_MARK, TCK2_SWCLK_MC0_MARK, SDHICD0_MARK,
  SDHID0_0_MARK, TMS2_SWDIO_MC0_MARK, SDHID0_1_MARK, TDO2_SWO0_MC0_MARK,
  SDHID0_2_MARK, TDI2_MARK, SDHID0_3_MARK, RTCK2_SWO1_MC0_MARK,
  SDHICMD0_MARK, TRST2_MARK, SDHIWP0_MARK, EDBGREQ2_MARK,
  SDHICLK1_MARK, TCK3_SWCLK_MC1_MARK, SDHID1_0_MARK, M11_SLCD_SO2_MARK,
  TS_SPSYNC2_MARK, TMS3_SWDIO_MC1_MARK, SDHID1_1_MARK, M9_SLCD_A02_MARK,
  TS_SDAT2_MARK, TDO3_SWO0_MC1_MARK, SDHID1_2_MARK, M10_SLCD_CK2_MARK,
  TS_SDEN2_MARK, TDI3_MARK, SDHID1_3_MARK, M12_SLCD_CE2_MARK,
  TS_SCK2_MARK, RTCK3_SWO1_MC1_MARK, SDHICMD1_MARK, TRST3_MARK,
  RESETOUTS_MARK, PINMUX_MARK_END
}
 

Functions

void sh7377_pinmux_init (void)
 

Macro Definition Documentation

#define CPU_ALL_PORT (   fn,
  pfx,
  sfx 
)
Value:
PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
PORT_10(fn, pfx##10, sfx), \
PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
PORT_1(fn, pfx##118, sfx), \
PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
PORT_10(fn, pfx##15, sfx), \
PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
PORT_1(fn, pfx##164, sfx), \
PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
PORT_1(fn, pfx##260, sfx), PORT_1(fn, pfx##261, sfx), \
PORT_1(fn, pfx##262, sfx), PORT_1(fn, pfx##263, sfx), \
PORT_1(fn, pfx##264, sfx)

Definition at line 25 of file pfc-sh7377.c.

Enumeration Type Documentation

anonymous enum
Enumerator:
PINMUX_RESERVED 
PINMUX_DATA_BEGIN 
PORT_ALL 
PINMUX_DATA_END 
PINMUX_INPUT_BEGIN 
PORT_ALL 
PINMUX_INPUT_END 
PINMUX_INPUT_PULLUP_BEGIN 
PORT_ALL 
PINMUX_INPUT_PULLUP_END 
PINMUX_INPUT_PULLDOWN_BEGIN 
PORT_ALL 
PINMUX_INPUT_PULLDOWN_END 
PINMUX_OUTPUT_BEGIN 
PORT_ALL 
PINMUX_OUTPUT_END 
PINMUX_FUNCTION_BEGIN 
PORT_ALL 
PORT_ALL 
PORT_ALL 
PORT_ALL 
PORT_ALL 
PORT_ALL 
PORT_ALL 
PORT_ALL 
PORT_ALL 
PORT_ALL 
MSELBCR_MSEL17_1 
MSELBCR_MSEL17_0 
MSELBCR_MSEL16_1 
MSELBCR_MSEL16_0 
PINMUX_FUNCTION_END 
PINMUX_MARK_BEGIN 
PORT66_KEYIN0_PU_MARK 
PORT67_KEYIN1_PU_MARK 
PORT68_KEYIN2_PU_MARK 
PORT69_KEYIN3_PU_MARK 
PORT70_KEYIN4_PU_MARK 
PORT71_KEYIN5_PU_MARK 
PORT72_KEYIN6_PU_MARK 
VBUS_0_MARK 
CPORT0_MARK 
CPORT1_MARK 
CPORT2_MARK 
CPORT3_MARK 
CPORT4_MARK 
CPORT5_MARK 
CPORT6_MARK 
CPORT7_MARK 
CPORT8_MARK 
CPORT9_MARK 
CPORT10_MARK 
CPORT11_MARK 
SIN2_MARK 
CPORT12_MARK 
XCTS2_MARK 
CPORT13_MARK 
RFSPO4_MARK 
CPORT14_MARK 
RFSPO5_MARK 
CPORT15_MARK 
SCIFA0_SCK_MARK 
GPS_AGC2_MARK 
CPORT16_MARK 
SCIFA0_TXD_MARK 
GPS_AGC3_MARK 
CPORT17_IC_OE_MARK 
SOUT2_MARK 
CPORT18_MARK 
XRTS2_MARK 
PORT19_VIO_CKO2_MARK 
CPORT19_MPORT1_MARK 
CPORT20_MARK 
RFSPO6_MARK 
CPORT21_MARK 
STATUS0_MARK 
CPORT22_MARK 
STATUS1_MARK 
CPORT23_MARK 
STATUS2_MARK 
RFSPO7_MARK 
B_SYNLD1_MARK 
B_SYNLD2_MARK 
SYSENMSK_MARK 
XMAINPS_MARK 
XDIVPS_MARK 
XIDRST_MARK 
IDCLK_MARK 
IC_DP_MARK 
IDIO_MARK 
IC_DM_MARK 
SOUT1_MARK 
SCIFA4_TXD_MARK 
M02_BERDAT_MARK 
SIN1_MARK 
SCIFA4_RXD_MARK 
XWUP_MARK 
XRTS1_MARK 
SCIFA4_RTS_MARK 
M03_BERCLK_MARK 
XCTS1_MARK 
SCIFA4_CTS_MARK 
PCMCLKO_MARK 
SYNC8KO_MARK 
DNPCM_A_MARK 
UPPCM_A_MARK 
VACK_MARK 
XTALB1L_MARK 
GPS_AGC1_MARK 
SCIFA0_RTS_MARK 
GPS_AGC4_MARK 
SCIFA0_RXD_MARK 
GPS_PWRDOWN_MARK 
SCIFA0_CTS_MARK 
GPS_IM_MARK 
GPS_IS_MARK 
GPS_QM_MARK 
GPS_QS_MARK 
FMSOCK_MARK 
PORT49_IRDA_OUT_MARK 
PORT49_IROUT_MARK 
FMSOOLR_MARK 
BBIF2_TSYNC2_MARK 
TPU2TO2_MARK 
IPORT3_MARK 
FMSIOLR_MARK 
FMSOOBT_MARK 
BBIF2_TSCK2_MARK 
TPU2TO3_MARK 
OPORT1_MARK 
FMSIOBT_MARK 
FMSOSLD_MARK 
BBIF2_TXD2_MARK 
OPORT2_MARK 
FMSOILR_MARK 
PORT53_IRDA_IN_MARK 
TPU3TO3_MARK 
OPORT3_MARK 
FMSIILR_MARK 
FMSOIBT_MARK 
PORT54_IRDA_FIRSEL_MARK 
TPU3TO2_MARK 
FMSIIBT_MARK 
FMSISLD_MARK 
MFG0_OUT1_MARK 
TPU0TO0_MARK 
A0_EA0_MARK 
BS_MARK 
A12_EA12_MARK 
PORT58_VIO_CKOR_MARK 
TPU4TO2_MARK 
A13_EA13_MARK 
PORT59_IROUT_MARK 
MFG0_OUT2_MARK 
TPU0TO1_MARK 
A14_EA14_MARK 
PORT60_KEYOUT5_MARK 
A15_EA15_MARK 
PORT61_KEYOUT4_MARK 
A16_EA16_MARK 
PORT62_KEYOUT3_MARK 
MSIOF0_SS1_MARK 
A17_EA17_MARK 
PORT63_KEYOUT2_MARK 
MSIOF0_TSYNC_MARK 
A18_EA18_MARK 
PORT64_KEYOUT1_MARK 
MSIOF0_TSCK_MARK 
A19_EA19_MARK 
PORT65_KEYOUT0_MARK 
MSIOF0_TXD_MARK 
A20_EA20_MARK 
PORT66_KEYIN0_MARK 
MSIOF0_RSCK_MARK 
A21_EA21_MARK 
PORT67_KEYIN1_MARK 
MSIOF0_RSYNC_MARK 
A22_EA22_MARK 
PORT68_KEYIN2_MARK 
MSIOF0_MCK0_MARK 
A23_EA23_MARK 
PORT69_KEYIN3_MARK 
MSIOF0_MCK1_MARK 
A24_EA24_MARK 
PORT70_KEYIN4_MARK 
MSIOF0_RXD_MARK 
A25_EA25_MARK 
PORT71_KEYIN5_MARK 
MSIOF0_SS2_MARK 
A26_MARK 
PORT72_KEYIN6_MARK 
D0_ED0_NAF0_MARK 
D1_ED1_NAF1_MARK 
D2_ED2_NAF2_MARK 
D3_ED3_NAF3_MARK 
D4_ED4_NAF4_MARK 
D5_ED5_NAF5_MARK 
D6_ED6_NAF6_MARK 
D7_ED7_NAF7_MARK 
D8_ED8_NAF8_MARK 
D9_ED9_NAF9_MARK 
D10_ED10_NAF10_MARK 
D11_ED11_NAF11_MARK 
D12_ED12_NAF12_MARK 
D13_ED13_NAF13_MARK 
D14_ED14_NAF14_MARK 
D15_ED15_NAF15_MARK 
CS4_MARK 
CS5A_MARK 
FMSICK_MARK 
CS5B_MARK 
FCE1_MARK 
CS6B_MARK 
XCS2_MARK 
CS6A_MARK 
DACK0_MARK 
FCE0_MARK 
WAIT_MARK 
DREQ0_MARK 
RD_XRD_MARK 
WE0_XWR0_FWE_MARK 
WE1_XWR1_MARK 
FRB_MARK 
CKO_MARK 
NBRSTOUT_MARK 
NBRST_MARK 
GPS_EPPSIN_MARK 
LATCHPULSE_MARK 
LTESIGNAL_MARK 
LEGACYSTATE_MARK 
TCKON_MARK 
VIO_VD_MARK 
PORT128_KEYOUT0_MARK 
IPORT0_MARK 
VIO_HD_MARK 
PORT129_KEYOUT1_MARK 
IPORT1_MARK 
VIO_D0_MARK 
PORT130_KEYOUT2_MARK 
PORT130_MSIOF2_RXD_MARK 
VIO_D1_MARK 
PORT131_KEYOUT3_MARK 
PORT131_MSIOF2_SS1_MARK 
VIO_D2_MARK 
PORT132_KEYOUT4_MARK 
PORT132_MSIOF2_SS2_MARK 
VIO_D3_MARK 
PORT133_KEYOUT5_MARK 
PORT133_MSIOF2_TSYNC_MARK 
VIO_D4_MARK 
PORT134_KEYIN0_MARK 
PORT134_MSIOF2_TXD_MARK 
VIO_D5_MARK 
PORT135_KEYIN1_MARK 
PORT135_MSIOF2_TSCK_MARK 
VIO_D6_MARK 
PORT136_KEYIN2_MARK 
VIO_D7_MARK 
PORT137_KEYIN3_MARK 
VIO_D8_MARK 
M9_SLCD_A01_MARK 
PORT138_FSIAOMC_MARK 
VIO_D9_MARK 
M10_SLCD_CK1_MARK 
PORT139_FSIAOLR_MARK 
VIO_D10_MARK 
M11_SLCD_SO1_MARK 
TPU0TO2_MARK 
PORT140_FSIAOBT_MARK 
VIO_D11_MARK 
M12_SLCD_CE1_MARK 
TPU0TO3_MARK 
PORT141_FSIAOSLD_MARK 
VIO_D12_MARK 
M13_BSW_MARK 
PORT142_FSIACK_MARK 
VIO_D13_MARK 
M14_GSW_MARK 
PORT143_FSIAILR_MARK 
VIO_D14_MARK 
M15_RSW_MARK 
PORT144_FSIAIBT_MARK 
VIO_D15_MARK 
TPU1TO3_MARK 
PORT145_FSIAISLD_MARK 
VIO_CLK_MARK 
PORT146_KEYIN4_MARK 
IPORT2_MARK 
VIO_FIELD_MARK 
PORT147_KEYIN5_MARK 
VIO_CKO_MARK 
PORT148_KEYIN6_MARK 
A27_MARK 
RDWR_XWE_MARK 
MFG0_IN1_MARK 
MFG0_IN2_MARK 
TS_SPSYNC3_MARK 
MSIOF2_RSCK_MARK 
TS_SDAT3_MARK 
MSIOF2_RSYNC_MARK 
TPU1TO2_MARK 
TS_SDEN3_MARK 
PORT153_MSIOF2_SS1_MARK 
SOUT3_MARK 
SCIFA2_TXD1_MARK 
MSIOF2_MCK0_MARK 
SIN3_MARK 
SCIFA2_RXD1_MARK 
MSIOF2_MCK1_MARK 
XRTS3_MARK 
SCIFA2_RTS1_MARK 
PORT156_MSIOF2_SS2_MARK 
XCTS3_MARK 
SCIFA2_CTS1_MARK 
PORT157_MSIOF2_RXD_MARK 
DINT_MARK 
SCIFA2_SCK1_MARK 
TS_SCK3_MARK 
PORT159_SCIFB_SCK_MARK 
PORT159_SCIFA5_SCK_MARK 
NMI_MARK 
PORT160_SCIFB_TXD_MARK 
PORT160_SCIFA5_TXD_MARK 
SOUT0_MARK 
PORT161_SCIFB_CTS_MARK 
PORT161_SCIFA5_CTS_MARK 
XCTS0_MARK 
MFG3_IN2_MARK 
PORT162_SCIFB_RXD_MARK 
PORT162_SCIFA5_RXD_MARK 
SIN0_MARK 
MFG3_IN1_MARK 
PORT163_SCIFB_RTS_MARK 
PORT163_SCIFA5_RTS_MARK 
XRTS0_MARK 
MFG3_OUT1_MARK 
TPU3TO0_MARK 
LCDD0_MARK 
PORT192_KEYOUT0_MARK 
EXT_CKI_MARK 
LCDD1_MARK 
PORT193_KEYOUT1_MARK 
PORT193_SCIFA5_CTS_MARK 
BBIF2_TSYNC1_MARK 
LCDD2_MARK 
PORT194_KEYOUT2_MARK 
PORT194_SCIFA5_RTS_MARK 
BBIF2_TSCK1_MARK 
LCDD3_MARK 
PORT195_KEYOUT3_MARK 
PORT195_SCIFA5_RXD_MARK 
BBIF2_TXD1_MARK 
LCDD4_MARK 
PORT196_KEYOUT4_MARK 
PORT196_SCIFA5_TXD_MARK 
LCDD5_MARK 
PORT197_KEYOUT5_MARK 
PORT197_SCIFA5_SCK_MARK 
MFG2_OUT2_MARK 
TPU2TO1_MARK 
LCDD6_MARK 
XWR2_MARK 
LCDD7_MARK 
TPU4TO1_MARK 
MFG4_OUT2_MARK 
XWR3_MARK 
LCDD8_MARK 
PORT200_KEYIN0_MARK 
VIO_DR0_MARK 
D16_MARK 
ED16_MARK 
LCDD9_MARK 
PORT201_KEYIN1_MARK 
VIO_DR1_MARK 
D17_MARK 
ED17_MARK 
LCDD10_MARK 
PORT202_KEYIN2_MARK 
VIO_DR2_MARK 
D18_MARK 
ED18_MARK 
LCDD11_MARK 
PORT203_KEYIN3_MARK 
VIO_DR3_MARK 
D19_MARK 
ED19_MARK 
LCDD12_MARK 
PORT204_KEYIN4_MARK 
VIO_DR4_MARK 
D20_MARK 
ED20_MARK 
LCDD13_MARK 
PORT205_KEYIN5_MARK 
VIO_DR5_MARK 
D21_MARK 
ED21_MARK 
LCDD14_MARK 
PORT206_KEYIN6_MARK 
VIO_DR6_MARK 
D22_MARK 
ED22_MARK 
LCDD15_MARK 
PORT207_MSIOF0L_SS1_MARK 
PORT207_KEYOUT0_MARK 
VIO_DR7_MARK 
D23_MARK 
ED23_MARK 
LCDD16_MARK 
PORT208_MSIOF0L_SS2_MARK 
PORT208_KEYOUT1_MARK 
VIO_VDR_MARK 
D24_MARK 
ED24_MARK 
LCDD17_MARK 
PORT209_KEYOUT2_MARK 
VIO_HDR_MARK 
D25_MARK 
ED25_MARK 
LCDD18_MARK 
DREQ2_MARK 
PORT210_MSIOF0L_SS1_MARK 
D26_MARK 
ED26_MARK 
LCDD19_MARK 
PORT211_MSIOF0L_SS2_MARK 
D27_MARK 
ED27_MARK 
LCDD20_MARK 
TS_SPSYNC1_MARK 
MSIOF0L_MCK0_MARK 
D28_MARK 
ED28_MARK 
LCDD21_MARK 
TS_SDAT1_MARK 
MSIOF0L_MCK1_MARK 
D29_MARK 
ED29_MARK 
LCDD22_MARK 
TS_SDEN1_MARK 
MSIOF0L_RSCK_MARK 
D30_MARK 
ED30_MARK 
LCDD23_MARK 
TS_SCK1_MARK 
MSIOF0L_RSYNC_MARK 
D31_MARK 
ED31_MARK 
LCDDCK_MARK 
LCDWR_MARK 
PORT216_KEYOUT3_MARK 
VIO_CLKR_MARK 
LCDRD_MARK 
DACK2_MARK 
MSIOF0L_TSYNC_MARK 
LCDHSYN_MARK 
LCDCS_MARK 
LCDCS2_MARK 
DACK3_MARK 
PORT218_VIO_CKOR_MARK 
PORT218_KEYOUT4_MARK 
LCDDISP_MARK 
LCDRS_MARK 
DREQ3_MARK 
MSIOF0L_TSCK_MARK 
LCDVSYN_MARK 
LCDVSYN2_MARK 
PORT220_KEYOUT5_MARK 
LCDLCLK_MARK 
DREQ1_MARK 
PWEN_MARK 
MSIOF0L_RXD_MARK 
LCDDON_MARK 
LCDDON2_MARK 
DACK1_MARK 
OVCN_MARK 
MSIOF0L_TXD_MARK 
SCIFA1_TXD_MARK 
OVCN2_MARK 
EXTLP_MARK 
SCIFA1_SCK_MARK 
USBTERM_MARK 
PORT226_VIO_CKO2_MARK 
SCIFA1_RTS_MARK 
IDIN_MARK 
SCIFA1_RXD_MARK 
SCIFA1_CTS_MARK 
MFG1_IN1_MARK 
MSIOF1_TXD_MARK 
SCIFA2_TXD2_MARK 
PORT230_FSIAOMC_MARK 
MSIOF1_TSYNC_MARK 
SCIFA2_CTS2_MARK 
PORT231_FSIAOLR_MARK 
MSIOF1_TSCK_MARK 
SCIFA2_SCK2_MARK 
PORT232_FSIAOBT_MARK 
MSIOF1_RXD_MARK 
SCIFA2_RXD2_MARK 
GPS_VCOTRIG_MARK 
PORT233_FSIACK_MARK 
MSIOF1_RSCK_MARK 
SCIFA2_RTS2_MARK 
PORT234_FSIAOSLD_MARK 
MSIOF1_RSYNC_MARK 
OPORT0_MARK 
MFG1_IN2_MARK 
PORT235_FSIAILR_MARK 
MSIOF1_MCK0_MARK 
I2C_SDA2_MARK 
PORT236_FSIAIBT_MARK 
MSIOF1_MCK1_MARK 
I2C_SCL2_MARK 
PORT237_FSIAISLD_MARK 
MSIOF1_SS1_MARK 
EDBGREQ3_MARK 
MSIOF1_SS2_MARK 
SCIFA6_TXD_MARK 
PORT241_IRDA_OUT_MARK 
PORT241_IROUT_MARK 
MFG4_OUT1_MARK 
TPU4TO0_MARK 
PORT242_IRDA_IN_MARK 
MFG4_IN2_MARK 
PORT243_IRDA_FIRSEL_MARK 
PORT243_VIO_CKO2_MARK 
PORT244_SCIFA5_CTS_MARK 
MFG2_IN1_MARK 
PORT244_SCIFB_CTS_MARK 
PORT244_MSIOF2_RXD_MARK 
PORT245_SCIFA5_RTS_MARK 
MFG2_IN2_MARK 
PORT245_SCIFB_RTS_MARK 
PORT245_MSIOF2_TXD_MARK 
PORT246_SCIFA5_RXD_MARK 
MFG1_OUT1_MARK 
PORT246_SCIFB_RXD_MARK 
TPU1TO0_MARK 
PORT247_SCIFA5_TXD_MARK 
MFG3_OUT2_MARK 
PORT247_SCIFB_TXD_MARK 
TPU3TO1_MARK 
PORT248_SCIFA5_SCK_MARK 
MFG2_OUT1_MARK 
PORT248_SCIFB_SCK_MARK 
TPU2TO0_MARK 
PORT248_MSIOF2_TSCK_MARK 
PORT249_IROUT_MARK 
MFG4_IN1_MARK 
PORT249_MSIOF2_TSYNC_MARK 
SDHICLK0_MARK 
TCK2_SWCLK_MC0_MARK 
SDHICD0_MARK 
SDHID0_0_MARK 
TMS2_SWDIO_MC0_MARK 
SDHID0_1_MARK 
TDO2_SWO0_MC0_MARK 
SDHID0_2_MARK 
TDI2_MARK 
SDHID0_3_MARK 
RTCK2_SWO1_MC0_MARK 
SDHICMD0_MARK 
TRST2_MARK 
SDHIWP0_MARK 
EDBGREQ2_MARK 
SDHICLK1_MARK 
TCK3_SWCLK_MC1_MARK 
SDHID1_0_MARK 
M11_SLCD_SO2_MARK 
TS_SPSYNC2_MARK 
TMS3_SWDIO_MC1_MARK 
SDHID1_1_MARK 
M9_SLCD_A02_MARK 
TS_SDAT2_MARK 
TDO3_SWO0_MC1_MARK 
SDHID1_2_MARK 
M10_SLCD_CK2_MARK 
TS_SDEN2_MARK 
TDI3_MARK 
SDHID1_3_MARK 
M12_SLCD_CE2_MARK 
TS_SCK2_MARK 
RTCK3_SWO1_MC1_MARK 
SDHICMD1_MARK 
TRST3_MARK 
RESETOUTS_MARK 
PINMUX_MARK_END 

Definition at line 50 of file pfc-sh7377.c.

Function Documentation

void sh7377_pinmux_init ( void  )

Definition at line 1685 of file pfc-sh7377.c.