#include "phy_common.h"

Data Structures
struct	b43_chanspec

struct	b43_phy_n_iq_comp

struct	b43_phy_n_rssical_cache

struct	b43_phy_n_cal_cache

struct	b43_phy_n_txpwrindex

struct	b43_phy_n_pwr_ctl_info

struct	b43_phy_n

Macros
#define	B43_NPHY_BBCFG B43_PHY_N(0x001) /* BB config */

#define	B43_NPHY_BBCFG_RSTCCA 0x4000 /* Reset CCA */

#define	B43_NPHY_BBCFG_RSTRX 0x8000 /* Reset RX */

#define	B43_NPHY_CHANNEL B43_PHY_N(0x005) /* Channel */

#define	B43_NPHY_TXERR B43_PHY_N(0x007) /* TX error */

#define	B43_NPHY_BANDCTL B43_PHY_N(0x009) /* Band control */

#define	B43_NPHY_BANDCTL_5GHZ 0x0001 /* Use the 5GHz band */

#define	B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */

#define	B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */

#define	B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */

#define	B43_NPHY_BIST_STAT0 B43_PHY_N(0x00E) /* Built-in self test status 0 */

#define	B43_NPHY_BIST_STAT1 B43_PHY_N(0x00F) /* Built-in self test status 1 */

#define	B43_NPHY_C1_DESPWR B43_PHY_N(0x018) /* Core 1 desired power */

#define	B43_NPHY_C1_CCK_DESPWR B43_PHY_N(0x019) /* Core 1 CCK desired power */

#define	B43_NPHY_C1_BCLIPBKOFF B43_PHY_N(0x01A) /* Core 1 barely clip backoff */

#define	B43_NPHY_C1_CCK_BCLIPBKOFF B43_PHY_N(0x01B) /* Core 1 CCK barely clip backoff */

#define	B43_NPHY_C1_CGAINI B43_PHY_N(0x01C) /* Core 1 compute gain info */

#define	B43_NPHY_C1_CGAINI_GAINBKOFF 0x001F /* Gain backoff */

#define	B43_NPHY_C1_CGAINI_GAINBKOFF_SHIFT 0

#define	B43_NPHY_C1_CGAINI_CLIPGBKOFF 0x03E0 /* Clip gain backoff */

#define	B43_NPHY_C1_CGAINI_CLIPGBKOFF_SHIFT 5

#define	B43_NPHY_C1_CGAINI_GAINSTEP 0x1C00 /* Gain step */

#define	B43_NPHY_C1_CGAINI_GAINSTEP_SHIFT 10

#define	B43_NPHY_C1_CGAINI_CL2DETECT 0x2000 /* Clip 2 detect mask */

#define	B43_NPHY_C1_CCK_CGAINI B43_PHY_N(0x01D) /* Core 1 CCK compute gain info */

#define	B43_NPHY_C1_CCK_CGAINI_GAINBKOFF 0x001F /* Gain backoff */

#define	B43_NPHY_C1_CCK_CGAINI_CLIPGBKOFF 0x01E0 /* CCK barely clip gain backoff */

#define	B43_NPHY_C1_MINMAX_GAIN B43_PHY_N(0x01E) /* Core 1 min/max gain */

#define	B43_NPHY_C1_MINGAIN 0x00FF /* Minimum gain */

#define	B43_NPHY_C1_MINGAIN_SHIFT 0

#define	B43_NPHY_C1_MAXGAIN 0xFF00 /* Maximum gain */

#define	B43_NPHY_C1_MAXGAIN_SHIFT 8

#define	B43_NPHY_C1_CCK_MINMAX_GAIN B43_PHY_N(0x01F) /* Core 1 CCK min/max gain */

#define	B43_NPHY_C1_CCK_MINGAIN 0x00FF /* Minimum gain */

#define	B43_NPHY_C1_CCK_MINGAIN_SHIFT 0

#define	B43_NPHY_C1_CCK_MAXGAIN 0xFF00 /* Maximum gain */

#define	B43_NPHY_C1_CCK_MAXGAIN_SHIFT 8

#define	B43_NPHY_C1_INITGAIN B43_PHY_N(0x020) /* Core 1 initial gain code */

#define	B43_NPHY_C1_INITGAIN_EXTLNA 0x0001 /* External LNA index */

#define	B43_NPHY_C1_INITGAIN_LNA 0x0006 /* LNA index */

#define	B43_NPHY_C1_INITGAIN_LNAIDX_SHIFT 1

#define	B43_NPHY_C1_INITGAIN_HPVGA1 0x0078 /* HPVGA1 index */

#define	B43_NPHY_C1_INITGAIN_HPVGA1_SHIFT 3

#define	B43_NPHY_C1_INITGAIN_HPVGA2 0x0F80 /* HPVGA2 index */

#define	B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT 7

#define	B43_NPHY_C1_INITGAIN_TRRX 0x1000 /* TR RX index */

#define	B43_NPHY_C1_INITGAIN_TRTX 0x2000 /* TR TX index */

#define	B43_NPHY_C1_CLIP1_HIGAIN B43_PHY_N(0x021) /* Core 1 clip1 high gain code */

#define	B43_NPHY_C1_CLIP1_MEDGAIN B43_PHY_N(0x022) /* Core 1 clip1 medium gain code */

#define	B43_NPHY_C1_CLIP1_LOGAIN B43_PHY_N(0x023) /* Core 1 clip1 low gain code */

#define	B43_NPHY_C1_CLIP2_GAIN B43_PHY_N(0x024) /* Core 1 clip2 gain code */

#define	B43_NPHY_C1_FILTERGAIN B43_PHY_N(0x025) /* Core 1 filter gain */

#define	B43_NPHY_C1_LPF_QHPF_BW B43_PHY_N(0x026) /* Core 1 LPF Q HP F bandwidth */

#define	B43_NPHY_C1_CLIPWBTHRES B43_PHY_N(0x027) /* Core 1 clip wideband threshold */

#define	B43_NPHY_C1_CLIPWBTHRES_CLIP2 0x003F /* Clip 2 */

#define	B43_NPHY_C1_CLIPWBTHRES_CLIP2_SHIFT 0

#define	B43_NPHY_C1_CLIPWBTHRES_CLIP1 0x0FC0 /* Clip 1 */

#define	B43_NPHY_C1_CLIPWBTHRES_CLIP1_SHIFT 6

#define	B43_NPHY_C1_W1THRES B43_PHY_N(0x028) /* Core 1 W1 threshold */

#define	B43_NPHY_C1_EDTHRES B43_PHY_N(0x029) /* Core 1 ED threshold */

#define	B43_NPHY_C1_SMSIGTHRES B43_PHY_N(0x02A) /* Core 1 small sig threshold */

#define	B43_NPHY_C1_NBCLIPTHRES B43_PHY_N(0x02B) /* Core 1 NB clip threshold */

#define	B43_NPHY_C1_CLIP1THRES B43_PHY_N(0x02C) /* Core 1 clip1 threshold */

#define	B43_NPHY_C1_CLIP2THRES B43_PHY_N(0x02D) /* Core 1 clip2 threshold */

#define	B43_NPHY_C2_DESPWR B43_PHY_N(0x02E) /* Core 2 desired power */

#define	B43_NPHY_C2_CCK_DESPWR B43_PHY_N(0x02F) /* Core 2 CCK desired power */

#define	B43_NPHY_C2_BCLIPBKOFF B43_PHY_N(0x030) /* Core 2 barely clip backoff */

#define	B43_NPHY_C2_CCK_BCLIPBKOFF B43_PHY_N(0x031) /* Core 2 CCK barely clip backoff */

#define	B43_NPHY_C2_CGAINI B43_PHY_N(0x032) /* Core 2 compute gain info */

#define	B43_NPHY_C2_CGAINI_GAINBKOFF 0x001F /* Gain backoff */

#define	B43_NPHY_C2_CGAINI_GAINBKOFF_SHIFT 0

#define	B43_NPHY_C2_CGAINI_CLIPGBKOFF 0x03E0 /* Clip gain backoff */

#define	B43_NPHY_C2_CGAINI_CLIPGBKOFF_SHIFT 5

#define	B43_NPHY_C2_CGAINI_GAINSTEP 0x1C00 /* Gain step */

#define	B43_NPHY_C2_CGAINI_GAINSTEP_SHIFT 10

#define	B43_NPHY_C2_CGAINI_CL2DETECT 0x2000 /* Clip 2 detect mask */

#define	B43_NPHY_C2_CCK_CGAINI B43_PHY_N(0x033) /* Core 2 CCK compute gain info */

#define	B43_NPHY_C2_CCK_CGAINI_GAINBKOFF 0x001F /* Gain backoff */

#define	B43_NPHY_C2_CCK_CGAINI_CLIPGBKOFF 0x01E0 /* CCK barely clip gain backoff */

#define	B43_NPHY_C2_MINMAX_GAIN B43_PHY_N(0x034) /* Core 2 min/max gain */

#define	B43_NPHY_C2_MINGAIN 0x00FF /* Minimum gain */

#define	B43_NPHY_C2_MINGAIN_SHIFT 0

#define	B43_NPHY_C2_MAXGAIN 0xFF00 /* Maximum gain */

#define	B43_NPHY_C2_MAXGAIN_SHIFT 8

#define	B43_NPHY_C2_CCK_MINMAX_GAIN B43_PHY_N(0x035) /* Core 2 CCK min/max gain */

#define	B43_NPHY_C2_CCK_MINGAIN 0x00FF /* Minimum gain */

#define	B43_NPHY_C2_CCK_MINGAIN_SHIFT 0

#define	B43_NPHY_C2_CCK_MAXGAIN 0xFF00 /* Maximum gain */

#define	B43_NPHY_C2_CCK_MAXGAIN_SHIFT 8

#define	B43_NPHY_C2_INITGAIN B43_PHY_N(0x036) /* Core 2 initial gain code */

#define	B43_NPHY_C2_INITGAIN_EXTLNA 0x0001 /* External LNA index */

#define	B43_NPHY_C2_INITGAIN_LNA 0x0006 /* LNA index */

#define	B43_NPHY_C2_INITGAIN_LNAIDX_SHIFT 1

#define	B43_NPHY_C2_INITGAIN_HPVGA1 0x0078 /* HPVGA1 index */

#define	B43_NPHY_C2_INITGAIN_HPVGA1_SHIFT 3

#define	B43_NPHY_C2_INITGAIN_HPVGA2 0x0F80 /* HPVGA2 index */

#define	B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT 7

#define	B43_NPHY_C2_INITGAIN_TRRX 0x1000 /* TR RX index */

#define	B43_NPHY_C2_INITGAIN_TRTX 0x2000 /* TR TX index */

#define	B43_NPHY_C2_CLIP1_HIGAIN B43_PHY_N(0x037) /* Core 2 clip1 high gain code */

#define	B43_NPHY_C2_CLIP1_MEDGAIN B43_PHY_N(0x038) /* Core 2 clip1 medium gain code */

#define	B43_NPHY_C2_CLIP1_LOGAIN B43_PHY_N(0x039) /* Core 2 clip1 low gain code */

#define	B43_NPHY_C2_CLIP2_GAIN B43_PHY_N(0x03A) /* Core 2 clip2 gain code */

#define	B43_NPHY_C2_FILTERGAIN B43_PHY_N(0x03B) /* Core 2 filter gain */

#define	B43_NPHY_C2_LPF_QHPF_BW B43_PHY_N(0x03C) /* Core 2 LPF Q HP F bandwidth */

#define	B43_NPHY_C2_CLIPWBTHRES B43_PHY_N(0x03D) /* Core 2 clip wideband threshold */

#define	B43_NPHY_C2_CLIPWBTHRES_CLIP2 0x003F /* Clip 2 */

#define	B43_NPHY_C2_CLIPWBTHRES_CLIP2_SHIFT 0

#define	B43_NPHY_C2_CLIPWBTHRES_CLIP1 0x0FC0 /* Clip 1 */

#define	B43_NPHY_C2_CLIPWBTHRES_CLIP1_SHIFT 6

#define	B43_NPHY_C2_W1THRES B43_PHY_N(0x03E) /* Core 2 W1 threshold */

#define	B43_NPHY_C2_EDTHRES B43_PHY_N(0x03F) /* Core 2 ED threshold */

#define	B43_NPHY_C2_SMSIGTHRES B43_PHY_N(0x040) /* Core 2 small sig threshold */

#define	B43_NPHY_C2_NBCLIPTHRES B43_PHY_N(0x041) /* Core 2 NB clip threshold */

#define	B43_NPHY_C2_CLIP1THRES B43_PHY_N(0x042) /* Core 2 clip1 threshold */

#define	B43_NPHY_C2_CLIP2THRES B43_PHY_N(0x043) /* Core 2 clip2 threshold */

#define	B43_NPHY_CRS_THRES1 B43_PHY_N(0x044) /* CRS threshold 1 */

#define	B43_NPHY_CRS_THRES2 B43_PHY_N(0x045) /* CRS threshold 2 */

#define	B43_NPHY_CRS_THRES3 B43_PHY_N(0x046) /* CRS threshold 3 */

#define	B43_NPHY_CRSCTL B43_PHY_N(0x047) /* CRS control */

#define	B43_NPHY_DCFADDR B43_PHY_N(0x048) /* DC filter address */

#define	B43_NPHY_RXF20_NUM0 B43_PHY_N(0x049) /* RX filter 20 numerator 0 */

#define	B43_NPHY_RXF20_NUM1 B43_PHY_N(0x04A) /* RX filter 20 numerator 1 */

#define	B43_NPHY_RXF20_NUM2 B43_PHY_N(0x04B) /* RX filter 20 numerator 2 */

#define	B43_NPHY_RXF20_DENOM0 B43_PHY_N(0x04C) /* RX filter 20 denominator 0 */

#define	B43_NPHY_RXF20_DENOM1 B43_PHY_N(0x04D) /* RX filter 20 denominator 1 */

#define	B43_NPHY_RXF20_NUM10 B43_PHY_N(0x04E) /* RX filter 20 numerator 10 */

#define	B43_NPHY_RXF20_NUM11 B43_PHY_N(0x04F) /* RX filter 20 numerator 11 */

#define	B43_NPHY_RXF20_NUM12 B43_PHY_N(0x050) /* RX filter 20 numerator 12 */

#define	B43_NPHY_RXF20_DENOM10 B43_PHY_N(0x051) /* RX filter 20 denominator 10 */

#define	B43_NPHY_RXF20_DENOM11 B43_PHY_N(0x052) /* RX filter 20 denominator 11 */

#define	B43_NPHY_RXF40_NUM0 B43_PHY_N(0x053) /* RX filter 40 numerator 0 */

#define	B43_NPHY_RXF40_NUM1 B43_PHY_N(0x054) /* RX filter 40 numerator 1 */

#define	B43_NPHY_RXF40_NUM2 B43_PHY_N(0x055) /* RX filter 40 numerator 2 */

#define	B43_NPHY_RXF40_DENOM0 B43_PHY_N(0x056) /* RX filter 40 denominator 0 */

#define	B43_NPHY_RXF40_DENOM1 B43_PHY_N(0x057) /* RX filter 40 denominator 1 */

#define	B43_NPHY_RXF40_NUM10 B43_PHY_N(0x058) /* RX filter 40 numerator 10 */

#define	B43_NPHY_RXF40_NUM11 B43_PHY_N(0x059) /* RX filter 40 numerator 11 */

#define	B43_NPHY_RXF40_NUM12 B43_PHY_N(0x05A) /* RX filter 40 numerator 12 */

#define	B43_NPHY_RXF40_DENOM10 B43_PHY_N(0x05B) /* RX filter 40 denominator 10 */

#define	B43_NPHY_RXF40_DENOM11 B43_PHY_N(0x05C) /* RX filter 40 denominator 11 */

#define	B43_NPHY_PPROC_RSTLEN B43_PHY_N(0x060) /* Packet processing reset length */

#define	B43_NPHY_INITCARR_DLEN B43_PHY_N(0x061) /* Initial carrier detection length */

#define	B43_NPHY_CLIP1CARR_DLEN B43_PHY_N(0x062) /* Clip1 carrier detection length */

#define	B43_NPHY_CLIP2CARR_DLEN B43_PHY_N(0x063) /* Clip2 carrier detection length */

#define	B43_NPHY_INITGAIN_SLEN B43_PHY_N(0x064) /* Initial gain settle length */

#define	B43_NPHY_CLIP1GAIN_SLEN B43_PHY_N(0x065) /* Clip1 gain settle length */

#define	B43_NPHY_CLIP2GAIN_SLEN B43_PHY_N(0x066) /* Clip2 gain settle length */

#define	B43_NPHY_PACKGAIN_SLEN B43_PHY_N(0x067) /* Packet gain settle length */

#define	B43_NPHY_CARRSRC_TLEN B43_PHY_N(0x068) /* Carrier search timeout length */

#define	B43_NPHY_TISRC_TLEN B43_PHY_N(0x069) /* Timing search timeout length */

#define	B43_NPHY_ENDROP_TLEN B43_PHY_N(0x06A) /* Energy drop timeout length */

#define	B43_NPHY_CLIP1_NBDWELL_LEN B43_PHY_N(0x06B) /* Clip1 NB dwell length */

#define	B43_NPHY_CLIP2_NBDWELL_LEN B43_PHY_N(0x06C) /* Clip2 NB dwell length */

#define	B43_NPHY_W1CLIP1_DWELL_LEN B43_PHY_N(0x06D) /* W1 clip1 dwell length */

#define	B43_NPHY_W1CLIP2_DWELL_LEN B43_PHY_N(0x06E) /* W1 clip2 dwell length */

#define	B43_NPHY_W2CLIP1_DWELL_LEN B43_PHY_N(0x06F) /* W2 clip1 dwell length */

#define	B43_NPHY_PLOAD_CSENSE_EXTLEN B43_PHY_N(0x070) /* Payload carrier sense extension length */

#define	B43_NPHY_EDROP_CSENSE_EXTLEN B43_PHY_N(0x071) /* Energy drop carrier sense extension length */

#define	B43_NPHY_TABLE_ADDR B43_PHY_N(0x072) /* Table address */

#define	B43_NPHY_TABLE_DATALO B43_PHY_N(0x073) /* Table data low */

#define	B43_NPHY_TABLE_DATAHI B43_PHY_N(0x074) /* Table data high */

#define	B43_NPHY_WWISE_LENIDX B43_PHY_N(0x075) /* WWiSE length index */

#define	B43_NPHY_TGNSYNC_LENIDX B43_PHY_N(0x076) /* TGNsync length index */

#define	B43_NPHY_TXMACIF_HOLDOFF B43_PHY_N(0x077) /* TX MAC IF Hold off */

#define	B43_NPHY_RFCTL_CMD B43_PHY_N(0x078) /* RF control (command) */

#define	B43_NPHY_RFCTL_CMD_START 0x0001 /* Start sequence */

#define	B43_NPHY_RFCTL_CMD_RXTX 0x0002 /* RX/TX */

#define	B43_NPHY_RFCTL_CMD_CORESEL 0x0038 /* Core select */

#define	B43_NPHY_RFCTL_CMD_CORESEL_SHIFT 3

#define	B43_NPHY_RFCTL_CMD_PORFORCE 0x0040 /* POR force */

#define	B43_NPHY_RFCTL_CMD_OEPORFORCE 0x0080 /* OE POR force */

#define	B43_NPHY_RFCTL_CMD_RXEN 0x0100 /* RX enable */

#define	B43_NPHY_RFCTL_CMD_TXEN 0x0200 /* TX enable */

#define	B43_NPHY_RFCTL_CMD_CHIP0PU 0x0400 /* Chip0 PU */

#define	B43_NPHY_RFCTL_CMD_EN 0x0800 /* Radio enabled */

#define	B43_NPHY_RFCTL_CMD_SEQENCORE 0xF000 /* Seq en core */

#define	B43_NPHY_RFCTL_CMD_SEQENCORE_SHIFT 12

#define	B43_NPHY_RFCTL_RSSIO1 B43_PHY_N(0x07A) /* RF control (RSSI others 1) */

#define	B43_NPHY_RFCTL_RSSIO1_RXPD 0x0001 /* RX PD */

#define	B43_NPHY_RFCTL_RSSIO1_TXPD 0x0002 /* TX PD */

#define	B43_NPHY_RFCTL_RSSIO1_PAPD 0x0004 /* PA PD */

#define	B43_NPHY_RFCTL_RSSIO1_RSSICTL 0x0030 /* RSSI control */

#define	B43_NPHY_RFCTL_RSSIO1_LPFBW 0x00C0 /* LPF bandwidth */

#define	B43_NPHY_RFCTL_RSSIO1_HPFBWHI 0x0100 /* HPF bandwidth high */

#define	B43_NPHY_RFCTL_RSSIO1_HIQDISCO 0x0200 /* HIQ dis core */

#define	B43_NPHY_RFCTL_RXG1 B43_PHY_N(0x07B) /* RF control (RX gain 1) */

#define	B43_NPHY_RFCTL_TXG1 B43_PHY_N(0x07C) /* RF control (TX gain 1) */

#define	B43_NPHY_RFCTL_RSSIO2 B43_PHY_N(0x07D) /* RF control (RSSI others 2) */

#define	B43_NPHY_RFCTL_RSSIO2_RXPD 0x0001 /* RX PD */

#define	B43_NPHY_RFCTL_RSSIO2_TXPD 0x0002 /* TX PD */

#define	B43_NPHY_RFCTL_RSSIO2_PAPD 0x0004 /* PA PD */

#define	B43_NPHY_RFCTL_RSSIO2_RSSICTL 0x0030 /* RSSI control */

#define	B43_NPHY_RFCTL_RSSIO2_LPFBW 0x00C0 /* LPF bandwidth */

#define	B43_NPHY_RFCTL_RSSIO2_HPFBWHI 0x0100 /* HPF bandwidth high */

#define	B43_NPHY_RFCTL_RSSIO2_HIQDISCO 0x0200 /* HIQ dis core */

#define	B43_NPHY_RFCTL_RXG2 B43_PHY_N(0x07E) /* RF control (RX gain 2) */

#define	B43_NPHY_RFCTL_TXG2 B43_PHY_N(0x07F) /* RF control (TX gain 2) */

#define	B43_NPHY_RFCTL_RSSIO3 B43_PHY_N(0x080) /* RF control (RSSI others 3) */

#define	B43_NPHY_RFCTL_RSSIO3_RXPD 0x0001 /* RX PD */

#define	B43_NPHY_RFCTL_RSSIO3_TXPD 0x0002 /* TX PD */

#define	B43_NPHY_RFCTL_RSSIO3_PAPD 0x0004 /* PA PD */

#define	B43_NPHY_RFCTL_RSSIO3_RSSICTL 0x0030 /* RSSI control */

#define	B43_NPHY_RFCTL_RSSIO3_LPFBW 0x00C0 /* LPF bandwidth */

#define	B43_NPHY_RFCTL_RSSIO3_HPFBWHI 0x0100 /* HPF bandwidth high */

#define	B43_NPHY_RFCTL_RSSIO3_HIQDISCO 0x0200 /* HIQ dis core */

#define	B43_NPHY_RFCTL_RXG3 B43_PHY_N(0x081) /* RF control (RX gain 3) */

#define	B43_NPHY_RFCTL_TXG3 B43_PHY_N(0x082) /* RF control (TX gain 3) */

#define	B43_NPHY_RFCTL_RSSIO4 B43_PHY_N(0x083) /* RF control (RSSI others 4) */

#define	B43_NPHY_RFCTL_RSSIO4_RXPD 0x0001 /* RX PD */

#define	B43_NPHY_RFCTL_RSSIO4_TXPD 0x0002 /* TX PD */

#define	B43_NPHY_RFCTL_RSSIO4_PAPD 0x0004 /* PA PD */

#define	B43_NPHY_RFCTL_RSSIO4_RSSICTL 0x0030 /* RSSI control */

#define	B43_NPHY_RFCTL_RSSIO4_LPFBW 0x00C0 /* LPF bandwidth */

#define	B43_NPHY_RFCTL_RSSIO4_HPFBWHI 0x0100 /* HPF bandwidth high */

#define	B43_NPHY_RFCTL_RSSIO4_HIQDISCO 0x0200 /* HIQ dis core */

#define	B43_NPHY_RFCTL_RXG4 B43_PHY_N(0x084) /* RF control (RX gain 4) */

#define	B43_NPHY_RFCTL_TXG4 B43_PHY_N(0x085) /* RF control (TX gain 4) */

#define	B43_NPHY_C1_TXIQ_COMP_OFF B43_PHY_N(0x087) /* Core 1 TX I/Q comp offset */

#define	B43_NPHY_C2_TXIQ_COMP_OFF B43_PHY_N(0x088) /* Core 2 TX I/Q comp offset */

#define	B43_NPHY_C1_TXCTL B43_PHY_N(0x08B) /* Core 1 TX control */

#define	B43_NPHY_C2_TXCTL B43_PHY_N(0x08C) /* Core 2 TX control */

#define	B43_NPHY_AFECTL_OVER1 B43_PHY_N(0x08F) /* AFE control override 1 */

#define	B43_NPHY_SCRAM_SIGCTL B43_PHY_N(0x090) /* Scram signal control */

#define	B43_NPHY_SCRAM_SIGCTL_INITST 0x007F /* Initial state value */

#define	B43_NPHY_SCRAM_SIGCTL_INITST_SHIFT 0

#define	B43_NPHY_SCRAM_SIGCTL_SCM 0x0080 /* Scram control mode */

#define	B43_NPHY_SCRAM_SIGCTL_SICE 0x0100 /* Scram index control enable */

#define	B43_NPHY_SCRAM_SIGCTL_START 0xFE00 /* Scram start bit */

#define	B43_NPHY_SCRAM_SIGCTL_START_SHIFT 9

#define	B43_NPHY_RFCTL_INTC1 B43_PHY_N(0x091) /* RF control (intc 1) */

#define	B43_NPHY_RFCTL_INTC2 B43_PHY_N(0x092) /* RF control (intc 2) */

#define	B43_NPHY_RFCTL_INTC3 B43_PHY_N(0x093) /* RF control (intc 3) */

#define	B43_NPHY_RFCTL_INTC4 B43_PHY_N(0x094) /* RF control (intc 4) */

#define	B43_NPHY_NRDTO_WWISE B43_PHY_N(0x095) /* # datatones WWiSE */

#define	B43_NPHY_NRDTO_TGNSYNC B43_PHY_N(0x096) /* # datatones TGNsync */

#define	B43_NPHY_SIGFMOD_WWISE B43_PHY_N(0x097) /* Signal field mod WWiSE */

#define	B43_NPHY_LEG_SIGFMOD_11N B43_PHY_N(0x098) /* Legacy signal field mod 11n */

#define	B43_NPHY_HT_SIGFMOD_11N B43_PHY_N(0x099) /* HT signal field mod 11n */

#define	B43_NPHY_C1_RXIQ_COMPA0 B43_PHY_N(0x09A) /* Core 1 RX I/Q comp A0 */

#define	B43_NPHY_C1_RXIQ_COMPB0 B43_PHY_N(0x09B) /* Core 1 RX I/Q comp B0 */

#define	B43_NPHY_C2_RXIQ_COMPA1 B43_PHY_N(0x09C) /* Core 2 RX I/Q comp A1 */

#define	B43_NPHY_C2_RXIQ_COMPB1 B43_PHY_N(0x09D) /* Core 2 RX I/Q comp B1 */

#define	B43_NPHY_RXCTL B43_PHY_N(0x0A0) /* RX control */

#define	B43_NPHY_RXCTL_BSELU20 0x0010 /* Band select upper 20 */

#define	B43_NPHY_RXCTL_RIFSEN 0x0080 /* RIFS enable */

#define	B43_NPHY_RFSEQMODE B43_PHY_N(0x0A1) /* RF seq mode */

#define	B43_NPHY_RFSEQMODE_CAOVER 0x0001 /* Core active override */

#define	B43_NPHY_RFSEQMODE_TROVER 0x0002 /* Trigger override */

#define	B43_NPHY_RFSEQCA B43_PHY_N(0x0A2) /* RF seq core active */

#define	B43_NPHY_RFSEQCA_TXEN 0x000F /* TX enable */

#define	B43_NPHY_RFSEQCA_TXEN_SHIFT 0

#define	B43_NPHY_RFSEQCA_RXEN 0x00F0 /* RX enable */

#define	B43_NPHY_RFSEQCA_RXEN_SHIFT 4

#define	B43_NPHY_RFSEQCA_TXDIS 0x0F00 /* TX disable */

#define	B43_NPHY_RFSEQCA_TXDIS_SHIFT 8

#define	B43_NPHY_RFSEQCA_RXDIS 0xF000 /* RX disable */

#define	B43_NPHY_RFSEQCA_RXDIS_SHIFT 12

#define	B43_NPHY_RFSEQTR B43_PHY_N(0x0A3) /* RF seq trigger */

#define	B43_NPHY_RFSEQTR_RX2TX 0x0001 /* RX2TX */

#define	B43_NPHY_RFSEQTR_TX2RX 0x0002 /* TX2RX */

#define	B43_NPHY_RFSEQTR_UPGH 0x0004 /* Update gain H */

#define	B43_NPHY_RFSEQTR_UPGL 0x0008 /* Update gain L */

#define	B43_NPHY_RFSEQTR_UPGU 0x0010 /* Update gain U */

#define	B43_NPHY_RFSEQTR_RST2RX 0x0020 /* Reset to RX */

#define	B43_NPHY_RFSEQST B43_PHY_N(0x0A4) /* RF seq status. Values same as trigger. */

#define	B43_NPHY_AFECTL_OVER B43_PHY_N(0x0A5) /* AFE control override */

#define	B43_NPHY_AFECTL_C1 B43_PHY_N(0x0A6) /* AFE control core 1 */

#define	B43_NPHY_AFECTL_C2 B43_PHY_N(0x0A7) /* AFE control core 2 */

#define	B43_NPHY_AFECTL_C3 B43_PHY_N(0x0A8) /* AFE control core 3 */

#define	B43_NPHY_AFECTL_C4 B43_PHY_N(0x0A9) /* AFE control core 4 */

#define	B43_NPHY_AFECTL_DACGAIN1 B43_PHY_N(0x0AA) /* AFE control DAC gain 1 */

#define	B43_NPHY_AFECTL_DACGAIN2 B43_PHY_N(0x0AB) /* AFE control DAC gain 2 */

#define	B43_NPHY_AFECTL_DACGAIN3 B43_PHY_N(0x0AC) /* AFE control DAC gain 3 */

#define	B43_NPHY_AFECTL_DACGAIN4 B43_PHY_N(0x0AD) /* AFE control DAC gain 4 */

#define	B43_NPHY_STR_ADDR1 B43_PHY_N(0x0AE) /* STR address 1 */

#define	B43_NPHY_STR_ADDR2 B43_PHY_N(0x0AF) /* STR address 2 */

#define	B43_NPHY_CLASSCTL B43_PHY_N(0x0B0) /* Classifier control */

#define	B43_NPHY_CLASSCTL_CCKEN 0x0001 /* CCK enable */

#define	B43_NPHY_CLASSCTL_OFDMEN 0x0002 /* OFDM enable */

#define	B43_NPHY_CLASSCTL_WAITEDEN 0x0004 /* Waited enable */

#define	B43_NPHY_IQFLIP B43_PHY_N(0x0B1) /* I/Q flip */

#define	B43_NPHY_IQFLIP_ADC1 0x0001 /* ADC1 */

#define	B43_NPHY_IQFLIP_ADC2 0x0010 /* ADC2 */

#define	B43_NPHY_SISO_SNR_THRES B43_PHY_N(0x0B2) /* SISO SNR threshold */

#define	B43_NPHY_SIGMA_N_MULT B43_PHY_N(0x0B3) /* Sigma N multiplier */

#define	B43_NPHY_TXMACDELAY B43_PHY_N(0x0B4) /* TX MAC delay */

#define	B43_NPHY_TXFRAMEDELAY B43_PHY_N(0x0B5) /* TX frame delay */

#define	B43_NPHY_MLPARM B43_PHY_N(0x0B6) /* ML parameters */

#define	B43_NPHY_MLCTL B43_PHY_N(0x0B7) /* ML control */

#define	B43_NPHY_WWISE_20NCYCDAT B43_PHY_N(0x0B8) /* WWiSE 20 N cyc data */

#define	B43_NPHY_WWISE_40NCYCDAT B43_PHY_N(0x0B9) /* WWiSE 40 N cyc data */

#define	B43_NPHY_TGNSYNC_20NCYCDAT B43_PHY_N(0x0BA) /* TGNsync 20 N cyc data */

#define	B43_NPHY_TGNSYNC_40NCYCDAT B43_PHY_N(0x0BB) /* TGNsync 40 N cyc data */

#define	B43_NPHY_INITSWIZP B43_PHY_N(0x0BC) /* Initial swizzle pattern */

#define	B43_NPHY_TXTAILCNT B43_PHY_N(0x0BD) /* TX tail count value */

#define	B43_NPHY_BPHY_CTL1 B43_PHY_N(0x0BE) /* B PHY control 1 */

#define	B43_NPHY_BPHY_CTL2 B43_PHY_N(0x0BF) /* B PHY control 2 */

#define	B43_NPHY_BPHY_CTL2_LUT 0x001F /* LUT index */

#define	B43_NPHY_BPHY_CTL2_LUT_SHIFT 0

#define	B43_NPHY_BPHY_CTL2_MACDEL 0x7FE0 /* MAC delay */

#define	B43_NPHY_BPHY_CTL2_MACDEL_SHIFT 5

#define	B43_NPHY_IQLOCAL_CMD B43_PHY_N(0x0C0) /* I/Q LO cal command */

#define	B43_NPHY_IQLOCAL_CMD_EN 0x8000

#define	B43_NPHY_IQLOCAL_CMDNNUM B43_PHY_N(0x0C1) /* I/Q LO cal command N num */

#define	B43_NPHY_IQLOCAL_CMDGCTL B43_PHY_N(0x0C2) /* I/Q LO cal command G control */

#define	B43_NPHY_SAMP_CMD B43_PHY_N(0x0C3) /* Sample command */

#define	B43_NPHY_SAMP_CMD_STOP 0x0002 /* Stop */

#define	B43_NPHY_SAMP_LOOPCNT B43_PHY_N(0x0C4) /* Sample loop count */

#define	B43_NPHY_SAMP_WAITCNT B43_PHY_N(0x0C5) /* Sample wait count */

#define	B43_NPHY_SAMP_DEPCNT B43_PHY_N(0x0C6) /* Sample depth count */

#define	B43_NPHY_SAMP_STAT B43_PHY_N(0x0C7) /* Sample status */

#define	B43_NPHY_GPIO_LOOEN B43_PHY_N(0x0C8) /* GPIO low out enable */

#define	B43_NPHY_GPIO_HIOEN B43_PHY_N(0x0C9) /* GPIO high out enable */

#define	B43_NPHY_GPIO_SEL B43_PHY_N(0x0CA) /* GPIO select */

#define	B43_NPHY_GPIO_CLKCTL B43_PHY_N(0x0CB) /* GPIO clock control */

#define	B43_NPHY_TXF_20CO_AS0 B43_PHY_N(0x0CC) /* TX filter 20 coeff A stage 0 */

#define	B43_NPHY_TXF_20CO_AS1 B43_PHY_N(0x0CD) /* TX filter 20 coeff A stage 1 */

#define	B43_NPHY_TXF_20CO_AS2 B43_PHY_N(0x0CE) /* TX filter 20 coeff A stage 2 */

#define	B43_NPHY_TXF_20CO_B32S0 B43_PHY_N(0x0CF) /* TX filter 20 coeff B32 stage 0 */

#define	B43_NPHY_TXF_20CO_B1S0 B43_PHY_N(0x0D0) /* TX filter 20 coeff B1 stage 0 */

#define	B43_NPHY_TXF_20CO_B32S1 B43_PHY_N(0x0D1) /* TX filter 20 coeff B32 stage 1 */

#define	B43_NPHY_TXF_20CO_B1S1 B43_PHY_N(0x0D2) /* TX filter 20 coeff B1 stage 1 */

#define	B43_NPHY_TXF_20CO_B32S2 B43_PHY_N(0x0D3) /* TX filter 20 coeff B32 stage 2 */

#define	B43_NPHY_TXF_20CO_B1S2 B43_PHY_N(0x0D4) /* TX filter 20 coeff B1 stage 2 */

#define	B43_NPHY_SIGFLDTOL B43_PHY_N(0x0D5) /* Signal fld tolerance */

#define	B43_NPHY_TXSERFLD B43_PHY_N(0x0D6) /* TX service field */

#define	B43_NPHY_AFESEQ_RX2TX_PUD B43_PHY_N(0x0D7) /* AFE seq RX2TX power up/down delay */

#define	B43_NPHY_AFESEQ_TX2RX_PUD B43_PHY_N(0x0D8) /* AFE seq TX2RX power up/down delay */

#define	B43_NPHY_TGNSYNC_SCRAMI0 B43_PHY_N(0x0D9) /* TGNsync scram init 0 */

#define	B43_NPHY_TGNSYNC_SCRAMI1 B43_PHY_N(0x0DA) /* TGNsync scram init 1 */

#define	B43_NPHY_INITSWIZPATTLEG B43_PHY_N(0x0DB) /* Initial swizzle pattern leg */

#define	B43_NPHY_BPHY_CTL3 B43_PHY_N(0x0DC) /* B PHY control 3 */

#define	B43_NPHY_BPHY_CTL3_SCALE 0x00FF /* Scale */

#define	B43_NPHY_BPHY_CTL3_SCALE_SHIFT 0

#define	B43_NPHY_BPHY_CTL3_FSC 0xFF00 /* Frame start count value */

#define	B43_NPHY_BPHY_CTL3_FSC_SHIFT 8

#define	B43_NPHY_BPHY_CTL4 B43_PHY_N(0x0DD) /* B PHY control 4 */

#define	B43_NPHY_C1_TXBBMULT B43_PHY_N(0x0DE) /* Core 1 TX BB multiplier */

#define	B43_NPHY_C2_TXBBMULT B43_PHY_N(0x0DF) /* Core 2 TX BB multiplier */

#define	B43_NPHY_TXF_40CO_AS0 B43_PHY_N(0x0E1) /* TX filter 40 coeff A stage 0 */

#define	B43_NPHY_TXF_40CO_AS1 B43_PHY_N(0x0E2) /* TX filter 40 coeff A stage 1 */

#define	B43_NPHY_TXF_40CO_AS2 B43_PHY_N(0x0E3) /* TX filter 40 coeff A stage 2 */

#define	B43_NPHY_TXF_40CO_B32S0 B43_PHY_N(0x0E4) /* TX filter 40 coeff B32 stage 0 */

#define	B43_NPHY_TXF_40CO_B1S0 B43_PHY_N(0x0E5) /* TX filter 40 coeff B1 stage 0 */

#define	B43_NPHY_TXF_40CO_B32S1 B43_PHY_N(0x0E6) /* TX filter 40 coeff B32 stage 1 */

#define	B43_NPHY_TXF_40CO_B1S1 B43_PHY_N(0x0E7) /* TX filter 40 coeff B1 stage 1 */

#define	B43_NPHY_TXF_40CO_B32S2 B43_PHY_N(0x0E8) /* TX filter 40 coeff B32 stage 2 */

#define	B43_NPHY_TXF_40CO_B1S2 B43_PHY_N(0x0E9) /* TX filter 40 coeff B1 stage 2 */

#define	B43_NPHY_BIST_STAT2 B43_PHY_N(0x0EA) /* BIST status 2 */

#define	B43_NPHY_BIST_STAT3 B43_PHY_N(0x0EB) /* BIST status 3 */

#define	B43_NPHY_RFCTL_OVER B43_PHY_N(0x0EC) /* RF control override */

#define	B43_NPHY_MIMOCFG B43_PHY_N(0x0ED) /* MIMO config */

#define	B43_NPHY_MIMOCFG_GFMIX 0x0004 /* Greenfield or mixed mode */

#define	B43_NPHY_MIMOCFG_AUTO 0x0100 /* Greenfield/mixed mode auto */

#define	B43_NPHY_RADAR_BLNKCTL B43_PHY_N(0x0EE) /* Radar blank control */

#define	B43_NPHY_A0RADAR_FIFOCTL B43_PHY_N(0x0EF) /* Antenna 0 radar FIFO control */

#define	B43_NPHY_A1RADAR_FIFOCTL B43_PHY_N(0x0F0) /* Antenna 1 radar FIFO control */

#define	B43_NPHY_A0RADAR_FIFODAT B43_PHY_N(0x0F1) /* Antenna 0 radar FIFO data */

#define	B43_NPHY_A1RADAR_FIFODAT B43_PHY_N(0x0F2) /* Antenna 1 radar FIFO data */

#define	B43_NPHY_RADAR_THRES0 B43_PHY_N(0x0F3) /* Radar threshold 0 */

#define	B43_NPHY_RADAR_THRES1 B43_PHY_N(0x0F4) /* Radar threshold 1 */

#define	B43_NPHY_RADAR_THRES0R B43_PHY_N(0x0F5) /* Radar threshold 0R */

#define	B43_NPHY_RADAR_THRES1R B43_PHY_N(0x0F6) /* Radar threshold 1R */

#define	B43_NPHY_CSEN_20IN40_DLEN B43_PHY_N(0x0F7) /* Carrier sense 20 in 40 dwell length */

#define	B43_NPHY_RFCTL_LUT_TRSW_LO1 B43_PHY_N(0x0F8) /* RF control LUT TRSW lower 1 */

#define	B43_NPHY_RFCTL_LUT_TRSW_UP1 B43_PHY_N(0x0F9) /* RF control LUT TRSW upper 1 */

#define	B43_NPHY_RFCTL_LUT_TRSW_LO2 B43_PHY_N(0x0FA) /* RF control LUT TRSW lower 2 */

#define	B43_NPHY_RFCTL_LUT_TRSW_UP2 B43_PHY_N(0x0FB) /* RF control LUT TRSW upper 2 */

#define	B43_NPHY_RFCTL_LUT_TRSW_LO3 B43_PHY_N(0x0FC) /* RF control LUT TRSW lower 3 */

#define	B43_NPHY_RFCTL_LUT_TRSW_UP3 B43_PHY_N(0x0FD) /* RF control LUT TRSW upper 3 */

#define	B43_NPHY_RFCTL_LUT_TRSW_LO4 B43_PHY_N(0x0FE) /* RF control LUT TRSW lower 4 */

#define	B43_NPHY_RFCTL_LUT_TRSW_UP4 B43_PHY_N(0x0FF) /* RF control LUT TRSW upper 4 */

#define	B43_NPHY_RFCTL_LUT_LNAPA1 B43_PHY_N(0x100) /* RF control LUT LNA PA 1 */

#define	B43_NPHY_RFCTL_LUT_LNAPA2 B43_PHY_N(0x101) /* RF control LUT LNA PA 2 */

#define	B43_NPHY_RFCTL_LUT_LNAPA3 B43_PHY_N(0x102) /* RF control LUT LNA PA 3 */

#define	B43_NPHY_RFCTL_LUT_LNAPA4 B43_PHY_N(0x103) /* RF control LUT LNA PA 4 */

#define	B43_NPHY_TGNSYNC_CRCM0 B43_PHY_N(0x104) /* TGNsync CRC mask 0 */

#define	B43_NPHY_TGNSYNC_CRCM1 B43_PHY_N(0x105) /* TGNsync CRC mask 1 */

#define	B43_NPHY_TGNSYNC_CRCM2 B43_PHY_N(0x106) /* TGNsync CRC mask 2 */

#define	B43_NPHY_TGNSYNC_CRCM3 B43_PHY_N(0x107) /* TGNsync CRC mask 3 */

#define	B43_NPHY_TGNSYNC_CRCM4 B43_PHY_N(0x108) /* TGNsync CRC mask 4 */

#define	B43_NPHY_CRCPOLY B43_PHY_N(0x109) /* CRC polynomial */

#define	B43_NPHY_SIGCNT B43_PHY_N(0x10A) /* # sig count */

#define	B43_NPHY_SIGSTARTBIT_CTL B43_PHY_N(0x10B) /* Sig start bit control */

#define	B43_NPHY_CRCPOLY_ORDER B43_PHY_N(0x10C) /* CRC polynomial order */

#define	B43_NPHY_RFCTL_CST0 B43_PHY_N(0x10D) /* RF control core swap table 0 */

#define	B43_NPHY_RFCTL_CST1 B43_PHY_N(0x10E) /* RF control core swap table 1 */

#define	B43_NPHY_RFCTL_CST2O B43_PHY_N(0x10F) /* RF control core swap table 2 + others */

#define	B43_NPHY_BPHY_CTL5 B43_PHY_N(0x111) /* B PHY control 5 */

#define	B43_NPHY_RFSEQ_LPFBW B43_PHY_N(0x112) /* RF seq LPF bandwidth */

#define	B43_NPHY_TSSIBIAS1 B43_PHY_N(0x114) /* TSSI bias val 1 */

#define	B43_NPHY_TSSIBIAS2 B43_PHY_N(0x115) /* TSSI bias val 2 */

#define	B43_NPHY_TSSIBIAS_BIAS 0x00FF /* Bias */

#define	B43_NPHY_TSSIBIAS_BIAS_SHIFT 0

#define	B43_NPHY_TSSIBIAS_VAL 0xFF00 /* Value */

#define	B43_NPHY_TSSIBIAS_VAL_SHIFT 8

#define	B43_NPHY_ESTPWR1 B43_PHY_N(0x118) /* Estimated power 1 */

#define	B43_NPHY_ESTPWR2 B43_PHY_N(0x119) /* Estimated power 2 */

#define	B43_NPHY_ESTPWR_PWR 0x00FF /* Estimated power */

#define	B43_NPHY_ESTPWR_PWR_SHIFT 0

#define	B43_NPHY_ESTPWR_VALID 0x0100 /* Estimated power valid */

#define	B43_NPHY_TSSI_MAXTXFDT B43_PHY_N(0x11C) /* TSSI max TX frame delay time */

#define	B43_NPHY_TSSI_MAXTXFDT_VAL 0x00FF /* max TX frame delay time */

#define	B43_NPHY_TSSI_MAXTXFDT_VAL_SHIFT 0

#define	B43_NPHY_TSSI_MAXTDT B43_PHY_N(0x11D) /* TSSI max TSSI delay time */

#define	B43_NPHY_TSSI_MAXTDT_VAL 0x00FF /* max TSSI delay time */

#define	B43_NPHY_TSSI_MAXTDT_VAL_SHIFT 0

#define	B43_NPHY_ITSSI1 B43_PHY_N(0x11E) /* TSSI idle 1 */

#define	B43_NPHY_ITSSI2 B43_PHY_N(0x11F) /* TSSI idle 2 */

#define	B43_NPHY_ITSSI_VAL 0x00FF /* Idle TSSI */

#define	B43_NPHY_ITSSI_VAL_SHIFT 0

#define	B43_NPHY_TSSIMODE B43_PHY_N(0x122) /* TSSI mode */

#define	B43_NPHY_TSSIMODE_EN 0x0001 /* TSSI enable */

#define	B43_NPHY_TSSIMODE_PDEN 0x0002 /* Power det enable */

#define	B43_NPHY_RXMACIFM B43_PHY_N(0x123) /* RX Macif mode */

#define	B43_NPHY_CRSIT_COCNT_LO B43_PHY_N(0x124) /* CRS idle time CRS-on count (low) */

#define	B43_NPHY_CRSIT_COCNT_HI B43_PHY_N(0x125) /* CRS idle time CRS-on count (high) */

#define	B43_NPHY_CRSIT_MTCNT_LO B43_PHY_N(0x126) /* CRS idle time measure time count (low) */

#define	B43_NPHY_CRSIT_MTCNT_HI B43_PHY_N(0x127) /* CRS idle time measure time count (high) */

#define	B43_NPHY_SAMTWC B43_PHY_N(0x128) /* Sample tail wait count */

#define	B43_NPHY_IQEST_CMD B43_PHY_N(0x129) /* I/Q estimate command */

#define	B43_NPHY_IQEST_CMD_START 0x0001 /* Start */

#define	B43_NPHY_IQEST_CMD_MODE 0x0002 /* Mode */

#define	B43_NPHY_IQEST_WT B43_PHY_N(0x12A) /* I/Q estimate wait time */

#define	B43_NPHY_IQEST_WT_VAL 0x00FF /* Wait time */

#define	B43_NPHY_IQEST_WT_VAL_SHIFT 0

#define	B43_NPHY_IQEST_SAMCNT B43_PHY_N(0x12B) /* I/Q estimate sample count */

#define	B43_NPHY_IQEST_IQACC_LO0 B43_PHY_N(0x12C) /* I/Q estimate I/Q acc lo 0 */

#define	B43_NPHY_IQEST_IQACC_HI0 B43_PHY_N(0x12D) /* I/Q estimate I/Q acc hi 0 */

#define	B43_NPHY_IQEST_IPACC_LO0 B43_PHY_N(0x12E) /* I/Q estimate I power acc lo 0 */

#define	B43_NPHY_IQEST_IPACC_HI0 B43_PHY_N(0x12F) /* I/Q estimate I power acc hi 0 */

#define	B43_NPHY_IQEST_QPACC_LO0 B43_PHY_N(0x130) /* I/Q estimate Q power acc lo 0 */

#define	B43_NPHY_IQEST_QPACC_HI0 B43_PHY_N(0x131) /* I/Q estimate Q power acc hi 0 */

#define	B43_NPHY_IQEST_IQACC_LO1 B43_PHY_N(0x134) /* I/Q estimate I/Q acc lo 1 */

#define	B43_NPHY_IQEST_IQACC_HI1 B43_PHY_N(0x135) /* I/Q estimate I/Q acc hi 1 */

#define	B43_NPHY_IQEST_IPACC_LO1 B43_PHY_N(0x136) /* I/Q estimate I power acc lo 1 */

#define	B43_NPHY_IQEST_IPACC_HI1 B43_PHY_N(0x137) /* I/Q estimate I power acc hi 1 */

#define	B43_NPHY_IQEST_QPACC_LO1 B43_PHY_N(0x138) /* I/Q estimate Q power acc lo 1 */

#define	B43_NPHY_IQEST_QPACC_HI1 B43_PHY_N(0x139) /* I/Q estimate Q power acc hi 1 */

#define	B43_NPHY_MIMO_CRSTXEXT B43_PHY_N(0x13A) /* MIMO PHY CRS TX extension */

#define	B43_NPHY_PWRDET1 B43_PHY_N(0x13B) /* Power det 1 */

#define	B43_NPHY_PWRDET2 B43_PHY_N(0x13C) /* Power det 2 */

#define	B43_NPHY_MAXRSSI_DTIME B43_PHY_N(0x13F) /* RSSI max RSSI delay time */

#define	B43_NPHY_PIL_DW0 B43_PHY_N(0x141) /* Pilot data weight 0 */

#define	B43_NPHY_PIL_DW1 B43_PHY_N(0x142) /* Pilot data weight 1 */

#define	B43_NPHY_PIL_DW2 B43_PHY_N(0x143) /* Pilot data weight 2 */

#define	B43_NPHY_PIL_DW_BPSK 0x000F /* BPSK */

#define	B43_NPHY_PIL_DW_BPSK_SHIFT 0

#define	B43_NPHY_PIL_DW_QPSK 0x00F0 /* QPSK */

#define	B43_NPHY_PIL_DW_QPSK_SHIFT 4

#define	B43_NPHY_PIL_DW_16QAM 0x0F00 /* 16-QAM */

#define	B43_NPHY_PIL_DW_16QAM_SHIFT 8

#define	B43_NPHY_PIL_DW_64QAM 0xF000 /* 64-QAM */

#define	B43_NPHY_PIL_DW_64QAM_SHIFT 12

#define	B43_NPHY_FMDEM_CFG B43_PHY_N(0x144) /* FM demodulation config */

#define	B43_NPHY_PHASETR_A0 B43_PHY_N(0x145) /* Phase track alpha 0 */

#define	B43_NPHY_PHASETR_A1 B43_PHY_N(0x146) /* Phase track alpha 1 */

#define	B43_NPHY_PHASETR_A2 B43_PHY_N(0x147) /* Phase track alpha 2 */

#define	B43_NPHY_PHASETR_B0 B43_PHY_N(0x148) /* Phase track beta 0 */

#define	B43_NPHY_PHASETR_B1 B43_PHY_N(0x149) /* Phase track beta 1 */

#define	B43_NPHY_PHASETR_B2 B43_PHY_N(0x14A) /* Phase track beta 2 */

#define	B43_NPHY_PHASETR_CHG0 B43_PHY_N(0x14B) /* Phase track change 0 */

#define	B43_NPHY_PHASETR_CHG1 B43_PHY_N(0x14C) /* Phase track change 1 */

#define	B43_NPHY_PHASETW_OFF B43_PHY_N(0x14D) /* Phase track offset */

#define	B43_NPHY_RFCTL_DBG B43_PHY_N(0x14E) /* RF control debug */

#define	B43_NPHY_CCK_SHIFTB_REF B43_PHY_N(0x150) /* CCK shiftbits reference var */

#define	B43_NPHY_OVER_DGAIN0 B43_PHY_N(0x152) /* Override digital gain 0 */

#define	B43_NPHY_OVER_DGAIN1 B43_PHY_N(0x153) /* Override digital gain 1 */

#define	B43_NPHY_OVER_DGAIN_FDGV 0x0007 /* Force digital gain value */

#define	B43_NPHY_OVER_DGAIN_FDGV_SHIFT 0

#define	B43_NPHY_OVER_DGAIN_FDGEN 0x0008 /* Force digital gain enable */

#define	B43_NPHY_OVER_DGAIN_CCKDGECV 0xFF00 /* CCK digital gain enable count value */

#define	B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT 8

#define	B43_NPHY_BIST_STAT4 B43_PHY_N(0x156) /* BIST status 4 */

#define	B43_NPHY_RADAR_MAL B43_PHY_N(0x157) /* Radar MA length */

#define	B43_NPHY_RADAR_SRCCTL B43_PHY_N(0x158) /* Radar search control */

#define	B43_NPHY_VLD_DTSIG B43_PHY_N(0x159) /* VLD data tones sig */

#define	B43_NPHY_VLD_DTDAT B43_PHY_N(0x15A) /* VLD data tones data */

#define	B43_NPHY_C1_BPHY_RXIQCA0 B43_PHY_N(0x15B) /* Core 1 B PHY RX I/Q comp A0 */

#define	B43_NPHY_C1_BPHY_RXIQCB0 B43_PHY_N(0x15C) /* Core 1 B PHY RX I/Q comp B0 */

#define	B43_NPHY_C2_BPHY_RXIQCA1 B43_PHY_N(0x15D) /* Core 2 B PHY RX I/Q comp A1 */

#define	B43_NPHY_C2_BPHY_RXIQCB1 B43_PHY_N(0x15E) /* Core 2 B PHY RX I/Q comp B1 */

#define	B43_NPHY_FREQGAIN0 B43_PHY_N(0x160) /* Frequency gain 0 */

#define	B43_NPHY_FREQGAIN1 B43_PHY_N(0x161) /* Frequency gain 1 */

#define	B43_NPHY_FREQGAIN2 B43_PHY_N(0x162) /* Frequency gain 2 */

#define	B43_NPHY_FREQGAIN3 B43_PHY_N(0x163) /* Frequency gain 3 */

#define	B43_NPHY_FREQGAIN4 B43_PHY_N(0x164) /* Frequency gain 4 */

#define	B43_NPHY_FREQGAIN5 B43_PHY_N(0x165) /* Frequency gain 5 */

#define	B43_NPHY_FREQGAIN6 B43_PHY_N(0x166) /* Frequency gain 6 */

#define	B43_NPHY_FREQGAIN7 B43_PHY_N(0x167) /* Frequency gain 7 */

#define	B43_NPHY_FREQGAIN_BYPASS B43_PHY_N(0x168) /* Frequency gain bypass */

#define	B43_NPHY_TRLOSS B43_PHY_N(0x169) /* TR loss value */

#define	B43_NPHY_C1_ADCCLIP B43_PHY_N(0x16A) /* Core 1 ADC clip */

#define	B43_NPHY_C2_ADCCLIP B43_PHY_N(0x16B) /* Core 2 ADC clip */

#define	B43_NPHY_LTRN_OFFGAIN B43_PHY_N(0x16F) /* LTRN offset gain */

#define	B43_NPHY_LTRN_OFF B43_PHY_N(0x170) /* LTRN offset */

#define	B43_NPHY_NRDATAT_WWISE20SIG B43_PHY_N(0x171) /* # data tones WWiSE 20 sig */

#define	B43_NPHY_NRDATAT_WWISE40SIG B43_PHY_N(0x172) /* # data tones WWiSE 40 sig */

#define	B43_NPHY_NRDATAT_TGNSYNC20SIG B43_PHY_N(0x173) /* # data tones TGNsync 20 sig */

#define	B43_NPHY_NRDATAT_TGNSYNC40SIG B43_PHY_N(0x174) /* # data tones TGNsync 40 sig */

#define	B43_NPHY_WWISE_CRCM0 B43_PHY_N(0x175) /* WWiSE CRC mask 0 */

#define	B43_NPHY_WWISE_CRCM1 B43_PHY_N(0x176) /* WWiSE CRC mask 1 */

#define	B43_NPHY_WWISE_CRCM2 B43_PHY_N(0x177) /* WWiSE CRC mask 2 */

#define	B43_NPHY_WWISE_CRCM3 B43_PHY_N(0x178) /* WWiSE CRC mask 3 */

#define	B43_NPHY_WWISE_CRCM4 B43_PHY_N(0x179) /* WWiSE CRC mask 4 */

#define	B43_NPHY_CHANEST_CDDSH B43_PHY_N(0x17A) /* Channel estimate CDD shift */

#define	B43_NPHY_HTAGC_WCNT B43_PHY_N(0x17B) /* HT ADC wait counters */

#define	B43_NPHY_SQPARM B43_PHY_N(0x17C) /* SQ params */

#define	B43_NPHY_MCSDUP6M B43_PHY_N(0x17D) /* MCS dup 6M */

#define	B43_NPHY_NDATAT_DUP40 B43_PHY_N(0x17E) /* # data tones dup 40 */

#define	B43_NPHY_DUP40_TGNSYNC_CYCD B43_PHY_N(0x17F) /* Dup40 TGNsync cycle data */

#define	B43_NPHY_DUP40_GFBL B43_PHY_N(0x180) /* Dup40 GF format BL address */

#define	B43_NPHY_DUP40_BL B43_PHY_N(0x181) /* Dup40 format BL address */

#define	B43_NPHY_LEGDUP_FTA B43_PHY_N(0x182) /* Legacy dup frm table address */

#define	B43_NPHY_PACPROC_DBG B43_PHY_N(0x183) /* Packet processing debug */

#define	B43_NPHY_PIL_CYC1 B43_PHY_N(0x184) /* Pilot cycle counter 1 */

#define	B43_NPHY_PIL_CYC2 B43_PHY_N(0x185) /* Pilot cycle counter 2 */

#define	B43_NPHY_TXF_20CO_S0A1 B43_PHY_N(0x186) /* TX filter 20 coeff stage 0 A1 */

#define	B43_NPHY_TXF_20CO_S0A2 B43_PHY_N(0x187) /* TX filter 20 coeff stage 0 A2 */

#define	B43_NPHY_TXF_20CO_S1A1 B43_PHY_N(0x188) /* TX filter 20 coeff stage 1 A1 */

#define	B43_NPHY_TXF_20CO_S1A2 B43_PHY_N(0x189) /* TX filter 20 coeff stage 1 A2 */

#define	B43_NPHY_TXF_20CO_S2A1 B43_PHY_N(0x18A) /* TX filter 20 coeff stage 2 A1 */

#define	B43_NPHY_TXF_20CO_S2A2 B43_PHY_N(0x18B) /* TX filter 20 coeff stage 2 A2 */

#define	B43_NPHY_TXF_20CO_S0B1 B43_PHY_N(0x18C) /* TX filter 20 coeff stage 0 B1 */

#define	B43_NPHY_TXF_20CO_S0B2 B43_PHY_N(0x18D) /* TX filter 20 coeff stage 0 B2 */

#define	B43_NPHY_TXF_20CO_S0B3 B43_PHY_N(0x18E) /* TX filter 20 coeff stage 0 B3 */

#define	B43_NPHY_TXF_20CO_S1B1 B43_PHY_N(0x18F) /* TX filter 20 coeff stage 1 B1 */

#define	B43_NPHY_TXF_20CO_S1B2 B43_PHY_N(0x190) /* TX filter 20 coeff stage 1 B2 */

#define	B43_NPHY_TXF_20CO_S1B3 B43_PHY_N(0x191) /* TX filter 20 coeff stage 1 B3 */

#define	B43_NPHY_TXF_20CO_S2B1 B43_PHY_N(0x192) /* TX filter 20 coeff stage 2 B1 */

#define	B43_NPHY_TXF_20CO_S2B2 B43_PHY_N(0x193) /* TX filter 20 coeff stage 2 B2 */

#define	B43_NPHY_TXF_20CO_S2B3 B43_PHY_N(0x194) /* TX filter 20 coeff stage 2 B3 */

#define	B43_NPHY_TXF_40CO_S0A1 B43_PHY_N(0x195) /* TX filter 40 coeff stage 0 A1 */

#define	B43_NPHY_TXF_40CO_S0A2 B43_PHY_N(0x196) /* TX filter 40 coeff stage 0 A2 */

#define	B43_NPHY_TXF_40CO_S1A1 B43_PHY_N(0x197) /* TX filter 40 coeff stage 1 A1 */

#define	B43_NPHY_TXF_40CO_S1A2 B43_PHY_N(0x198) /* TX filter 40 coeff stage 1 A2 */

#define	B43_NPHY_TXF_40CO_S2A1 B43_PHY_N(0x199) /* TX filter 40 coeff stage 2 A1 */

#define	B43_NPHY_TXF_40CO_S2A2 B43_PHY_N(0x19A) /* TX filter 40 coeff stage 2 A2 */

#define	B43_NPHY_TXF_40CO_S0B1 B43_PHY_N(0x19B) /* TX filter 40 coeff stage 0 B1 */

#define	B43_NPHY_TXF_40CO_S0B2 B43_PHY_N(0x19C) /* TX filter 40 coeff stage 0 B2 */

#define	B43_NPHY_TXF_40CO_S0B3 B43_PHY_N(0x19D) /* TX filter 40 coeff stage 0 B3 */

#define	B43_NPHY_TXF_40CO_S1B1 B43_PHY_N(0x19E) /* TX filter 40 coeff stage 1 B1 */

#define	B43_NPHY_TXF_40CO_S1B2 B43_PHY_N(0x19F) /* TX filter 40 coeff stage 1 B2 */

#define	B43_NPHY_TXF_40CO_S1B3 B43_PHY_N(0x1A0) /* TX filter 40 coeff stage 1 B3 */

#define	B43_NPHY_TXF_40CO_S2B1 B43_PHY_N(0x1A1) /* TX filter 40 coeff stage 2 B1 */

#define	B43_NPHY_TXF_40CO_S2B2 B43_PHY_N(0x1A2) /* TX filter 40 coeff stage 2 B2 */

#define	B43_NPHY_TXF_40CO_S2B3 B43_PHY_N(0x1A3) /* TX filter 40 coeff stage 2 B3 */

#define	B43_NPHY_RSSIMC_0I_RSSI_X B43_PHY_N(0x1A4) /* RSSI multiplication coefficient 0 I RSSI X */

#define	B43_NPHY_RSSIMC_0I_RSSI_Y B43_PHY_N(0x1A5) /* RSSI multiplication coefficient 0 I RSSI Y */

#define	B43_NPHY_RSSIMC_0I_RSSI_Z B43_PHY_N(0x1A6) /* RSSI multiplication coefficient 0 I RSSI Z */

#define	B43_NPHY_RSSIMC_0I_TBD B43_PHY_N(0x1A7) /* RSSI multiplication coefficient 0 I TBD */

#define	B43_NPHY_RSSIMC_0I_PWRDET B43_PHY_N(0x1A8) /* RSSI multiplication coefficient 0 I power det */

#define	B43_NPHY_RSSIMC_0I_TSSI B43_PHY_N(0x1A9) /* RSSI multiplication coefficient 0 I TSSI */

#define	B43_NPHY_RSSIMC_0Q_RSSI_X B43_PHY_N(0x1AA) /* RSSI multiplication coefficient 0 Q RSSI X */

#define	B43_NPHY_RSSIMC_0Q_RSSI_Y B43_PHY_N(0x1AB) /* RSSI multiplication coefficient 0 Q RSSI Y */

#define	B43_NPHY_RSSIMC_0Q_RSSI_Z B43_PHY_N(0x1AC) /* RSSI multiplication coefficient 0 Q RSSI Z */

#define	B43_NPHY_RSSIMC_0Q_TBD B43_PHY_N(0x1AD) /* RSSI multiplication coefficient 0 Q TBD */

#define	B43_NPHY_RSSIMC_0Q_PWRDET B43_PHY_N(0x1AE) /* RSSI multiplication coefficient 0 Q power det */

#define	B43_NPHY_RSSIMC_0Q_TSSI B43_PHY_N(0x1AF) /* RSSI multiplication coefficient 0 Q TSSI */

#define	B43_NPHY_RSSIMC_1I_RSSI_X B43_PHY_N(0x1B0) /* RSSI multiplication coefficient 1 I RSSI X */

#define	B43_NPHY_RSSIMC_1I_RSSI_Y B43_PHY_N(0x1B1) /* RSSI multiplication coefficient 1 I RSSI Y */

#define	B43_NPHY_RSSIMC_1I_RSSI_Z B43_PHY_N(0x1B2) /* RSSI multiplication coefficient 1 I RSSI Z */

#define	B43_NPHY_RSSIMC_1I_TBD B43_PHY_N(0x1B3) /* RSSI multiplication coefficient 1 I TBD */

#define	B43_NPHY_RSSIMC_1I_PWRDET B43_PHY_N(0x1B4) /* RSSI multiplication coefficient 1 I power det */

#define	B43_NPHY_RSSIMC_1I_TSSI B43_PHY_N(0x1B5) /* RSSI multiplication coefficient 1 I TSSI */

#define	B43_NPHY_RSSIMC_1Q_RSSI_X B43_PHY_N(0x1B6) /* RSSI multiplication coefficient 1 Q RSSI X */

#define	B43_NPHY_RSSIMC_1Q_RSSI_Y B43_PHY_N(0x1B7) /* RSSI multiplication coefficient 1 Q RSSI Y */

#define	B43_NPHY_RSSIMC_1Q_RSSI_Z B43_PHY_N(0x1B8) /* RSSI multiplication coefficient 1 Q RSSI Z */

#define	B43_NPHY_RSSIMC_1Q_TBD B43_PHY_N(0x1B9) /* RSSI multiplication coefficient 1 Q TBD */

#define	B43_NPHY_RSSIMC_1Q_PWRDET B43_PHY_N(0x1BA) /* RSSI multiplication coefficient 1 Q power det */

#define	B43_NPHY_RSSIMC_1Q_TSSI B43_PHY_N(0x1BB) /* RSSI multiplication coefficient 1 Q TSSI */

#define	B43_NPHY_SAMC_WCNT B43_PHY_N(0x1BC) /* Sample collect wait counter */

#define	B43_NPHY_PTHROUGH_CNT B43_PHY_N(0x1BD) /* Pass-through counter */

#define	B43_NPHY_LTRN_OFF_G20L B43_PHY_N(0x1C4) /* LTRN offset gain 20L */

#define	B43_NPHY_LTRN_OFF_20L B43_PHY_N(0x1C5) /* LTRN offset 20L */

#define	B43_NPHY_LTRN_OFF_G20U B43_PHY_N(0x1C6) /* LTRN offset gain 20U */

#define	B43_NPHY_LTRN_OFF_20U B43_PHY_N(0x1C7) /* LTRN offset 20U */

#define	B43_NPHY_DSSSCCK_GAINSL B43_PHY_N(0x1C8) /* DSSS/CCK gain settle length */

#define	B43_NPHY_GPIO_LOOUT B43_PHY_N(0x1C9) /* GPIO low out */

#define	B43_NPHY_GPIO_HIOUT B43_PHY_N(0x1CA) /* GPIO high out */

#define	B43_NPHY_CRS_CHECK B43_PHY_N(0x1CB) /* CRS check */

#define	B43_NPHY_ML_LOGSS_RAT B43_PHY_N(0x1CC) /* ML/logss ratio */

#define	B43_NPHY_DUPSCALE B43_PHY_N(0x1CD) /* Dup scale */

#define	B43_NPHY_BW1A B43_PHY_N(0x1CE) /* BW 1A */

#define	B43_NPHY_BW2 B43_PHY_N(0x1CF) /* BW 2 */

#define	B43_NPHY_BW3 B43_PHY_N(0x1D0) /* BW 3 */

#define	B43_NPHY_BW4 B43_PHY_N(0x1D1) /* BW 4 */

#define	B43_NPHY_BW5 B43_PHY_N(0x1D2) /* BW 5 */

#define	B43_NPHY_BW6 B43_PHY_N(0x1D3) /* BW 6 */

#define	B43_NPHY_COALEN0 B43_PHY_N(0x1D4) /* Coarse length 0 */

#define	B43_NPHY_COALEN1 B43_PHY_N(0x1D5) /* Coarse length 1 */

#define	B43_NPHY_CRSTHRES_1U B43_PHY_N(0x1D6) /* CRS threshold 1 U */

#define	B43_NPHY_CRSTHRES_2U B43_PHY_N(0x1D7) /* CRS threshold 2 U */

#define	B43_NPHY_CRSTHRES_3U B43_PHY_N(0x1D8) /* CRS threshold 3 U */

#define	B43_NPHY_CRSCTL_U B43_PHY_N(0x1D9) /* CRS control U */

#define	B43_NPHY_CRSTHRES_1L B43_PHY_N(0x1DA) /* CRS threshold 1 L */

#define	B43_NPHY_CRSTHRES_2L B43_PHY_N(0x1DB) /* CRS threshold 2 L */

#define	B43_NPHY_CRSTHRES_3L B43_PHY_N(0x1DC) /* CRS threshold 3 L */

#define	B43_NPHY_CRSCTL_L B43_PHY_N(0x1DD) /* CRS control L */

#define	B43_NPHY_STRA_1U B43_PHY_N(0x1DE) /* STR address 1 U */

#define	B43_NPHY_STRA_2U B43_PHY_N(0x1DF) /* STR address 2 U */

#define	B43_NPHY_STRA_1L B43_PHY_N(0x1E0) /* STR address 1 L */

#define	B43_NPHY_STRA_2L B43_PHY_N(0x1E1) /* STR address 2 L */

#define	B43_NPHY_CRSCHECK1 B43_PHY_N(0x1E2) /* CRS check 1 */

#define	B43_NPHY_CRSCHECK2 B43_PHY_N(0x1E3) /* CRS check 2 */

#define	B43_NPHY_CRSCHECK3 B43_PHY_N(0x1E4) /* CRS check 3 */

#define	B43_NPHY_JMPSTP0 B43_PHY_N(0x1E5) /* Jump step 0 */

#define	B43_NPHY_JMPSTP1 B43_PHY_N(0x1E6) /* Jump step 1 */

#define	B43_NPHY_TXPCTL_CMD B43_PHY_N(0x1E7) /* TX power control command */

#define	B43_NPHY_TXPCTL_CMD_INIT 0x007F /* Init */

#define	B43_NPHY_TXPCTL_CMD_INIT_SHIFT 0

#define	B43_NPHY_TXPCTL_CMD_COEFF 0x2000 /* Power control coefficients */

#define	B43_NPHY_TXPCTL_CMD_HWPCTLEN 0x4000 /* Hardware TX power control enable */

#define	B43_NPHY_TXPCTL_CMD_PCTLEN 0x8000 /* TX power control enable */

#define	B43_NPHY_TXPCTL_N B43_PHY_N(0x1E8) /* TX power control N num */

#define	B43_NPHY_TXPCTL_N_TSSID 0x00FF /* N TSSI delay */

#define	B43_NPHY_TXPCTL_N_TSSID_SHIFT 0

#define	B43_NPHY_TXPCTL_N_NPTIL2 0x0700 /* N PT integer log2 */

#define	B43_NPHY_TXPCTL_N_NPTIL2_SHIFT 8

#define	B43_NPHY_TXPCTL_ITSSI B43_PHY_N(0x1E9) /* TX power control idle TSSI */

#define	B43_NPHY_TXPCTL_ITSSI_0 0x003F /* Idle TSSI 0 */

#define	B43_NPHY_TXPCTL_ITSSI_0_SHIFT 0

#define	B43_NPHY_TXPCTL_ITSSI_1 0x3F00 /* Idle TSSI 1 */

#define	B43_NPHY_TXPCTL_ITSSI_1_SHIFT 8

#define	B43_NPHY_TXPCTL_ITSSI_BINF 0x8000 /* Raw TSSI offset bin format */

#define	B43_NPHY_TXPCTL_TPWR B43_PHY_N(0x1EA) /* TX power control target power */

#define	B43_NPHY_TXPCTL_TPWR_0 0x00FF /* Power 0 */

#define	B43_NPHY_TXPCTL_TPWR_0_SHIFT 0

#define	B43_NPHY_TXPCTL_TPWR_1 0xFF00 /* Power 1 */

#define	B43_NPHY_TXPCTL_TPWR_1_SHIFT 8

#define	B43_NPHY_TXPCTL_BIDX B43_PHY_N(0x1EB) /* TX power control base index */

#define	B43_NPHY_TXPCTL_BIDX_0 0x007F /* uC base index 0 */

#define	B43_NPHY_TXPCTL_BIDX_0_SHIFT 0

#define	B43_NPHY_TXPCTL_BIDX_1 0x7F00 /* uC base index 1 */

#define	B43_NPHY_TXPCTL_BIDX_1_SHIFT 8

#define	B43_NPHY_TXPCTL_BIDX_LOAD 0x8000 /* Load base index */

#define	B43_NPHY_TXPCTL_PIDX B43_PHY_N(0x1EC) /* TX power control power index */

#define	B43_NPHY_TXPCTL_PIDX_0 0x007F /* uC power index 0 */

#define	B43_NPHY_TXPCTL_PIDX_0_SHIFT 0

#define	B43_NPHY_TXPCTL_PIDX_1 0x7F00 /* uC power index 1 */

#define	B43_NPHY_TXPCTL_PIDX_1_SHIFT 8

#define	B43_NPHY_C1_TXPCTL_STAT B43_PHY_N(0x1ED) /* Core 1 TX power control status */

#define	B43_NPHY_C2_TXPCTL_STAT B43_PHY_N(0x1EE) /* Core 2 TX power control status */

#define	B43_NPHY_TXPCTL_STAT_EST 0x00FF /* Estimated power */

#define	B43_NPHY_TXPCTL_STAT_EST_SHIFT 0

#define	B43_NPHY_TXPCTL_STAT_BIDX 0x7F00 /* Base index */

#define	B43_NPHY_TXPCTL_STAT_BIDX_SHIFT 8

#define	B43_NPHY_TXPCTL_STAT_ESTVALID 0x8000 /* Estimated power valid */

#define	B43_NPHY_SMALLSGS_LEN B43_PHY_N(0x1EF) /* Small sig gain settle length */

#define	B43_NPHY_PHYSTAT_GAIN0 B43_PHY_N(0x1F0) /* PHY stats gain info 0 */

#define	B43_NPHY_PHYSTAT_GAIN1 B43_PHY_N(0x1F1) /* PHY stats gain info 1 */

#define	B43_NPHY_PHYSTAT_FREQEST B43_PHY_N(0x1F2) /* PHY stats frequency estimate */

#define	B43_NPHY_PHYSTAT_ADVRET B43_PHY_N(0x1F3) /* PHY stats ADV retard */

#define	B43_NPHY_PHYLB_MODE B43_PHY_N(0x1F4) /* PHY loopback mode */

#define	B43_NPHY_TONE_MIDX20_1 B43_PHY_N(0x1F5) /* Tone map index 20/1 */

#define	B43_NPHY_TONE_MIDX20_2 B43_PHY_N(0x1F6) /* Tone map index 20/2 */

#define	B43_NPHY_TONE_MIDX20_3 B43_PHY_N(0x1F7) /* Tone map index 20/3 */

#define	B43_NPHY_TONE_MIDX40_1 B43_PHY_N(0x1F8) /* Tone map index 40/1 */

#define	B43_NPHY_TONE_MIDX40_2 B43_PHY_N(0x1F9) /* Tone map index 40/2 */

#define	B43_NPHY_TONE_MIDX40_3 B43_PHY_N(0x1FA) /* Tone map index 40/3 */

#define	B43_NPHY_TONE_MIDX40_4 B43_PHY_N(0x1FB) /* Tone map index 40/4 */

#define	B43_NPHY_PILTONE_MIDX1 B43_PHY_N(0x1FC) /* Pilot tone map index 1 */

#define	B43_NPHY_PILTONE_MIDX2 B43_PHY_N(0x1FD) /* Pilot tone map index 2 */

#define	B43_NPHY_PILTONE_MIDX3 B43_PHY_N(0x1FE) /* Pilot tone map index 3 */

#define	B43_NPHY_TXRIFS_FRDEL B43_PHY_N(0x1FF) /* TX RIFS frame delay */

#define	B43_NPHY_AFESEQ_RX2TX_PUD_40M B43_PHY_N(0x200) /* AFE seq rx2tx power up/down delay 40M */

#define	B43_NPHY_AFESEQ_TX2RX_PUD_40M B43_PHY_N(0x201) /* AFE seq tx2rx power up/down delay 40M */

#define	B43_NPHY_AFESEQ_RX2TX_PUD_20M B43_PHY_N(0x202) /* AFE seq rx2tx power up/down delay 20M */

#define	B43_NPHY_AFESEQ_TX2RX_PUD_20M B43_PHY_N(0x203) /* AFE seq tx2rx power up/down delay 20M */

#define	B43_NPHY_RX_SIGCTL B43_PHY_N(0x204) /* RX signal control */

#define	B43_NPHY_RXPIL_CYCNT0 B43_PHY_N(0x205) /* RX pilot cycle counter 0 */

#define	B43_NPHY_RXPIL_CYCNT1 B43_PHY_N(0x206) /* RX pilot cycle counter 1 */

#define	B43_NPHY_RXPIL_CYCNT2 B43_PHY_N(0x207) /* RX pilot cycle counter 2 */

#define	B43_NPHY_AFESEQ_RX2TX_PUD_10M B43_PHY_N(0x208) /* AFE seq rx2tx power up/down delay 10M */

#define	B43_NPHY_AFESEQ_TX2RX_PUD_10M B43_PHY_N(0x209) /* AFE seq tx2rx power up/down delay 10M */

#define	B43_NPHY_DSSSCCK_CRSEXTL B43_PHY_N(0x20A) /* DSSS/CCK CRS extension length */

#define	B43_NPHY_ML_LOGSS_RATSLOPE B43_PHY_N(0x20B) /* ML/logss ratio slope */

#define	B43_NPHY_RIFS_SRCTL B43_PHY_N(0x20C) /* RIFS search timeout length */

#define	B43_NPHY_TXREALFD B43_PHY_N(0x20D) /* TX real frame delay */

#define	B43_NPHY_HPANT_SWTHRES B43_PHY_N(0x20E) /* High power antenna switch threshold */

#define	B43_NPHY_EDCRS_ASSTHRES0 B43_PHY_N(0x210) /* ED CRS assert threshold 0 */

#define	B43_NPHY_EDCRS_ASSTHRES1 B43_PHY_N(0x211) /* ED CRS assert threshold 1 */

#define	B43_NPHY_EDCRS_DEASSTHRES0 B43_PHY_N(0x212) /* ED CRS deassert threshold 0 */

#define	B43_NPHY_EDCRS_DEASSTHRES1 B43_PHY_N(0x213) /* ED CRS deassert threshold 1 */

#define	B43_NPHY_STR_WTIME20U B43_PHY_N(0x214) /* STR wait time 20U */

#define	B43_NPHY_STR_WTIME20L B43_PHY_N(0x215) /* STR wait time 20L */

#define	B43_NPHY_TONE_MIDX657M B43_PHY_N(0x216) /* Tone map index 657M */

#define	B43_NPHY_HTSIGTONES B43_PHY_N(0x217) /* HT signal tones */

#define	B43_NPHY_RSSI1 B43_PHY_N(0x219) /* RSSI value 1 */

#define	B43_NPHY_RSSI2 B43_PHY_N(0x21A) /* RSSI value 2 */

#define	B43_NPHY_CHAN_ESTHANG B43_PHY_N(0x21D) /* Channel estimate hang */

#define	B43_NPHY_FINERX2_CGC B43_PHY_N(0x221) /* Fine RX 2 clock gate control */

#define	B43_NPHY_FINERX2_CGC_DECGC 0x0008 /* Decode gated clocks */

#define	B43_NPHY_TXPCTL_INIT B43_PHY_N(0x222) /* TX power control init */

#define	B43_NPHY_TXPCTL_INIT_PIDXI1 0x00FF /* Power index init 1 */

#define	B43_NPHY_TXPCTL_INIT_PIDXI1_SHIFT 0

#define	B43_NPHY_PAPD_EN0 B43_PHY_N(0x297) /* PAPD Enable0 TBD */

#define	B43_NPHY_EPS_TABLE_ADJ0 B43_PHY_N(0x298) /* EPS Table Adj0 TBD */

#define	B43_NPHY_PAPD_EN1 B43_PHY_N(0x29B) /* PAPD Enable1 TBD */

#define	B43_NPHY_EPS_TABLE_ADJ1 B43_PHY_N(0x29C) /* EPS Table Adj1 TBD */

#define	B43_PHY_B_BBCFG B43_PHY_N_BMODE(0x001) /* BB config */

#define	B43_PHY_B_TEST B43_PHY_N_BMODE(0x00A)

Enumerations
enum	b43_nphy_spur_avoid { B43_SPUR_AVOID_DISABLE, B43_SPUR_AVOID_AUTO, B43_SPUR_AVOID_FORCE }

Variables
struct b43_phy_operations	b43_phyops_n

Macro Definition Documentation

#define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */

Definition at line 16 of file phy_n.h.

#define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */

Definition at line 17 of file phy_n.h.

#define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */

Definition at line 18 of file phy_n.h.

#define B43_NPHY_A0RADAR_FIFOCTL B43_PHY_N(0x0EF) /* Antenna 0 radar FIFO control */

Definition at line 368 of file phy_n.h.

#define B43_NPHY_A0RADAR_FIFODAT B43_PHY_N(0x0F1) /* Antenna 0 radar FIFO data */

Definition at line 370 of file phy_n.h.

#define B43_NPHY_A1RADAR_FIFOCTL B43_PHY_N(0x0F0) /* Antenna 1 radar FIFO control */

Definition at line 369 of file phy_n.h.

#define B43_NPHY_A1RADAR_FIFODAT B43_PHY_N(0x0F2) /* Antenna 1 radar FIFO data */

Definition at line 371 of file phy_n.h.

#define B43_NPHY_AFECTL_C1 B43_PHY_N(0x0A6) /* AFE control core 1 */

Definition at line 279 of file phy_n.h.

#define B43_NPHY_AFECTL_C2 B43_PHY_N(0x0A7) /* AFE control core 2 */

Definition at line 280 of file phy_n.h.

#define B43_NPHY_AFECTL_C3 B43_PHY_N(0x0A8) /* AFE control core 3 */

Definition at line 281 of file phy_n.h.

#define B43_NPHY_AFECTL_C4 B43_PHY_N(0x0A9) /* AFE control core 4 */

Definition at line 282 of file phy_n.h.

#define B43_NPHY_AFECTL_DACGAIN1 B43_PHY_N(0x0AA) /* AFE control DAC gain 1 */

Definition at line 283 of file phy_n.h.

#define B43_NPHY_AFECTL_DACGAIN2 B43_PHY_N(0x0AB) /* AFE control DAC gain 2 */

Definition at line 284 of file phy_n.h.

#define B43_NPHY_AFECTL_DACGAIN3 B43_PHY_N(0x0AC) /* AFE control DAC gain 3 */

Definition at line 285 of file phy_n.h.

#define B43_NPHY_AFECTL_DACGAIN4 B43_PHY_N(0x0AD) /* AFE control DAC gain 4 */

Definition at line 286 of file phy_n.h.

#define B43_NPHY_AFECTL_OVER B43_PHY_N(0x0A5) /* AFE control override */

Definition at line 278 of file phy_n.h.

#define B43_NPHY_AFECTL_OVER1 B43_PHY_N(0x08F) /* AFE control override 1 */

Definition at line 234 of file phy_n.h.

#define B43_NPHY_AFESEQ_RX2TX_PUD B43_PHY_N(0x0D7) /* AFE seq RX2TX power up/down delay */

Definition at line 339 of file phy_n.h.

#define B43_NPHY_AFESEQ_RX2TX_PUD_10M B43_PHY_N(0x208) /* AFE seq rx2tx power up/down delay 10M */

Definition at line 686 of file phy_n.h.

#define B43_NPHY_AFESEQ_RX2TX_PUD_20M B43_PHY_N(0x202) /* AFE seq rx2tx power up/down delay 20M */

Definition at line 680 of file phy_n.h.

#define B43_NPHY_AFESEQ_RX2TX_PUD_40M B43_PHY_N(0x200) /* AFE seq rx2tx power up/down delay 40M */

Definition at line 678 of file phy_n.h.

#define B43_NPHY_AFESEQ_TX2RX_PUD B43_PHY_N(0x0D8) /* AFE seq TX2RX power up/down delay */

Definition at line 340 of file phy_n.h.

#define B43_NPHY_AFESEQ_TX2RX_PUD_10M B43_PHY_N(0x209) /* AFE seq tx2rx power up/down delay 10M */

Definition at line 687 of file phy_n.h.

#define B43_NPHY_AFESEQ_TX2RX_PUD_20M B43_PHY_N(0x203) /* AFE seq tx2rx power up/down delay 20M */

Definition at line 681 of file phy_n.h.

#define B43_NPHY_AFESEQ_TX2RX_PUD_40M B43_PHY_N(0x201) /* AFE seq tx2rx power up/down delay 40M */

Definition at line 679 of file phy_n.h.

#define B43_NPHY_BANDCTL B43_PHY_N(0x009) /* Band control */

Definition at line 14 of file phy_n.h.

#define B43_NPHY_BANDCTL_5GHZ 0x0001 /* Use the 5GHz band */

Definition at line 15 of file phy_n.h.

#define B43_NPHY_BBCFG B43_PHY_N(0x001) /* BB config */

Definition at line 9 of file phy_n.h.

#define B43_NPHY_BBCFG_RSTCCA 0x4000 /* Reset CCA */

Definition at line 10 of file phy_n.h.

#define B43_NPHY_BBCFG_RSTRX 0x8000 /* Reset RX */

Definition at line 11 of file phy_n.h.

#define B43_NPHY_BIST_STAT0 B43_PHY_N(0x00E) /* Built-in self test status 0 */

Definition at line 19 of file phy_n.h.

#define B43_NPHY_BIST_STAT1 B43_PHY_N(0x00F) /* Built-in self test status 1 */

Definition at line 20 of file phy_n.h.

#define B43_NPHY_BIST_STAT2 B43_PHY_N(0x0EA) /* BIST status 2 */

Definition at line 361 of file phy_n.h.

#define B43_NPHY_BIST_STAT3 B43_PHY_N(0x0EB) /* BIST status 3 */

Definition at line 362 of file phy_n.h.

#define B43_NPHY_BIST_STAT4 B43_PHY_N(0x156) /* BIST status 4 */

Definition at line 486 of file phy_n.h.

#define B43_NPHY_BPHY_CTL1 B43_PHY_N(0x0BE) /* B PHY control 1 */

Definition at line 308 of file phy_n.h.

#define B43_NPHY_BPHY_CTL2 B43_PHY_N(0x0BF) /* B PHY control 2 */

Definition at line 309 of file phy_n.h.

#define B43_NPHY_BPHY_CTL2_LUT 0x001F /* LUT index */

Definition at line 310 of file phy_n.h.

#define B43_NPHY_BPHY_CTL2_LUT_SHIFT 0

Definition at line 311 of file phy_n.h.

#define B43_NPHY_BPHY_CTL2_MACDEL 0x7FE0 /* MAC delay */

Definition at line 312 of file phy_n.h.

#define B43_NPHY_BPHY_CTL2_MACDEL_SHIFT 5

Definition at line 313 of file phy_n.h.

#define B43_NPHY_BPHY_CTL3 B43_PHY_N(0x0DC) /* B PHY control 3 */

Definition at line 344 of file phy_n.h.

#define B43_NPHY_BPHY_CTL3_FSC 0xFF00 /* Frame start count value */

Definition at line 347 of file phy_n.h.

#define B43_NPHY_BPHY_CTL3_FSC_SHIFT 8

Definition at line 348 of file phy_n.h.

#define B43_NPHY_BPHY_CTL3_SCALE 0x00FF /* Scale */

Definition at line 345 of file phy_n.h.

#define B43_NPHY_BPHY_CTL3_SCALE_SHIFT 0

Definition at line 346 of file phy_n.h.

#define B43_NPHY_BPHY_CTL4 B43_PHY_N(0x0DD) /* B PHY control 4 */

Definition at line 349 of file phy_n.h.

#define B43_NPHY_BPHY_CTL5 B43_PHY_N(0x111) /* B PHY control 5 */

Definition at line 401 of file phy_n.h.

#define B43_NPHY_BW1A B43_PHY_N(0x1CE) /* BW 1A */

Definition at line 596 of file phy_n.h.

#define B43_NPHY_BW2 B43_PHY_N(0x1CF) /* BW 2 */

Definition at line 597 of file phy_n.h.

#define B43_NPHY_BW3 B43_PHY_N(0x1D0) /* BW 3 */

Definition at line 598 of file phy_n.h.

#define B43_NPHY_BW4 B43_PHY_N(0x1D1) /* BW 4 */

Definition at line 599 of file phy_n.h.

#define B43_NPHY_BW5 B43_PHY_N(0x1D2) /* BW 5 */

Definition at line 600 of file phy_n.h.

#define B43_NPHY_BW6 B43_PHY_N(0x1D3) /* BW 6 */

Definition at line 601 of file phy_n.h.

#define B43_NPHY_C1_ADCCLIP B43_PHY_N(0x16A) /* Core 1 ADC clip */

Definition at line 505 of file phy_n.h.

#define B43_NPHY_C1_BCLIPBKOFF B43_PHY_N(0x01A) /* Core 1 barely clip backoff */

Definition at line 24 of file phy_n.h.

#define B43_NPHY_C1_BPHY_RXIQCA0 B43_PHY_N(0x15B) /* Core 1 B PHY RX I/Q comp A0 */

Definition at line 491 of file phy_n.h.

#define B43_NPHY_C1_BPHY_RXIQCB0 B43_PHY_N(0x15C) /* Core 1 B PHY RX I/Q comp B0 */

Definition at line 492 of file phy_n.h.

#define B43_NPHY_C1_CCK_BCLIPBKOFF B43_PHY_N(0x01B) /* Core 1 CCK barely clip backoff */

Definition at line 25 of file phy_n.h.

#define B43_NPHY_C1_CCK_CGAINI B43_PHY_N(0x01D) /* Core 1 CCK compute gain info */

Definition at line 34 of file phy_n.h.

#define B43_NPHY_C1_CCK_CGAINI_CLIPGBKOFF 0x01E0 /* CCK barely clip gain backoff */

Definition at line 36 of file phy_n.h.

#define B43_NPHY_C1_CCK_CGAINI_GAINBKOFF 0x001F /* Gain backoff */

Definition at line 35 of file phy_n.h.

#define B43_NPHY_C1_CCK_DESPWR B43_PHY_N(0x019) /* Core 1 CCK desired power */

Definition at line 23 of file phy_n.h.

#define B43_NPHY_C1_CCK_MAXGAIN 0xFF00 /* Maximum gain */

Definition at line 45 of file phy_n.h.

#define B43_NPHY_C1_CCK_MAXGAIN_SHIFT 8

Definition at line 46 of file phy_n.h.

#define B43_NPHY_C1_CCK_MINGAIN 0x00FF /* Minimum gain */

Definition at line 43 of file phy_n.h.

#define B43_NPHY_C1_CCK_MINGAIN_SHIFT 0

Definition at line 44 of file phy_n.h.

#define B43_NPHY_C1_CCK_MINMAX_GAIN B43_PHY_N(0x01F) /* Core 1 CCK min/max gain */

Definition at line 42 of file phy_n.h.

#define B43_NPHY_C1_CGAINI B43_PHY_N(0x01C) /* Core 1 compute gain info */

Definition at line 26 of file phy_n.h.

#define B43_NPHY_C1_CGAINI_CL2DETECT 0x2000 /* Clip 2 detect mask */

Definition at line 33 of file phy_n.h.

#define B43_NPHY_C1_CGAINI_CLIPGBKOFF 0x03E0 /* Clip gain backoff */

Definition at line 29 of file phy_n.h.

#define B43_NPHY_C1_CGAINI_CLIPGBKOFF_SHIFT 5

Definition at line 30 of file phy_n.h.

#define B43_NPHY_C1_CGAINI_GAINBKOFF 0x001F /* Gain backoff */

Definition at line 27 of file phy_n.h.

#define B43_NPHY_C1_CGAINI_GAINBKOFF_SHIFT 0

Definition at line 28 of file phy_n.h.

#define B43_NPHY_C1_CGAINI_GAINSTEP 0x1C00 /* Gain step */

Definition at line 31 of file phy_n.h.

#define B43_NPHY_C1_CGAINI_GAINSTEP_SHIFT 10

Definition at line 32 of file phy_n.h.

#define B43_NPHY_C1_CLIP1_HIGAIN B43_PHY_N(0x021) /* Core 1 clip1 high gain code */

Definition at line 57 of file phy_n.h.

#define B43_NPHY_C1_CLIP1_LOGAIN B43_PHY_N(0x023) /* Core 1 clip1 low gain code */

Definition at line 59 of file phy_n.h.

#define B43_NPHY_C1_CLIP1_MEDGAIN B43_PHY_N(0x022) /* Core 1 clip1 medium gain code */

Definition at line 58 of file phy_n.h.

#define B43_NPHY_C1_CLIP1THRES B43_PHY_N(0x02C) /* Core 1 clip1 threshold */

Definition at line 72 of file phy_n.h.

#define B43_NPHY_C1_CLIP2_GAIN B43_PHY_N(0x024) /* Core 1 clip2 gain code */

Definition at line 60 of file phy_n.h.

#define B43_NPHY_C1_CLIP2THRES B43_PHY_N(0x02D) /* Core 1 clip2 threshold */

Definition at line 73 of file phy_n.h.

#define B43_NPHY_C1_CLIPWBTHRES B43_PHY_N(0x027) /* Core 1 clip wideband threshold */

Definition at line 63 of file phy_n.h.

#define B43_NPHY_C1_CLIPWBTHRES_CLIP1 0x0FC0 /* Clip 1 */

Definition at line 66 of file phy_n.h.

#define B43_NPHY_C1_CLIPWBTHRES_CLIP1_SHIFT 6

Definition at line 67 of file phy_n.h.

#define B43_NPHY_C1_CLIPWBTHRES_CLIP2 0x003F /* Clip 2 */

Definition at line 64 of file phy_n.h.

#define B43_NPHY_C1_CLIPWBTHRES_CLIP2_SHIFT 0

Definition at line 65 of file phy_n.h.

#define B43_NPHY_C1_DESPWR B43_PHY_N(0x018) /* Core 1 desired power */

Definition at line 22 of file phy_n.h.

#define B43_NPHY_C1_EDTHRES B43_PHY_N(0x029) /* Core 1 ED threshold */

Definition at line 69 of file phy_n.h.

#define B43_NPHY_C1_FILTERGAIN B43_PHY_N(0x025) /* Core 1 filter gain */

Definition at line 61 of file phy_n.h.

#define B43_NPHY_C1_INITGAIN B43_PHY_N(0x020) /* Core 1 initial gain code */

Definition at line 47 of file phy_n.h.

#define B43_NPHY_C1_INITGAIN_EXTLNA 0x0001 /* External LNA index */

Definition at line 48 of file phy_n.h.

#define B43_NPHY_C1_INITGAIN_HPVGA1 0x0078 /* HPVGA1 index */

Definition at line 51 of file phy_n.h.

#define B43_NPHY_C1_INITGAIN_HPVGA1_SHIFT 3

Definition at line 52 of file phy_n.h.

#define B43_NPHY_C1_INITGAIN_HPVGA2 0x0F80 /* HPVGA2 index */

Definition at line 53 of file phy_n.h.

#define B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT 7

Definition at line 54 of file phy_n.h.

#define B43_NPHY_C1_INITGAIN_LNA 0x0006 /* LNA index */

Definition at line 49 of file phy_n.h.

#define B43_NPHY_C1_INITGAIN_LNAIDX_SHIFT 1

Definition at line 50 of file phy_n.h.

#define B43_NPHY_C1_INITGAIN_TRRX 0x1000 /* TR RX index */

Definition at line 55 of file phy_n.h.

#define B43_NPHY_C1_INITGAIN_TRTX 0x2000 /* TR TX index */

Definition at line 56 of file phy_n.h.

#define B43_NPHY_C1_LPF_QHPF_BW B43_PHY_N(0x026) /* Core 1 LPF Q HP F bandwidth */

Definition at line 62 of file phy_n.h.

#define B43_NPHY_C1_MAXGAIN 0xFF00 /* Maximum gain */

Definition at line 40 of file phy_n.h.

#define B43_NPHY_C1_MAXGAIN_SHIFT 8

Definition at line 41 of file phy_n.h.

#define B43_NPHY_C1_MINGAIN 0x00FF /* Minimum gain */

Definition at line 38 of file phy_n.h.

#define B43_NPHY_C1_MINGAIN_SHIFT 0

Definition at line 39 of file phy_n.h.

#define B43_NPHY_C1_MINMAX_GAIN B43_PHY_N(0x01E) /* Core 1 min/max gain */

Definition at line 37 of file phy_n.h.

#define B43_NPHY_C1_NBCLIPTHRES B43_PHY_N(0x02B) /* Core 1 NB clip threshold */

Definition at line 71 of file phy_n.h.

#define B43_NPHY_C1_RXIQ_COMPA0 B43_PHY_N(0x09A) /* Core 1 RX I/Q comp A0 */

Definition at line 251 of file phy_n.h.

#define B43_NPHY_C1_RXIQ_COMPB0 B43_PHY_N(0x09B) /* Core 1 RX I/Q comp B0 */

Definition at line 252 of file phy_n.h.

#define B43_NPHY_C1_SMSIGTHRES B43_PHY_N(0x02A) /* Core 1 small sig threshold */

Definition at line 70 of file phy_n.h.

#define B43_NPHY_C1_TXBBMULT B43_PHY_N(0x0DE) /* Core 1 TX BB multiplier */

Definition at line 350 of file phy_n.h.

#define B43_NPHY_C1_TXCTL B43_PHY_N(0x08B) /* Core 1 TX control */

Definition at line 232 of file phy_n.h.

#define B43_NPHY_C1_TXIQ_COMP_OFF B43_PHY_N(0x087) /* Core 1 TX I/Q comp offset */

Definition at line 230 of file phy_n.h.

#define B43_NPHY_C1_TXPCTL_STAT B43_PHY_N(0x1ED) /* Core 1 TX power control status */

Definition at line 654 of file phy_n.h.

#define B43_NPHY_C1_W1THRES B43_PHY_N(0x028) /* Core 1 W1 threshold */

Definition at line 68 of file phy_n.h.

#define B43_NPHY_C2_ADCCLIP B43_PHY_N(0x16B) /* Core 2 ADC clip */

Definition at line 506 of file phy_n.h.

#define B43_NPHY_C2_BCLIPBKOFF B43_PHY_N(0x030) /* Core 2 barely clip backoff */

Definition at line 77 of file phy_n.h.

#define B43_NPHY_C2_BPHY_RXIQCA1 B43_PHY_N(0x15D) /* Core 2 B PHY RX I/Q comp A1 */

Definition at line 493 of file phy_n.h.

#define B43_NPHY_C2_BPHY_RXIQCB1 B43_PHY_N(0x15E) /* Core 2 B PHY RX I/Q comp B1 */

Definition at line 494 of file phy_n.h.

#define B43_NPHY_C2_CCK_BCLIPBKOFF B43_PHY_N(0x031) /* Core 2 CCK barely clip backoff */

Definition at line 78 of file phy_n.h.

#define B43_NPHY_C2_CCK_CGAINI B43_PHY_N(0x033) /* Core 2 CCK compute gain info */

Definition at line 87 of file phy_n.h.

#define B43_NPHY_C2_CCK_CGAINI_CLIPGBKOFF 0x01E0 /* CCK barely clip gain backoff */

Definition at line 89 of file phy_n.h.

#define B43_NPHY_C2_CCK_CGAINI_GAINBKOFF 0x001F /* Gain backoff */

Definition at line 88 of file phy_n.h.

#define B43_NPHY_C2_CCK_DESPWR B43_PHY_N(0x02F) /* Core 2 CCK desired power */

Definition at line 76 of file phy_n.h.

#define B43_NPHY_C2_CCK_MAXGAIN 0xFF00 /* Maximum gain */

Definition at line 98 of file phy_n.h.

#define B43_NPHY_C2_CCK_MAXGAIN_SHIFT 8

Definition at line 99 of file phy_n.h.

#define B43_NPHY_C2_CCK_MINGAIN 0x00FF /* Minimum gain */

Definition at line 96 of file phy_n.h.

#define B43_NPHY_C2_CCK_MINGAIN_SHIFT 0

Definition at line 97 of file phy_n.h.

#define B43_NPHY_C2_CCK_MINMAX_GAIN B43_PHY_N(0x035) /* Core 2 CCK min/max gain */

Definition at line 95 of file phy_n.h.

#define B43_NPHY_C2_CGAINI B43_PHY_N(0x032) /* Core 2 compute gain info */

Definition at line 79 of file phy_n.h.

#define B43_NPHY_C2_CGAINI_CL2DETECT 0x2000 /* Clip 2 detect mask */

Definition at line 86 of file phy_n.h.

#define B43_NPHY_C2_CGAINI_CLIPGBKOFF 0x03E0 /* Clip gain backoff */

Definition at line 82 of file phy_n.h.

#define B43_NPHY_C2_CGAINI_CLIPGBKOFF_SHIFT 5

Definition at line 83 of file phy_n.h.

#define B43_NPHY_C2_CGAINI_GAINBKOFF 0x001F /* Gain backoff */

Definition at line 80 of file phy_n.h.

#define B43_NPHY_C2_CGAINI_GAINBKOFF_SHIFT 0

Definition at line 81 of file phy_n.h.

#define B43_NPHY_C2_CGAINI_GAINSTEP 0x1C00 /* Gain step */

Definition at line 84 of file phy_n.h.

#define B43_NPHY_C2_CGAINI_GAINSTEP_SHIFT 10

Definition at line 85 of file phy_n.h.

#define B43_NPHY_C2_CLIP1_HIGAIN B43_PHY_N(0x037) /* Core 2 clip1 high gain code */

Definition at line 110 of file phy_n.h.

#define B43_NPHY_C2_CLIP1_LOGAIN B43_PHY_N(0x039) /* Core 2 clip1 low gain code */

Definition at line 112 of file phy_n.h.

#define B43_NPHY_C2_CLIP1_MEDGAIN B43_PHY_N(0x038) /* Core 2 clip1 medium gain code */

Definition at line 111 of file phy_n.h.

#define B43_NPHY_C2_CLIP1THRES B43_PHY_N(0x042) /* Core 2 clip1 threshold */

Definition at line 125 of file phy_n.h.

#define B43_NPHY_C2_CLIP2_GAIN B43_PHY_N(0x03A) /* Core 2 clip2 gain code */

Definition at line 113 of file phy_n.h.

#define B43_NPHY_C2_CLIP2THRES B43_PHY_N(0x043) /* Core 2 clip2 threshold */

Definition at line 126 of file phy_n.h.

#define B43_NPHY_C2_CLIPWBTHRES B43_PHY_N(0x03D) /* Core 2 clip wideband threshold */

Definition at line 116 of file phy_n.h.

#define B43_NPHY_C2_CLIPWBTHRES_CLIP1 0x0FC0 /* Clip 1 */

Definition at line 119 of file phy_n.h.

#define B43_NPHY_C2_CLIPWBTHRES_CLIP1_SHIFT 6

Definition at line 120 of file phy_n.h.

#define B43_NPHY_C2_CLIPWBTHRES_CLIP2 0x003F /* Clip 2 */

Definition at line 117 of file phy_n.h.

#define B43_NPHY_C2_CLIPWBTHRES_CLIP2_SHIFT 0

Definition at line 118 of file phy_n.h.

#define B43_NPHY_C2_DESPWR B43_PHY_N(0x02E) /* Core 2 desired power */

Definition at line 75 of file phy_n.h.

#define B43_NPHY_C2_EDTHRES B43_PHY_N(0x03F) /* Core 2 ED threshold */

Definition at line 122 of file phy_n.h.

#define B43_NPHY_C2_FILTERGAIN B43_PHY_N(0x03B) /* Core 2 filter gain */

Definition at line 114 of file phy_n.h.

#define B43_NPHY_C2_INITGAIN B43_PHY_N(0x036) /* Core 2 initial gain code */

Definition at line 100 of file phy_n.h.

#define B43_NPHY_C2_INITGAIN_EXTLNA 0x0001 /* External LNA index */

Definition at line 101 of file phy_n.h.

#define B43_NPHY_C2_INITGAIN_HPVGA1 0x0078 /* HPVGA1 index */

Definition at line 104 of file phy_n.h.

#define B43_NPHY_C2_INITGAIN_HPVGA1_SHIFT 3

Definition at line 105 of file phy_n.h.

#define B43_NPHY_C2_INITGAIN_HPVGA2 0x0F80 /* HPVGA2 index */

Definition at line 106 of file phy_n.h.

#define B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT 7

Definition at line 107 of file phy_n.h.

#define B43_NPHY_C2_INITGAIN_LNA 0x0006 /* LNA index */

Definition at line 102 of file phy_n.h.

#define B43_NPHY_C2_INITGAIN_LNAIDX_SHIFT 1

Definition at line 103 of file phy_n.h.

#define B43_NPHY_C2_INITGAIN_TRRX 0x1000 /* TR RX index */

Definition at line 108 of file phy_n.h.

#define B43_NPHY_C2_INITGAIN_TRTX 0x2000 /* TR TX index */

Definition at line 109 of file phy_n.h.

#define B43_NPHY_C2_LPF_QHPF_BW B43_PHY_N(0x03C) /* Core 2 LPF Q HP F bandwidth */

Definition at line 115 of file phy_n.h.

#define B43_NPHY_C2_MAXGAIN 0xFF00 /* Maximum gain */

Definition at line 93 of file phy_n.h.

#define B43_NPHY_C2_MAXGAIN_SHIFT 8

Definition at line 94 of file phy_n.h.

#define B43_NPHY_C2_MINGAIN 0x00FF /* Minimum gain */

Definition at line 91 of file phy_n.h.

#define B43_NPHY_C2_MINGAIN_SHIFT 0

Definition at line 92 of file phy_n.h.

#define B43_NPHY_C2_MINMAX_GAIN B43_PHY_N(0x034) /* Core 2 min/max gain */

Definition at line 90 of file phy_n.h.

#define B43_NPHY_C2_NBCLIPTHRES B43_PHY_N(0x041) /* Core 2 NB clip threshold */

Definition at line 124 of file phy_n.h.

#define B43_NPHY_C2_RXIQ_COMPA1 B43_PHY_N(0x09C) /* Core 2 RX I/Q comp A1 */

Definition at line 253 of file phy_n.h.

#define B43_NPHY_C2_RXIQ_COMPB1 B43_PHY_N(0x09D) /* Core 2 RX I/Q comp B1 */

Definition at line 254 of file phy_n.h.

#define B43_NPHY_C2_SMSIGTHRES B43_PHY_N(0x040) /* Core 2 small sig threshold */

Definition at line 123 of file phy_n.h.

#define B43_NPHY_C2_TXBBMULT B43_PHY_N(0x0DF) /* Core 2 TX BB multiplier */

Definition at line 351 of file phy_n.h.

#define B43_NPHY_C2_TXCTL B43_PHY_N(0x08C) /* Core 2 TX control */

Definition at line 233 of file phy_n.h.

#define B43_NPHY_C2_TXIQ_COMP_OFF B43_PHY_N(0x088) /* Core 2 TX I/Q comp offset */

Definition at line 231 of file phy_n.h.

#define B43_NPHY_C2_TXPCTL_STAT B43_PHY_N(0x1EE) /* Core 2 TX power control status */

Definition at line 655 of file phy_n.h.

#define B43_NPHY_C2_W1THRES B43_PHY_N(0x03E) /* Core 2 W1 threshold */

Definition at line 121 of file phy_n.h.

#define B43_NPHY_CARRSRC_TLEN B43_PHY_N(0x068) /* Carrier search timeout length */

Definition at line 161 of file phy_n.h.

#define B43_NPHY_CCK_SHIFTB_REF B43_PHY_N(0x150) /* CCK shiftbits reference var */

Definition at line 478 of file phy_n.h.

#define B43_NPHY_CHAN_ESTHANG B43_PHY_N(0x21D) /* Channel estimate hang */

Definition at line 703 of file phy_n.h.

#define B43_NPHY_CHANEST_CDDSH B43_PHY_N(0x17A) /* Channel estimate CDD shift */

Definition at line 518 of file phy_n.h.

#define B43_NPHY_CHANNEL B43_PHY_N(0x005) /* Channel */

Definition at line 12 of file phy_n.h.

#define B43_NPHY_CLASSCTL B43_PHY_N(0x0B0) /* Classifier control */

Definition at line 289 of file phy_n.h.

#define B43_NPHY_CLASSCTL_CCKEN 0x0001 /* CCK enable */

Definition at line 290 of file phy_n.h.

#define B43_NPHY_CLASSCTL_OFDMEN 0x0002 /* OFDM enable */

Definition at line 291 of file phy_n.h.

#define B43_NPHY_CLASSCTL_WAITEDEN 0x0004 /* Waited enable */

Definition at line 292 of file phy_n.h.

#define B43_NPHY_CLIP1_NBDWELL_LEN B43_PHY_N(0x06B) /* Clip1 NB dwell length */

Definition at line 164 of file phy_n.h.

#define B43_NPHY_CLIP1CARR_DLEN B43_PHY_N(0x062) /* Clip1 carrier detection length */

Definition at line 155 of file phy_n.h.

#define B43_NPHY_CLIP1GAIN_SLEN B43_PHY_N(0x065) /* Clip1 gain settle length */

Definition at line 158 of file phy_n.h.

#define B43_NPHY_CLIP2_NBDWELL_LEN B43_PHY_N(0x06C) /* Clip2 NB dwell length */

Definition at line 165 of file phy_n.h.

#define B43_NPHY_CLIP2CARR_DLEN B43_PHY_N(0x063) /* Clip2 carrier detection length */

Definition at line 156 of file phy_n.h.

#define B43_NPHY_CLIP2GAIN_SLEN B43_PHY_N(0x066) /* Clip2 gain settle length */

Definition at line 159 of file phy_n.h.

#define B43_NPHY_COALEN0 B43_PHY_N(0x1D4) /* Coarse length 0 */

Definition at line 602 of file phy_n.h.

#define B43_NPHY_COALEN1 B43_PHY_N(0x1D5) /* Coarse length 1 */

Definition at line 603 of file phy_n.h.

#define B43_NPHY_CRCPOLY B43_PHY_N(0x109) /* CRC polynomial */

Definition at line 394 of file phy_n.h.

#define B43_NPHY_CRCPOLY_ORDER B43_PHY_N(0x10C) /* CRC polynomial order */

Definition at line 397 of file phy_n.h.

#define B43_NPHY_CRS_CHECK B43_PHY_N(0x1CB) /* CRS check */

Definition at line 593 of file phy_n.h.

#define B43_NPHY_CRS_THRES1 B43_PHY_N(0x044) /* CRS threshold 1 */

Definition at line 128 of file phy_n.h.

#define B43_NPHY_CRS_THRES2 B43_PHY_N(0x045) /* CRS threshold 2 */

Definition at line 129 of file phy_n.h.

#define B43_NPHY_CRS_THRES3 B43_PHY_N(0x046) /* CRS threshold 3 */

Definition at line 130 of file phy_n.h.

#define B43_NPHY_CRSCHECK1 B43_PHY_N(0x1E2) /* CRS check 1 */

Definition at line 616 of file phy_n.h.

#define B43_NPHY_CRSCHECK2 B43_PHY_N(0x1E3) /* CRS check 2 */

Definition at line 617 of file phy_n.h.

#define B43_NPHY_CRSCHECK3 B43_PHY_N(0x1E4) /* CRS check 3 */

Definition at line 618 of file phy_n.h.

#define B43_NPHY_CRSCTL B43_PHY_N(0x047) /* CRS control */

Definition at line 131 of file phy_n.h.

#define B43_NPHY_CRSCTL_L B43_PHY_N(0x1DD) /* CRS control L */

Definition at line 611 of file phy_n.h.

#define B43_NPHY_CRSCTL_U B43_PHY_N(0x1D9) /* CRS control U */

Definition at line 607 of file phy_n.h.

#define B43_NPHY_CRSIT_COCNT_HI B43_PHY_N(0x125) /* CRS idle time CRS-on count (high) */

Definition at line 429 of file phy_n.h.

#define B43_NPHY_CRSIT_COCNT_LO B43_PHY_N(0x124) /* CRS idle time CRS-on count (low) */

Definition at line 428 of file phy_n.h.

#define B43_NPHY_CRSIT_MTCNT_HI B43_PHY_N(0x127) /* CRS idle time measure time count (high) */

Definition at line 431 of file phy_n.h.

#define B43_NPHY_CRSIT_MTCNT_LO B43_PHY_N(0x126) /* CRS idle time measure time count (low) */

Definition at line 430 of file phy_n.h.

#define B43_NPHY_CRSTHRES_1L B43_PHY_N(0x1DA) /* CRS threshold 1 L */

Definition at line 608 of file phy_n.h.

#define B43_NPHY_CRSTHRES_1U B43_PHY_N(0x1D6) /* CRS threshold 1 U */

Definition at line 604 of file phy_n.h.

#define B43_NPHY_CRSTHRES_2L B43_PHY_N(0x1DB) /* CRS threshold 2 L */

Definition at line 609 of file phy_n.h.

#define B43_NPHY_CRSTHRES_2U B43_PHY_N(0x1D7) /* CRS threshold 2 U */

Definition at line 605 of file phy_n.h.

#define B43_NPHY_CRSTHRES_3L B43_PHY_N(0x1DC) /* CRS threshold 3 L */

Definition at line 610 of file phy_n.h.

#define B43_NPHY_CRSTHRES_3U B43_PHY_N(0x1D8) /* CRS threshold 3 U */

Definition at line 606 of file phy_n.h.

#define B43_NPHY_CSEN_20IN40_DLEN B43_PHY_N(0x0F7) /* Carrier sense 20 in 40 dwell length */

Definition at line 376 of file phy_n.h.

#define B43_NPHY_DCFADDR B43_PHY_N(0x048) /* DC filter address */

Definition at line 132 of file phy_n.h.

#define B43_NPHY_DSSSCCK_CRSEXTL B43_PHY_N(0x20A) /* DSSS/CCK CRS extension length */

Definition at line 688 of file phy_n.h.

#define B43_NPHY_DSSSCCK_GAINSL B43_PHY_N(0x1C8) /* DSSS/CCK gain settle length */

Definition at line 590 of file phy_n.h.

#define B43_NPHY_DUP40_BL B43_PHY_N(0x181) /* Dup40 format BL address */

Definition at line 525 of file phy_n.h.

#define B43_NPHY_DUP40_GFBL B43_PHY_N(0x180) /* Dup40 GF format BL address */

Definition at line 524 of file phy_n.h.

#define B43_NPHY_DUP40_TGNSYNC_CYCD B43_PHY_N(0x17F) /* Dup40 TGNsync cycle data */

Definition at line 523 of file phy_n.h.

#define B43_NPHY_DUPSCALE B43_PHY_N(0x1CD) /* Dup scale */

Definition at line 595 of file phy_n.h.

#define B43_NPHY_EDCRS_ASSTHRES0 B43_PHY_N(0x210) /* ED CRS assert threshold 0 */

Definition at line 693 of file phy_n.h.

#define B43_NPHY_EDCRS_ASSTHRES1 B43_PHY_N(0x211) /* ED CRS assert threshold 1 */

Definition at line 694 of file phy_n.h.

#define B43_NPHY_EDCRS_DEASSTHRES0 B43_PHY_N(0x212) /* ED CRS deassert threshold 0 */

Definition at line 695 of file phy_n.h.

#define B43_NPHY_EDCRS_DEASSTHRES1 B43_PHY_N(0x213) /* ED CRS deassert threshold 1 */

Definition at line 696 of file phy_n.h.

#define B43_NPHY_EDROP_CSENSE_EXTLEN B43_PHY_N(0x071) /* Energy drop carrier sense extension length */

Definition at line 170 of file phy_n.h.

#define B43_NPHY_ENDROP_TLEN B43_PHY_N(0x06A) /* Energy drop timeout length */

Definition at line 163 of file phy_n.h.

#define B43_NPHY_EPS_TABLE_ADJ0 B43_PHY_N(0x298) /* EPS Table Adj0 TBD */

Definition at line 710 of file phy_n.h.

#define B43_NPHY_EPS_TABLE_ADJ1 B43_PHY_N(0x29C) /* EPS Table Adj1 TBD */

Definition at line 712 of file phy_n.h.

#define B43_NPHY_ESTPWR1 B43_PHY_N(0x118) /* Estimated power 1 */

Definition at line 409 of file phy_n.h.

#define B43_NPHY_ESTPWR2 B43_PHY_N(0x119) /* Estimated power 2 */

Definition at line 410 of file phy_n.h.

#define B43_NPHY_ESTPWR_PWR 0x00FF /* Estimated power */

Definition at line 411 of file phy_n.h.

#define B43_NPHY_ESTPWR_PWR_SHIFT 0

Definition at line 412 of file phy_n.h.

#define B43_NPHY_ESTPWR_VALID 0x0100 /* Estimated power valid */

Definition at line 413 of file phy_n.h.

#define B43_NPHY_FINERX2_CGC B43_PHY_N(0x221) /* Fine RX 2 clock gate control */

Definition at line 704 of file phy_n.h.

#define B43_NPHY_FINERX2_CGC_DECGC 0x0008 /* Decode gated clocks */

Definition at line 705 of file phy_n.h.

#define B43_NPHY_FMDEM_CFG B43_PHY_N(0x144) /* FM demodulation config */

Definition at line 467 of file phy_n.h.

#define B43_NPHY_FREQGAIN0 B43_PHY_N(0x160) /* Frequency gain 0 */

Definition at line 495 of file phy_n.h.

#define B43_NPHY_FREQGAIN1 B43_PHY_N(0x161) /* Frequency gain 1 */

Definition at line 496 of file phy_n.h.

#define B43_NPHY_FREQGAIN2 B43_PHY_N(0x162) /* Frequency gain 2 */

Definition at line 497 of file phy_n.h.

#define B43_NPHY_FREQGAIN3 B43_PHY_N(0x163) /* Frequency gain 3 */

Definition at line 498 of file phy_n.h.

#define B43_NPHY_FREQGAIN4 B43_PHY_N(0x164) /* Frequency gain 4 */

Definition at line 499 of file phy_n.h.

#define B43_NPHY_FREQGAIN5 B43_PHY_N(0x165) /* Frequency gain 5 */

Definition at line 500 of file phy_n.h.

#define B43_NPHY_FREQGAIN6 B43_PHY_N(0x166) /* Frequency gain 6 */

Definition at line 501 of file phy_n.h.

#define B43_NPHY_FREQGAIN7 B43_PHY_N(0x167) /* Frequency gain 7 */

Definition at line 502 of file phy_n.h.

#define B43_NPHY_FREQGAIN_BYPASS B43_PHY_N(0x168) /* Frequency gain bypass */

Definition at line 503 of file phy_n.h.

#define B43_NPHY_GPIO_CLKCTL B43_PHY_N(0x0CB) /* GPIO clock control */

Definition at line 327 of file phy_n.h.

#define B43_NPHY_GPIO_HIOEN B43_PHY_N(0x0C9) /* GPIO high out enable */

Definition at line 325 of file phy_n.h.

#define B43_NPHY_GPIO_HIOUT B43_PHY_N(0x1CA) /* GPIO high out */

Definition at line 592 of file phy_n.h.

#define B43_NPHY_GPIO_LOOEN B43_PHY_N(0x0C8) /* GPIO low out enable */

Definition at line 324 of file phy_n.h.

#define B43_NPHY_GPIO_LOOUT B43_PHY_N(0x1C9) /* GPIO low out */

Definition at line 591 of file phy_n.h.

#define B43_NPHY_GPIO_SEL B43_PHY_N(0x0CA) /* GPIO select */

Definition at line 326 of file phy_n.h.

#define B43_NPHY_HPANT_SWTHRES B43_PHY_N(0x20E) /* High power antenna switch threshold */

Definition at line 692 of file phy_n.h.

#define B43_NPHY_HT_SIGFMOD_11N B43_PHY_N(0x099) /* HT signal field mod 11n */

Definition at line 250 of file phy_n.h.

#define B43_NPHY_HTAGC_WCNT B43_PHY_N(0x17B) /* HT ADC wait counters */

Definition at line 519 of file phy_n.h.

#define B43_NPHY_HTSIGTONES B43_PHY_N(0x217) /* HT signal tones */

Definition at line 700 of file phy_n.h.

#define B43_NPHY_INITCARR_DLEN B43_PHY_N(0x061) /* Initial carrier detection length */

Definition at line 154 of file phy_n.h.

#define B43_NPHY_INITGAIN_SLEN B43_PHY_N(0x064) /* Initial gain settle length */

Definition at line 157 of file phy_n.h.

#define B43_NPHY_INITSWIZP B43_PHY_N(0x0BC) /* Initial swizzle pattern */

Definition at line 306 of file phy_n.h.

#define B43_NPHY_INITSWIZPATTLEG B43_PHY_N(0x0DB) /* Initial swizzle pattern leg */

Definition at line 343 of file phy_n.h.

#define B43_NPHY_IQEST_CMD B43_PHY_N(0x129) /* I/Q estimate command */

Definition at line 433 of file phy_n.h.

#define B43_NPHY_IQEST_CMD_MODE 0x0002 /* Mode */

Definition at line 435 of file phy_n.h.

#define B43_NPHY_IQEST_CMD_START 0x0001 /* Start */

Definition at line 434 of file phy_n.h.

#define B43_NPHY_IQEST_IPACC_HI0 B43_PHY_N(0x12F) /* I/Q estimate I power acc hi 0 */

Definition at line 443 of file phy_n.h.

#define B43_NPHY_IQEST_IPACC_HI1 B43_PHY_N(0x137) /* I/Q estimate I power acc hi 1 */

Definition at line 449 of file phy_n.h.

#define B43_NPHY_IQEST_IPACC_LO0 B43_PHY_N(0x12E) /* I/Q estimate I power acc lo 0 */

Definition at line 442 of file phy_n.h.

#define B43_NPHY_IQEST_IPACC_LO1 B43_PHY_N(0x136) /* I/Q estimate I power acc lo 1 */

Definition at line 448 of file phy_n.h.

#define B43_NPHY_IQEST_IQACC_HI0 B43_PHY_N(0x12D) /* I/Q estimate I/Q acc hi 0 */

Definition at line 441 of file phy_n.h.

#define B43_NPHY_IQEST_IQACC_HI1 B43_PHY_N(0x135) /* I/Q estimate I/Q acc hi 1 */

Definition at line 447 of file phy_n.h.

#define B43_NPHY_IQEST_IQACC_LO0 B43_PHY_N(0x12C) /* I/Q estimate I/Q acc lo 0 */

Definition at line 440 of file phy_n.h.

#define B43_NPHY_IQEST_IQACC_LO1 B43_PHY_N(0x134) /* I/Q estimate I/Q acc lo 1 */

Definition at line 446 of file phy_n.h.

#define B43_NPHY_IQEST_QPACC_HI0 B43_PHY_N(0x131) /* I/Q estimate Q power acc hi 0 */

Definition at line 445 of file phy_n.h.

#define B43_NPHY_IQEST_QPACC_HI1 B43_PHY_N(0x139) /* I/Q estimate Q power acc hi 1 */

Definition at line 451 of file phy_n.h.

#define B43_NPHY_IQEST_QPACC_LO0 B43_PHY_N(0x130) /* I/Q estimate Q power acc lo 0 */

Definition at line 444 of file phy_n.h.

#define B43_NPHY_IQEST_QPACC_LO1 B43_PHY_N(0x138) /* I/Q estimate Q power acc lo 1 */

Definition at line 450 of file phy_n.h.

#define B43_NPHY_IQEST_SAMCNT B43_PHY_N(0x12B) /* I/Q estimate sample count */

Definition at line 439 of file phy_n.h.

#define B43_NPHY_IQEST_WT B43_PHY_N(0x12A) /* I/Q estimate wait time */

Definition at line 436 of file phy_n.h.

#define B43_NPHY_IQEST_WT_VAL 0x00FF /* Wait time */

Definition at line 437 of file phy_n.h.

#define B43_NPHY_IQEST_WT_VAL_SHIFT 0

Definition at line 438 of file phy_n.h.

#define B43_NPHY_IQFLIP B43_PHY_N(0x0B1) /* I/Q flip */

Definition at line 293 of file phy_n.h.

#define B43_NPHY_IQFLIP_ADC1 0x0001 /* ADC1 */

Definition at line 294 of file phy_n.h.

#define B43_NPHY_IQFLIP_ADC2 0x0010 /* ADC2 */

Definition at line 295 of file phy_n.h.

#define B43_NPHY_IQLOCAL_CMD B43_PHY_N(0x0C0) /* I/Q LO cal command */

Definition at line 314 of file phy_n.h.

#define B43_NPHY_IQLOCAL_CMD_EN 0x8000

Definition at line 315 of file phy_n.h.

#define B43_NPHY_IQLOCAL_CMDGCTL B43_PHY_N(0x0C2) /* I/Q LO cal command G control */

Definition at line 317 of file phy_n.h.

#define B43_NPHY_IQLOCAL_CMDNNUM B43_PHY_N(0x0C1) /* I/Q LO cal command N num */

Definition at line 316 of file phy_n.h.

#define B43_NPHY_ITSSI1 B43_PHY_N(0x11E) /* TSSI idle 1 */

Definition at line 420 of file phy_n.h.

#define B43_NPHY_ITSSI2 B43_PHY_N(0x11F) /* TSSI idle 2 */

Definition at line 421 of file phy_n.h.

#define B43_NPHY_ITSSI_VAL 0x00FF /* Idle TSSI */

Definition at line 422 of file phy_n.h.

#define B43_NPHY_ITSSI_VAL_SHIFT 0

Definition at line 423 of file phy_n.h.

#define B43_NPHY_JMPSTP0 B43_PHY_N(0x1E5) /* Jump step 0 */

Definition at line 619 of file phy_n.h.

#define B43_NPHY_JMPSTP1 B43_PHY_N(0x1E6) /* Jump step 1 */

Definition at line 620 of file phy_n.h.

#define B43_NPHY_LEG_SIGFMOD_11N B43_PHY_N(0x098) /* Legacy signal field mod 11n */

Definition at line 249 of file phy_n.h.

#define B43_NPHY_LEGDUP_FTA B43_PHY_N(0x182) /* Legacy dup frm table address */

Definition at line 526 of file phy_n.h.

#define B43_NPHY_LTRN_OFF B43_PHY_N(0x170) /* LTRN offset */

Definition at line 508 of file phy_n.h.

#define B43_NPHY_LTRN_OFF_20L B43_PHY_N(0x1C5) /* LTRN offset 20L */

Definition at line 587 of file phy_n.h.

#define B43_NPHY_LTRN_OFF_20U B43_PHY_N(0x1C7) /* LTRN offset 20U */

Definition at line 589 of file phy_n.h.

#define B43_NPHY_LTRN_OFF_G20L B43_PHY_N(0x1C4) /* LTRN offset gain 20L */

Definition at line 586 of file phy_n.h.

#define B43_NPHY_LTRN_OFF_G20U B43_PHY_N(0x1C6) /* LTRN offset gain 20U */

Definition at line 588 of file phy_n.h.

#define B43_NPHY_LTRN_OFFGAIN B43_PHY_N(0x16F) /* LTRN offset gain */

Definition at line 507 of file phy_n.h.

#define B43_NPHY_MAXRSSI_DTIME B43_PHY_N(0x13F) /* RSSI max RSSI delay time */

Definition at line 455 of file phy_n.h.

#define B43_NPHY_MCSDUP6M B43_PHY_N(0x17D) /* MCS dup 6M */

Definition at line 521 of file phy_n.h.

#define B43_NPHY_MIMO_CRSTXEXT B43_PHY_N(0x13A) /* MIMO PHY CRS TX extension */

Definition at line 452 of file phy_n.h.

#define B43_NPHY_MIMOCFG B43_PHY_N(0x0ED) /* MIMO config */

Definition at line 364 of file phy_n.h.

#define B43_NPHY_MIMOCFG_AUTO 0x0100 /* Greenfield/mixed mode auto */

Definition at line 366 of file phy_n.h.

#define B43_NPHY_MIMOCFG_GFMIX 0x0004 /* Greenfield or mixed mode */

Definition at line 365 of file phy_n.h.

#define B43_NPHY_ML_LOGSS_RAT B43_PHY_N(0x1CC) /* ML/logss ratio */

Definition at line 594 of file phy_n.h.

#define B43_NPHY_ML_LOGSS_RATSLOPE B43_PHY_N(0x20B) /* ML/logss ratio slope */

Definition at line 689 of file phy_n.h.

#define B43_NPHY_MLCTL B43_PHY_N(0x0B7) /* ML control */

Definition at line 301 of file phy_n.h.

#define B43_NPHY_MLPARM B43_PHY_N(0x0B6) /* ML parameters */

Definition at line 300 of file phy_n.h.

#define B43_NPHY_NDATAT_DUP40 B43_PHY_N(0x17E) /* # data tones dup 40 */

Definition at line 522 of file phy_n.h.

#define B43_NPHY_NRDATAT_TGNSYNC20SIG B43_PHY_N(0x173) /* # data tones TGNsync 20 sig */

Definition at line 511 of file phy_n.h.

#define B43_NPHY_NRDATAT_TGNSYNC40SIG B43_PHY_N(0x174) /* # data tones TGNsync 40 sig */

Definition at line 512 of file phy_n.h.

#define B43_NPHY_NRDATAT_WWISE20SIG B43_PHY_N(0x171) /* # data tones WWiSE 20 sig */

Definition at line 509 of file phy_n.h.

#define B43_NPHY_NRDATAT_WWISE40SIG B43_PHY_N(0x172) /* # data tones WWiSE 40 sig */

Definition at line 510 of file phy_n.h.

#define B43_NPHY_NRDTO_TGNSYNC B43_PHY_N(0x096) /* # datatones TGNsync */

Definition at line 247 of file phy_n.h.

#define B43_NPHY_NRDTO_WWISE B43_PHY_N(0x095) /* # datatones WWiSE */

Definition at line 246 of file phy_n.h.

#define B43_NPHY_OVER_DGAIN0 B43_PHY_N(0x152) /* Override digital gain 0 */

Definition at line 479 of file phy_n.h.

#define B43_NPHY_OVER_DGAIN1 B43_PHY_N(0x153) /* Override digital gain 1 */

Definition at line 480 of file phy_n.h.

#define B43_NPHY_OVER_DGAIN_CCKDGECV 0xFF00 /* CCK digital gain enable count value */

Definition at line 484 of file phy_n.h.

#define B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT 8

Definition at line 485 of file phy_n.h.

#define B43_NPHY_OVER_DGAIN_FDGEN 0x0008 /* Force digital gain enable */

Definition at line 483 of file phy_n.h.

#define B43_NPHY_OVER_DGAIN_FDGV 0x0007 /* Force digital gain value */

Definition at line 481 of file phy_n.h.

#define B43_NPHY_OVER_DGAIN_FDGV_SHIFT 0

Definition at line 482 of file phy_n.h.

#define B43_NPHY_PACKGAIN_SLEN B43_PHY_N(0x067) /* Packet gain settle length */

Definition at line 160 of file phy_n.h.

#define B43_NPHY_PACPROC_DBG B43_PHY_N(0x183) /* Packet processing debug */

Definition at line 527 of file phy_n.h.

#define B43_NPHY_PAPD_EN0 B43_PHY_N(0x297) /* PAPD Enable0 TBD */

Definition at line 709 of file phy_n.h.

#define B43_NPHY_PAPD_EN1 B43_PHY_N(0x29B) /* PAPD Enable1 TBD */

Definition at line 711 of file phy_n.h.

#define B43_NPHY_PHASETR_A0 B43_PHY_N(0x145) /* Phase track alpha 0 */

Definition at line 468 of file phy_n.h.

#define B43_NPHY_PHASETR_A1 B43_PHY_N(0x146) /* Phase track alpha 1 */

Definition at line 469 of file phy_n.h.

#define B43_NPHY_PHASETR_A2 B43_PHY_N(0x147) /* Phase track alpha 2 */

Definition at line 470 of file phy_n.h.

#define B43_NPHY_PHASETR_B0 B43_PHY_N(0x148) /* Phase track beta 0 */

Definition at line 471 of file phy_n.h.

#define B43_NPHY_PHASETR_B1 B43_PHY_N(0x149) /* Phase track beta 1 */

Definition at line 472 of file phy_n.h.

#define B43_NPHY_PHASETR_B2 B43_PHY_N(0x14A) /* Phase track beta 2 */

Definition at line 473 of file phy_n.h.

#define B43_NPHY_PHASETR_CHG0 B43_PHY_N(0x14B) /* Phase track change 0 */

Definition at line 474 of file phy_n.h.

#define B43_NPHY_PHASETR_CHG1 B43_PHY_N(0x14C) /* Phase track change 1 */

Definition at line 475 of file phy_n.h.

#define B43_NPHY_PHASETW_OFF B43_PHY_N(0x14D) /* Phase track offset */

Definition at line 476 of file phy_n.h.

#define B43_NPHY_PHYLB_MODE B43_PHY_N(0x1F4) /* PHY loopback mode */

Definition at line 666 of file phy_n.h.

#define B43_NPHY_PHYSTAT_ADVRET B43_PHY_N(0x1F3) /* PHY stats ADV retard */

Definition at line 665 of file phy_n.h.

#define B43_NPHY_PHYSTAT_FREQEST B43_PHY_N(0x1F2) /* PHY stats frequency estimate */

Definition at line 664 of file phy_n.h.

#define B43_NPHY_PHYSTAT_GAIN0 B43_PHY_N(0x1F0) /* PHY stats gain info 0 */

Definition at line 662 of file phy_n.h.

#define B43_NPHY_PHYSTAT_GAIN1 B43_PHY_N(0x1F1) /* PHY stats gain info 1 */

Definition at line 663 of file phy_n.h.

#define B43_NPHY_PIL_CYC1 B43_PHY_N(0x184) /* Pilot cycle counter 1 */

Definition at line 528 of file phy_n.h.

#define B43_NPHY_PIL_CYC2 B43_PHY_N(0x185) /* Pilot cycle counter 2 */

Definition at line 529 of file phy_n.h.

#define B43_NPHY_PIL_DW0 B43_PHY_N(0x141) /* Pilot data weight 0 */

Definition at line 456 of file phy_n.h.

#define B43_NPHY_PIL_DW1 B43_PHY_N(0x142) /* Pilot data weight 1 */

Definition at line 457 of file phy_n.h.

#define B43_NPHY_PIL_DW2 B43_PHY_N(0x143) /* Pilot data weight 2 */

Definition at line 458 of file phy_n.h.

#define B43_NPHY_PIL_DW_16QAM 0x0F00 /* 16-QAM */

Definition at line 463 of file phy_n.h.

#define B43_NPHY_PIL_DW_16QAM_SHIFT 8

Definition at line 464 of file phy_n.h.

#define B43_NPHY_PIL_DW_64QAM 0xF000 /* 64-QAM */

Definition at line 465 of file phy_n.h.

#define B43_NPHY_PIL_DW_64QAM_SHIFT 12

Definition at line 466 of file phy_n.h.

#define B43_NPHY_PIL_DW_BPSK 0x000F /* BPSK */

Definition at line 459 of file phy_n.h.

#define B43_NPHY_PIL_DW_BPSK_SHIFT 0

Definition at line 460 of file phy_n.h.

#define B43_NPHY_PIL_DW_QPSK 0x00F0 /* QPSK */

Definition at line 461 of file phy_n.h.

#define B43_NPHY_PIL_DW_QPSK_SHIFT 4

Definition at line 462 of file phy_n.h.

#define B43_NPHY_PILTONE_MIDX1 B43_PHY_N(0x1FC) /* Pilot tone map index 1 */

Definition at line 674 of file phy_n.h.

#define B43_NPHY_PILTONE_MIDX2 B43_PHY_N(0x1FD) /* Pilot tone map index 2 */

Definition at line 675 of file phy_n.h.

#define B43_NPHY_PILTONE_MIDX3 B43_PHY_N(0x1FE) /* Pilot tone map index 3 */

Definition at line 676 of file phy_n.h.

#define B43_NPHY_PLOAD_CSENSE_EXTLEN B43_PHY_N(0x070) /* Payload carrier sense extension length */

Definition at line 169 of file phy_n.h.

#define B43_NPHY_PPROC_RSTLEN B43_PHY_N(0x060) /* Packet processing reset length */

Definition at line 153 of file phy_n.h.

#define B43_NPHY_PTHROUGH_CNT B43_PHY_N(0x1BD) /* Pass-through counter */

Definition at line 585 of file phy_n.h.

#define B43_NPHY_PWRDET1 B43_PHY_N(0x13B) /* Power det 1 */

Definition at line 453 of file phy_n.h.

#define B43_NPHY_PWRDET2 B43_PHY_N(0x13C) /* Power det 2 */

Definition at line 454 of file phy_n.h.

#define B43_NPHY_RADAR_BLNKCTL B43_PHY_N(0x0EE) /* Radar blank control */

Definition at line 367 of file phy_n.h.

#define B43_NPHY_RADAR_MAL B43_PHY_N(0x157) /* Radar MA length */

Definition at line 487 of file phy_n.h.

#define B43_NPHY_RADAR_SRCCTL B43_PHY_N(0x158) /* Radar search control */

Definition at line 488 of file phy_n.h.

#define B43_NPHY_RADAR_THRES0 B43_PHY_N(0x0F3) /* Radar threshold 0 */

Definition at line 372 of file phy_n.h.

#define B43_NPHY_RADAR_THRES0R B43_PHY_N(0x0F5) /* Radar threshold 0R */

Definition at line 374 of file phy_n.h.

#define B43_NPHY_RADAR_THRES1 B43_PHY_N(0x0F4) /* Radar threshold 1 */

Definition at line 373 of file phy_n.h.

#define B43_NPHY_RADAR_THRES1R B43_PHY_N(0x0F6) /* Radar threshold 1R */

Definition at line 375 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD B43_PHY_N(0x078) /* RF control (command) */

Definition at line 177 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_CHIP0PU 0x0400 /* Chip0 PU */

Definition at line 186 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_CORESEL 0x0038 /* Core select */

Definition at line 180 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_CORESEL_SHIFT 3

Definition at line 181 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_EN 0x0800 /* Radio enabled */

Definition at line 187 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_OEPORFORCE 0x0080 /* OE POR force */

Definition at line 183 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_PORFORCE 0x0040 /* POR force */

Definition at line 182 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_RXEN 0x0100 /* RX enable */

Definition at line 184 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_RXTX 0x0002 /* RX/TX */

Definition at line 179 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_SEQENCORE 0xF000 /* Seq en core */

Definition at line 188 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_SEQENCORE_SHIFT 12

Definition at line 189 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_START 0x0001 /* Start sequence */

Definition at line 178 of file phy_n.h.

#define B43_NPHY_RFCTL_CMD_TXEN 0x0200 /* TX enable */

Definition at line 185 of file phy_n.h.

#define B43_NPHY_RFCTL_CST0 B43_PHY_N(0x10D) /* RF control core swap table 0 */

Definition at line 398 of file phy_n.h.

#define B43_NPHY_RFCTL_CST1 B43_PHY_N(0x10E) /* RF control core swap table 1 */

Definition at line 399 of file phy_n.h.

#define B43_NPHY_RFCTL_CST2O B43_PHY_N(0x10F) /* RF control core swap table 2 + others */

Definition at line 400 of file phy_n.h.

#define B43_NPHY_RFCTL_DBG B43_PHY_N(0x14E) /* RF control debug */

Definition at line 477 of file phy_n.h.

#define B43_NPHY_RFCTL_INTC1 B43_PHY_N(0x091) /* RF control (intc 1) */

Definition at line 242 of file phy_n.h.

#define B43_NPHY_RFCTL_INTC2 B43_PHY_N(0x092) /* RF control (intc 2) */

Definition at line 243 of file phy_n.h.

#define B43_NPHY_RFCTL_INTC3 B43_PHY_N(0x093) /* RF control (intc 3) */

Definition at line 244 of file phy_n.h.

#define B43_NPHY_RFCTL_INTC4 B43_PHY_N(0x094) /* RF control (intc 4) */

Definition at line 245 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_LNAPA1 B43_PHY_N(0x100) /* RF control LUT LNA PA 1 */

Definition at line 385 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_LNAPA2 B43_PHY_N(0x101) /* RF control LUT LNA PA 2 */

Definition at line 386 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_LNAPA3 B43_PHY_N(0x102) /* RF control LUT LNA PA 3 */

Definition at line 387 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_LNAPA4 B43_PHY_N(0x103) /* RF control LUT LNA PA 4 */

Definition at line 388 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_TRSW_LO1 B43_PHY_N(0x0F8) /* RF control LUT TRSW lower 1 */

Definition at line 377 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_TRSW_LO2 B43_PHY_N(0x0FA) /* RF control LUT TRSW lower 2 */

Definition at line 379 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_TRSW_LO3 B43_PHY_N(0x0FC) /* RF control LUT TRSW lower 3 */

Definition at line 381 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_TRSW_LO4 B43_PHY_N(0x0FE) /* RF control LUT TRSW lower 4 */

Definition at line 383 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_TRSW_UP1 B43_PHY_N(0x0F9) /* RF control LUT TRSW upper 1 */

Definition at line 378 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_TRSW_UP2 B43_PHY_N(0x0FB) /* RF control LUT TRSW upper 2 */

Definition at line 380 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_TRSW_UP3 B43_PHY_N(0x0FD) /* RF control LUT TRSW upper 3 */

Definition at line 382 of file phy_n.h.

#define B43_NPHY_RFCTL_LUT_TRSW_UP4 B43_PHY_N(0x0FF) /* RF control LUT TRSW upper 4 */

Definition at line 384 of file phy_n.h.

#define B43_NPHY_RFCTL_OVER B43_PHY_N(0x0EC) /* RF control override */

Definition at line 363 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO1 B43_PHY_N(0x07A) /* RF control (RSSI others 1) */

Definition at line 190 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO1_HIQDISCO 0x0200 /* HIQ dis core */

Definition at line 197 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO1_HPFBWHI 0x0100 /* HPF bandwidth high */

Definition at line 196 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO1_LPFBW 0x00C0 /* LPF bandwidth */

Definition at line 195 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO1_PAPD 0x0004 /* PA PD */

Definition at line 193 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO1_RSSICTL 0x0030 /* RSSI control */

Definition at line 194 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO1_RXPD 0x0001 /* RX PD */

Definition at line 191 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO1_TXPD 0x0002 /* TX PD */

Definition at line 192 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO2 B43_PHY_N(0x07D) /* RF control (RSSI others 2) */

Definition at line 200 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO2_HIQDISCO 0x0200 /* HIQ dis core */

Definition at line 207 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO2_HPFBWHI 0x0100 /* HPF bandwidth high */

Definition at line 206 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO2_LPFBW 0x00C0 /* LPF bandwidth */

Definition at line 205 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO2_PAPD 0x0004 /* PA PD */

Definition at line 203 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO2_RSSICTL 0x0030 /* RSSI control */

Definition at line 204 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO2_RXPD 0x0001 /* RX PD */

Definition at line 201 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO2_TXPD 0x0002 /* TX PD */

Definition at line 202 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO3 B43_PHY_N(0x080) /* RF control (RSSI others 3) */

Definition at line 210 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO3_HIQDISCO 0x0200 /* HIQ dis core */

Definition at line 217 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO3_HPFBWHI 0x0100 /* HPF bandwidth high */

Definition at line 216 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO3_LPFBW 0x00C0 /* LPF bandwidth */

Definition at line 215 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO3_PAPD 0x0004 /* PA PD */

Definition at line 213 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO3_RSSICTL 0x0030 /* RSSI control */

Definition at line 214 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO3_RXPD 0x0001 /* RX PD */

Definition at line 211 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO3_TXPD 0x0002 /* TX PD */

Definition at line 212 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO4 B43_PHY_N(0x083) /* RF control (RSSI others 4) */

Definition at line 220 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO4_HIQDISCO 0x0200 /* HIQ dis core */

Definition at line 227 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO4_HPFBWHI 0x0100 /* HPF bandwidth high */

Definition at line 226 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO4_LPFBW 0x00C0 /* LPF bandwidth */

Definition at line 225 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO4_PAPD 0x0004 /* PA PD */

Definition at line 223 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO4_RSSICTL 0x0030 /* RSSI control */

Definition at line 224 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO4_RXPD 0x0001 /* RX PD */

Definition at line 221 of file phy_n.h.

#define B43_NPHY_RFCTL_RSSIO4_TXPD 0x0002 /* TX PD */

Definition at line 222 of file phy_n.h.

#define B43_NPHY_RFCTL_RXG1 B43_PHY_N(0x07B) /* RF control (RX gain 1) */

Definition at line 198 of file phy_n.h.

#define B43_NPHY_RFCTL_RXG2 B43_PHY_N(0x07E) /* RF control (RX gain 2) */

Definition at line 208 of file phy_n.h.

#define B43_NPHY_RFCTL_RXG3 B43_PHY_N(0x081) /* RF control (RX gain 3) */

Definition at line 218 of file phy_n.h.

#define B43_NPHY_RFCTL_RXG4 B43_PHY_N(0x084) /* RF control (RX gain 4) */

Definition at line 228 of file phy_n.h.

#define B43_NPHY_RFCTL_TXG1 B43_PHY_N(0x07C) /* RF control (TX gain 1) */

Definition at line 199 of file phy_n.h.

#define B43_NPHY_RFCTL_TXG2 B43_PHY_N(0x07F) /* RF control (TX gain 2) */

Definition at line 209 of file phy_n.h.

#define B43_NPHY_RFCTL_TXG3 B43_PHY_N(0x082) /* RF control (TX gain 3) */

Definition at line 219 of file phy_n.h.

#define B43_NPHY_RFCTL_TXG4 B43_PHY_N(0x085) /* RF control (TX gain 4) */

Definition at line 229 of file phy_n.h.

#define B43_NPHY_RFSEQ_LPFBW B43_PHY_N(0x112) /* RF seq LPF bandwidth */

Definition at line 402 of file phy_n.h.

#define B43_NPHY_RFSEQCA B43_PHY_N(0x0A2) /* RF seq core active */

Definition at line 261 of file phy_n.h.

#define B43_NPHY_RFSEQCA_RXDIS 0xF000 /* RX disable */

Definition at line 268 of file phy_n.h.

#define B43_NPHY_RFSEQCA_RXDIS_SHIFT 12

Definition at line 269 of file phy_n.h.

#define B43_NPHY_RFSEQCA_RXEN 0x00F0 /* RX enable */

Definition at line 264 of file phy_n.h.

#define B43_NPHY_RFSEQCA_RXEN_SHIFT 4

Definition at line 265 of file phy_n.h.

#define B43_NPHY_RFSEQCA_TXDIS 0x0F00 /* TX disable */

Definition at line 266 of file phy_n.h.

#define B43_NPHY_RFSEQCA_TXDIS_SHIFT 8

Definition at line 267 of file phy_n.h.

#define B43_NPHY_RFSEQCA_TXEN 0x000F /* TX enable */

Definition at line 262 of file phy_n.h.

#define B43_NPHY_RFSEQCA_TXEN_SHIFT 0

Definition at line 263 of file phy_n.h.

#define B43_NPHY_RFSEQMODE B43_PHY_N(0x0A1) /* RF seq mode */

Definition at line 258 of file phy_n.h.

#define B43_NPHY_RFSEQMODE_CAOVER 0x0001 /* Core active override */

Definition at line 259 of file phy_n.h.

#define B43_NPHY_RFSEQMODE_TROVER 0x0002 /* Trigger override */

Definition at line 260 of file phy_n.h.

#define B43_NPHY_RFSEQST B43_PHY_N(0x0A4) /* RF seq status. Values same as trigger. */

Definition at line 277 of file phy_n.h.

#define B43_NPHY_RFSEQTR B43_PHY_N(0x0A3) /* RF seq trigger */

Definition at line 270 of file phy_n.h.

#define B43_NPHY_RFSEQTR_RST2RX 0x0020 /* Reset to RX */

Definition at line 276 of file phy_n.h.

#define B43_NPHY_RFSEQTR_RX2TX 0x0001 /* RX2TX */

Definition at line 271 of file phy_n.h.

#define B43_NPHY_RFSEQTR_TX2RX 0x0002 /* TX2RX */

Definition at line 272 of file phy_n.h.

#define B43_NPHY_RFSEQTR_UPGH 0x0004 /* Update gain H */

Definition at line 273 of file phy_n.h.

#define B43_NPHY_RFSEQTR_UPGL 0x0008 /* Update gain L */

Definition at line 274 of file phy_n.h.

#define B43_NPHY_RFSEQTR_UPGU 0x0010 /* Update gain U */

Definition at line 275 of file phy_n.h.

#define B43_NPHY_RIFS_SRCTL B43_PHY_N(0x20C) /* RIFS search timeout length */

Definition at line 690 of file phy_n.h.

#define B43_NPHY_RSSI1 B43_PHY_N(0x219) /* RSSI value 1 */

Definition at line 701 of file phy_n.h.

#define B43_NPHY_RSSI2 B43_PHY_N(0x21A) /* RSSI value 2 */

Definition at line 702 of file phy_n.h.

#define B43_NPHY_RSSIMC_0I_PWRDET B43_PHY_N(0x1A8) /* RSSI multiplication coefficient 0 I power det */

Definition at line 564 of file phy_n.h.

#define B43_NPHY_RSSIMC_0I_RSSI_X B43_PHY_N(0x1A4) /* RSSI multiplication coefficient 0 I RSSI X */

Definition at line 560 of file phy_n.h.

#define B43_NPHY_RSSIMC_0I_RSSI_Y B43_PHY_N(0x1A5) /* RSSI multiplication coefficient 0 I RSSI Y */

Definition at line 561 of file phy_n.h.

#define B43_NPHY_RSSIMC_0I_RSSI_Z B43_PHY_N(0x1A6) /* RSSI multiplication coefficient 0 I RSSI Z */

Definition at line 562 of file phy_n.h.

#define B43_NPHY_RSSIMC_0I_TBD B43_PHY_N(0x1A7) /* RSSI multiplication coefficient 0 I TBD */

Definition at line 563 of file phy_n.h.

#define B43_NPHY_RSSIMC_0I_TSSI B43_PHY_N(0x1A9) /* RSSI multiplication coefficient 0 I TSSI */

Definition at line 565 of file phy_n.h.

#define B43_NPHY_RSSIMC_0Q_PWRDET B43_PHY_N(0x1AE) /* RSSI multiplication coefficient 0 Q power det */

Definition at line 570 of file phy_n.h.

#define B43_NPHY_RSSIMC_0Q_RSSI_X B43_PHY_N(0x1AA) /* RSSI multiplication coefficient 0 Q RSSI X */

Definition at line 566 of file phy_n.h.

#define B43_NPHY_RSSIMC_0Q_RSSI_Y B43_PHY_N(0x1AB) /* RSSI multiplication coefficient 0 Q RSSI Y */

Definition at line 567 of file phy_n.h.

#define B43_NPHY_RSSIMC_0Q_RSSI_Z B43_PHY_N(0x1AC) /* RSSI multiplication coefficient 0 Q RSSI Z */

Definition at line 568 of file phy_n.h.

#define B43_NPHY_RSSIMC_0Q_TBD B43_PHY_N(0x1AD) /* RSSI multiplication coefficient 0 Q TBD */

Definition at line 569 of file phy_n.h.

#define B43_NPHY_RSSIMC_0Q_TSSI B43_PHY_N(0x1AF) /* RSSI multiplication coefficient 0 Q TSSI */

Definition at line 571 of file phy_n.h.

#define B43_NPHY_RSSIMC_1I_PWRDET B43_PHY_N(0x1B4) /* RSSI multiplication coefficient 1 I power det */

Definition at line 576 of file phy_n.h.

#define B43_NPHY_RSSIMC_1I_RSSI_X B43_PHY_N(0x1B0) /* RSSI multiplication coefficient 1 I RSSI X */

Definition at line 572 of file phy_n.h.

#define B43_NPHY_RSSIMC_1I_RSSI_Y B43_PHY_N(0x1B1) /* RSSI multiplication coefficient 1 I RSSI Y */

Definition at line 573 of file phy_n.h.

#define B43_NPHY_RSSIMC_1I_RSSI_Z B43_PHY_N(0x1B2) /* RSSI multiplication coefficient 1 I RSSI Z */

Definition at line 574 of file phy_n.h.

#define B43_NPHY_RSSIMC_1I_TBD B43_PHY_N(0x1B3) /* RSSI multiplication coefficient 1 I TBD */

Definition at line 575 of file phy_n.h.

#define B43_NPHY_RSSIMC_1I_TSSI B43_PHY_N(0x1B5) /* RSSI multiplication coefficient 1 I TSSI */

Definition at line 577 of file phy_n.h.

#define B43_NPHY_RSSIMC_1Q_PWRDET B43_PHY_N(0x1BA) /* RSSI multiplication coefficient 1 Q power det */

Definition at line 582 of file phy_n.h.

#define B43_NPHY_RSSIMC_1Q_RSSI_X B43_PHY_N(0x1B6) /* RSSI multiplication coefficient 1 Q RSSI X */

Definition at line 578 of file phy_n.h.

#define B43_NPHY_RSSIMC_1Q_RSSI_Y B43_PHY_N(0x1B7) /* RSSI multiplication coefficient 1 Q RSSI Y */

Definition at line 579 of file phy_n.h.

#define B43_NPHY_RSSIMC_1Q_RSSI_Z B43_PHY_N(0x1B8) /* RSSI multiplication coefficient 1 Q RSSI Z */

Definition at line 580 of file phy_n.h.

#define B43_NPHY_RSSIMC_1Q_TBD B43_PHY_N(0x1B9) /* RSSI multiplication coefficient 1 Q TBD */

Definition at line 581 of file phy_n.h.

#define B43_NPHY_RSSIMC_1Q_TSSI B43_PHY_N(0x1BB) /* RSSI multiplication coefficient 1 Q TSSI */

Definition at line 583 of file phy_n.h.

#define B43_NPHY_RX_SIGCTL B43_PHY_N(0x204) /* RX signal control */

Definition at line 682 of file phy_n.h.

#define B43_NPHY_RXCTL B43_PHY_N(0x0A0) /* RX control */

Definition at line 255 of file phy_n.h.

#define B43_NPHY_RXCTL_BSELU20 0x0010 /* Band select upper 20 */

Definition at line 256 of file phy_n.h.

#define B43_NPHY_RXCTL_RIFSEN 0x0080 /* RIFS enable */

Definition at line 257 of file phy_n.h.

#define B43_NPHY_RXF20_DENOM0 B43_PHY_N(0x04C) /* RX filter 20 denominator 0 */

Definition at line 136 of file phy_n.h.

#define B43_NPHY_RXF20_DENOM1 B43_PHY_N(0x04D) /* RX filter 20 denominator 1 */

Definition at line 137 of file phy_n.h.

#define B43_NPHY_RXF20_DENOM10 B43_PHY_N(0x051) /* RX filter 20 denominator 10 */

Definition at line 141 of file phy_n.h.

#define B43_NPHY_RXF20_DENOM11 B43_PHY_N(0x052) /* RX filter 20 denominator 11 */

Definition at line 142 of file phy_n.h.

#define B43_NPHY_RXF20_NUM0 B43_PHY_N(0x049) /* RX filter 20 numerator 0 */

Definition at line 133 of file phy_n.h.

#define B43_NPHY_RXF20_NUM1 B43_PHY_N(0x04A) /* RX filter 20 numerator 1 */

Definition at line 134 of file phy_n.h.

#define B43_NPHY_RXF20_NUM10 B43_PHY_N(0x04E) /* RX filter 20 numerator 10 */

Definition at line 138 of file phy_n.h.

#define B43_NPHY_RXF20_NUM11 B43_PHY_N(0x04F) /* RX filter 20 numerator 11 */

Definition at line 139 of file phy_n.h.

#define B43_NPHY_RXF20_NUM12 B43_PHY_N(0x050) /* RX filter 20 numerator 12 */

Definition at line 140 of file phy_n.h.

#define B43_NPHY_RXF20_NUM2 B43_PHY_N(0x04B) /* RX filter 20 numerator 2 */

Definition at line 135 of file phy_n.h.

#define B43_NPHY_RXF40_DENOM0 B43_PHY_N(0x056) /* RX filter 40 denominator 0 */

Definition at line 146 of file phy_n.h.

#define B43_NPHY_RXF40_DENOM1 B43_PHY_N(0x057) /* RX filter 40 denominator 1 */

Definition at line 147 of file phy_n.h.

#define B43_NPHY_RXF40_DENOM10 B43_PHY_N(0x05B) /* RX filter 40 denominator 10 */

Definition at line 151 of file phy_n.h.

#define B43_NPHY_RXF40_DENOM11 B43_PHY_N(0x05C) /* RX filter 40 denominator 11 */

Definition at line 152 of file phy_n.h.

#define B43_NPHY_RXF40_NUM0 B43_PHY_N(0x053) /* RX filter 40 numerator 0 */

Definition at line 143 of file phy_n.h.

#define B43_NPHY_RXF40_NUM1 B43_PHY_N(0x054) /* RX filter 40 numerator 1 */

Definition at line 144 of file phy_n.h.

#define B43_NPHY_RXF40_NUM10 B43_PHY_N(0x058) /* RX filter 40 numerator 10 */

Definition at line 148 of file phy_n.h.

#define B43_NPHY_RXF40_NUM11 B43_PHY_N(0x059) /* RX filter 40 numerator 11 */

Definition at line 149 of file phy_n.h.

#define B43_NPHY_RXF40_NUM12 B43_PHY_N(0x05A) /* RX filter 40 numerator 12 */

Definition at line 150 of file phy_n.h.

#define B43_NPHY_RXF40_NUM2 B43_PHY_N(0x055) /* RX filter 40 numerator 2 */

Definition at line 145 of file phy_n.h.

#define B43_NPHY_RXMACIFM B43_PHY_N(0x123) /* RX Macif mode */

Definition at line 427 of file phy_n.h.

#define B43_NPHY_RXPIL_CYCNT0 B43_PHY_N(0x205) /* RX pilot cycle counter 0 */

Definition at line 683 of file phy_n.h.

#define B43_NPHY_RXPIL_CYCNT1 B43_PHY_N(0x206) /* RX pilot cycle counter 1 */

Definition at line 684 of file phy_n.h.

#define B43_NPHY_RXPIL_CYCNT2 B43_PHY_N(0x207) /* RX pilot cycle counter 2 */

Definition at line 685 of file phy_n.h.

#define B43_NPHY_SAMC_WCNT B43_PHY_N(0x1BC) /* Sample collect wait counter */

Definition at line 584 of file phy_n.h.

#define B43_NPHY_SAMP_CMD B43_PHY_N(0x0C3) /* Sample command */

Definition at line 318 of file phy_n.h.

#define B43_NPHY_SAMP_CMD_STOP 0x0002 /* Stop */

Definition at line 319 of file phy_n.h.

#define B43_NPHY_SAMP_DEPCNT B43_PHY_N(0x0C6) /* Sample depth count */

Definition at line 322 of file phy_n.h.

#define B43_NPHY_SAMP_LOOPCNT B43_PHY_N(0x0C4) /* Sample loop count */

Definition at line 320 of file phy_n.h.

#define B43_NPHY_SAMP_STAT B43_PHY_N(0x0C7) /* Sample status */

Definition at line 323 of file phy_n.h.

#define B43_NPHY_SAMP_WAITCNT B43_PHY_N(0x0C5) /* Sample wait count */

Definition at line 321 of file phy_n.h.

#define B43_NPHY_SAMTWC B43_PHY_N(0x128) /* Sample tail wait count */

Definition at line 432 of file phy_n.h.

#define B43_NPHY_SCRAM_SIGCTL B43_PHY_N(0x090) /* Scram signal control */

Definition at line 235 of file phy_n.h.

#define B43_NPHY_SCRAM_SIGCTL_INITST 0x007F /* Initial state value */

Definition at line 236 of file phy_n.h.

#define B43_NPHY_SCRAM_SIGCTL_INITST_SHIFT 0

Definition at line 237 of file phy_n.h.

#define B43_NPHY_SCRAM_SIGCTL_SCM 0x0080 /* Scram control mode */

Definition at line 238 of file phy_n.h.

#define B43_NPHY_SCRAM_SIGCTL_SICE 0x0100 /* Scram index control enable */

Definition at line 239 of file phy_n.h.

#define B43_NPHY_SCRAM_SIGCTL_START 0xFE00 /* Scram start bit */

Definition at line 240 of file phy_n.h.

#define B43_NPHY_SCRAM_SIGCTL_START_SHIFT 9

Definition at line 241 of file phy_n.h.

#define B43_NPHY_SIGCNT B43_PHY_N(0x10A) /* # sig count */

Definition at line 395 of file phy_n.h.

#define B43_NPHY_SIGFLDTOL B43_PHY_N(0x0D5) /* Signal fld tolerance */

Definition at line 337 of file phy_n.h.

#define B43_NPHY_SIGFMOD_WWISE B43_PHY_N(0x097) /* Signal field mod WWiSE */

Definition at line 248 of file phy_n.h.

#define B43_NPHY_SIGMA_N_MULT B43_PHY_N(0x0B3) /* Sigma N multiplier */

Definition at line 297 of file phy_n.h.

#define B43_NPHY_SIGSTARTBIT_CTL B43_PHY_N(0x10B) /* Sig start bit control */

Definition at line 396 of file phy_n.h.

#define B43_NPHY_SISO_SNR_THRES B43_PHY_N(0x0B2) /* SISO SNR threshold */

Definition at line 296 of file phy_n.h.

#define B43_NPHY_SMALLSGS_LEN B43_PHY_N(0x1EF) /* Small sig gain settle length */

Definition at line 661 of file phy_n.h.

#define B43_NPHY_SQPARM B43_PHY_N(0x17C) /* SQ params */

Definition at line 520 of file phy_n.h.

#define B43_NPHY_STR_ADDR1 B43_PHY_N(0x0AE) /* STR address 1 */

Definition at line 287 of file phy_n.h.

#define B43_NPHY_STR_ADDR2 B43_PHY_N(0x0AF) /* STR address 2 */

Definition at line 288 of file phy_n.h.

#define B43_NPHY_STR_WTIME20L B43_PHY_N(0x215) /* STR wait time 20L */

Definition at line 698 of file phy_n.h.

#define B43_NPHY_STR_WTIME20U B43_PHY_N(0x214) /* STR wait time 20U */

Definition at line 697 of file phy_n.h.

#define B43_NPHY_STRA_1L B43_PHY_N(0x1E0) /* STR address 1 L */

Definition at line 614 of file phy_n.h.

#define B43_NPHY_STRA_1U B43_PHY_N(0x1DE) /* STR address 1 U */

Definition at line 612 of file phy_n.h.

#define B43_NPHY_STRA_2L B43_PHY_N(0x1E1) /* STR address 2 L */

Definition at line 615 of file phy_n.h.

#define B43_NPHY_STRA_2U B43_PHY_N(0x1DF) /* STR address 2 U */

Definition at line 613 of file phy_n.h.

#define B43_NPHY_TABLE_ADDR B43_PHY_N(0x072) /* Table address */

Definition at line 171 of file phy_n.h.

#define B43_NPHY_TABLE_DATAHI B43_PHY_N(0x074) /* Table data high */

Definition at line 173 of file phy_n.h.

#define B43_NPHY_TABLE_DATALO B43_PHY_N(0x073) /* Table data low */

Definition at line 172 of file phy_n.h.

#define B43_NPHY_TGNSYNC_20NCYCDAT B43_PHY_N(0x0BA) /* TGNsync 20 N cyc data */

Definition at line 304 of file phy_n.h.

#define B43_NPHY_TGNSYNC_40NCYCDAT B43_PHY_N(0x0BB) /* TGNsync 40 N cyc data */

Definition at line 305 of file phy_n.h.

#define B43_NPHY_TGNSYNC_CRCM0 B43_PHY_N(0x104) /* TGNsync CRC mask 0 */

Definition at line 389 of file phy_n.h.

#define B43_NPHY_TGNSYNC_CRCM1 B43_PHY_N(0x105) /* TGNsync CRC mask 1 */

Definition at line 390 of file phy_n.h.

#define B43_NPHY_TGNSYNC_CRCM2 B43_PHY_N(0x106) /* TGNsync CRC mask 2 */

Definition at line 391 of file phy_n.h.

#define B43_NPHY_TGNSYNC_CRCM3 B43_PHY_N(0x107) /* TGNsync CRC mask 3 */

Definition at line 392 of file phy_n.h.

#define B43_NPHY_TGNSYNC_CRCM4 B43_PHY_N(0x108) /* TGNsync CRC mask 4 */

Definition at line 393 of file phy_n.h.

#define B43_NPHY_TGNSYNC_LENIDX B43_PHY_N(0x076) /* TGNsync length index */

Definition at line 175 of file phy_n.h.

#define B43_NPHY_TGNSYNC_SCRAMI0 B43_PHY_N(0x0D9) /* TGNsync scram init 0 */

Definition at line 341 of file phy_n.h.

#define B43_NPHY_TGNSYNC_SCRAMI1 B43_PHY_N(0x0DA) /* TGNsync scram init 1 */

Definition at line 342 of file phy_n.h.

#define B43_NPHY_TISRC_TLEN B43_PHY_N(0x069) /* Timing search timeout length */

Definition at line 162 of file phy_n.h.

#define B43_NPHY_TONE_MIDX20_1 B43_PHY_N(0x1F5) /* Tone map index 20/1 */

Definition at line 667 of file phy_n.h.

#define B43_NPHY_TONE_MIDX20_2 B43_PHY_N(0x1F6) /* Tone map index 20/2 */

Definition at line 668 of file phy_n.h.

#define B43_NPHY_TONE_MIDX20_3 B43_PHY_N(0x1F7) /* Tone map index 20/3 */

Definition at line 669 of file phy_n.h.

#define B43_NPHY_TONE_MIDX40_1 B43_PHY_N(0x1F8) /* Tone map index 40/1 */

Definition at line 670 of file phy_n.h.

#define B43_NPHY_TONE_MIDX40_2 B43_PHY_N(0x1F9) /* Tone map index 40/2 */

Definition at line 671 of file phy_n.h.

#define B43_NPHY_TONE_MIDX40_3 B43_PHY_N(0x1FA) /* Tone map index 40/3 */

Definition at line 672 of file phy_n.h.

#define B43_NPHY_TONE_MIDX40_4 B43_PHY_N(0x1FB) /* Tone map index 40/4 */

Definition at line 673 of file phy_n.h.

#define B43_NPHY_TONE_MIDX657M B43_PHY_N(0x216) /* Tone map index 657M */

Definition at line 699 of file phy_n.h.

#define B43_NPHY_TRLOSS B43_PHY_N(0x169) /* TR loss value */

Definition at line 504 of file phy_n.h.

#define B43_NPHY_TSSI_MAXTDT B43_PHY_N(0x11D) /* TSSI max TSSI delay time */

Definition at line 417 of file phy_n.h.

#define B43_NPHY_TSSI_MAXTDT_VAL 0x00FF /* max TSSI delay time */

Definition at line 418 of file phy_n.h.

#define B43_NPHY_TSSI_MAXTDT_VAL_SHIFT 0

Definition at line 419 of file phy_n.h.

#define B43_NPHY_TSSI_MAXTXFDT B43_PHY_N(0x11C) /* TSSI max TX frame delay time */

Definition at line 414 of file phy_n.h.

#define B43_NPHY_TSSI_MAXTXFDT_VAL 0x00FF /* max TX frame delay time */

Definition at line 415 of file phy_n.h.

#define B43_NPHY_TSSI_MAXTXFDT_VAL_SHIFT 0

Definition at line 416 of file phy_n.h.

#define B43_NPHY_TSSIBIAS1 B43_PHY_N(0x114) /* TSSI bias val 1 */

Definition at line 403 of file phy_n.h.

#define B43_NPHY_TSSIBIAS2 B43_PHY_N(0x115) /* TSSI bias val 2 */

Definition at line 404 of file phy_n.h.

#define B43_NPHY_TSSIBIAS_BIAS 0x00FF /* Bias */

Definition at line 405 of file phy_n.h.

#define B43_NPHY_TSSIBIAS_BIAS_SHIFT 0

Definition at line 406 of file phy_n.h.

#define B43_NPHY_TSSIBIAS_VAL 0xFF00 /* Value */

Definition at line 407 of file phy_n.h.

#define B43_NPHY_TSSIBIAS_VAL_SHIFT 8

Definition at line 408 of file phy_n.h.

#define B43_NPHY_TSSIMODE B43_PHY_N(0x122) /* TSSI mode */

Definition at line 424 of file phy_n.h.

#define B43_NPHY_TSSIMODE_EN 0x0001 /* TSSI enable */

Definition at line 425 of file phy_n.h.

#define B43_NPHY_TSSIMODE_PDEN 0x0002 /* Power det enable */

Definition at line 426 of file phy_n.h.

#define B43_NPHY_TXERR B43_PHY_N(0x007) /* TX error */

Definition at line 13 of file phy_n.h.

#define B43_NPHY_TXF_20CO_AS0 B43_PHY_N(0x0CC) /* TX filter 20 coeff A stage 0 */

Definition at line 328 of file phy_n.h.

#define B43_NPHY_TXF_20CO_AS1 B43_PHY_N(0x0CD) /* TX filter 20 coeff A stage 1 */

Definition at line 329 of file phy_n.h.

#define B43_NPHY_TXF_20CO_AS2 B43_PHY_N(0x0CE) /* TX filter 20 coeff A stage 2 */

Definition at line 330 of file phy_n.h.

#define B43_NPHY_TXF_20CO_B1S0 B43_PHY_N(0x0D0) /* TX filter 20 coeff B1 stage 0 */

Definition at line 332 of file phy_n.h.

#define B43_NPHY_TXF_20CO_B1S1 B43_PHY_N(0x0D2) /* TX filter 20 coeff B1 stage 1 */

Definition at line 334 of file phy_n.h.

#define B43_NPHY_TXF_20CO_B1S2 B43_PHY_N(0x0D4) /* TX filter 20 coeff B1 stage 2 */

Definition at line 336 of file phy_n.h.

#define B43_NPHY_TXF_20CO_B32S0 B43_PHY_N(0x0CF) /* TX filter 20 coeff B32 stage 0 */

Definition at line 331 of file phy_n.h.

#define B43_NPHY_TXF_20CO_B32S1 B43_PHY_N(0x0D1) /* TX filter 20 coeff B32 stage 1 */

Definition at line 333 of file phy_n.h.

#define B43_NPHY_TXF_20CO_B32S2 B43_PHY_N(0x0D3) /* TX filter 20 coeff B32 stage 2 */

Definition at line 335 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S0A1 B43_PHY_N(0x186) /* TX filter 20 coeff stage 0 A1 */

Definition at line 530 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S0A2 B43_PHY_N(0x187) /* TX filter 20 coeff stage 0 A2 */

Definition at line 531 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S0B1 B43_PHY_N(0x18C) /* TX filter 20 coeff stage 0 B1 */

Definition at line 536 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S0B2 B43_PHY_N(0x18D) /* TX filter 20 coeff stage 0 B2 */

Definition at line 537 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S0B3 B43_PHY_N(0x18E) /* TX filter 20 coeff stage 0 B3 */

Definition at line 538 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S1A1 B43_PHY_N(0x188) /* TX filter 20 coeff stage 1 A1 */

Definition at line 532 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S1A2 B43_PHY_N(0x189) /* TX filter 20 coeff stage 1 A2 */

Definition at line 533 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S1B1 B43_PHY_N(0x18F) /* TX filter 20 coeff stage 1 B1 */

Definition at line 539 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S1B2 B43_PHY_N(0x190) /* TX filter 20 coeff stage 1 B2 */

Definition at line 540 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S1B3 B43_PHY_N(0x191) /* TX filter 20 coeff stage 1 B3 */

Definition at line 541 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S2A1 B43_PHY_N(0x18A) /* TX filter 20 coeff stage 2 A1 */

Definition at line 534 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S2A2 B43_PHY_N(0x18B) /* TX filter 20 coeff stage 2 A2 */

Definition at line 535 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S2B1 B43_PHY_N(0x192) /* TX filter 20 coeff stage 2 B1 */

Definition at line 542 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S2B2 B43_PHY_N(0x193) /* TX filter 20 coeff stage 2 B2 */

Definition at line 543 of file phy_n.h.

#define B43_NPHY_TXF_20CO_S2B3 B43_PHY_N(0x194) /* TX filter 20 coeff stage 2 B3 */

Definition at line 544 of file phy_n.h.

#define B43_NPHY_TXF_40CO_AS0 B43_PHY_N(0x0E1) /* TX filter 40 coeff A stage 0 */

Definition at line 352 of file phy_n.h.

#define B43_NPHY_TXF_40CO_AS1 B43_PHY_N(0x0E2) /* TX filter 40 coeff A stage 1 */

Definition at line 353 of file phy_n.h.

#define B43_NPHY_TXF_40CO_AS2 B43_PHY_N(0x0E3) /* TX filter 40 coeff A stage 2 */

Definition at line 354 of file phy_n.h.

#define B43_NPHY_TXF_40CO_B1S0 B43_PHY_N(0x0E5) /* TX filter 40 coeff B1 stage 0 */

Definition at line 356 of file phy_n.h.

#define B43_NPHY_TXF_40CO_B1S1 B43_PHY_N(0x0E7) /* TX filter 40 coeff B1 stage 1 */

Definition at line 358 of file phy_n.h.

#define B43_NPHY_TXF_40CO_B1S2 B43_PHY_N(0x0E9) /* TX filter 40 coeff B1 stage 2 */

Definition at line 360 of file phy_n.h.

#define B43_NPHY_TXF_40CO_B32S0 B43_PHY_N(0x0E4) /* TX filter 40 coeff B32 stage 0 */

Definition at line 355 of file phy_n.h.

#define B43_NPHY_TXF_40CO_B32S1 B43_PHY_N(0x0E6) /* TX filter 40 coeff B32 stage 1 */

Definition at line 357 of file phy_n.h.

#define B43_NPHY_TXF_40CO_B32S2 B43_PHY_N(0x0E8) /* TX filter 40 coeff B32 stage 2 */

Definition at line 359 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S0A1 B43_PHY_N(0x195) /* TX filter 40 coeff stage 0 A1 */

Definition at line 545 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S0A2 B43_PHY_N(0x196) /* TX filter 40 coeff stage 0 A2 */

Definition at line 546 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S0B1 B43_PHY_N(0x19B) /* TX filter 40 coeff stage 0 B1 */

Definition at line 551 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S0B2 B43_PHY_N(0x19C) /* TX filter 40 coeff stage 0 B2 */

Definition at line 552 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S0B3 B43_PHY_N(0x19D) /* TX filter 40 coeff stage 0 B3 */

Definition at line 553 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S1A1 B43_PHY_N(0x197) /* TX filter 40 coeff stage 1 A1 */

Definition at line 547 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S1A2 B43_PHY_N(0x198) /* TX filter 40 coeff stage 1 A2 */

Definition at line 548 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S1B1 B43_PHY_N(0x19E) /* TX filter 40 coeff stage 1 B1 */

Definition at line 554 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S1B2 B43_PHY_N(0x19F) /* TX filter 40 coeff stage 1 B2 */

Definition at line 555 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S1B3 B43_PHY_N(0x1A0) /* TX filter 40 coeff stage 1 B3 */

Definition at line 556 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S2A1 B43_PHY_N(0x199) /* TX filter 40 coeff stage 2 A1 */

Definition at line 549 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S2A2 B43_PHY_N(0x19A) /* TX filter 40 coeff stage 2 A2 */

Definition at line 550 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S2B1 B43_PHY_N(0x1A1) /* TX filter 40 coeff stage 2 B1 */

Definition at line 557 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S2B2 B43_PHY_N(0x1A2) /* TX filter 40 coeff stage 2 B2 */

Definition at line 558 of file phy_n.h.

#define B43_NPHY_TXF_40CO_S2B3 B43_PHY_N(0x1A3) /* TX filter 40 coeff stage 2 B3 */

Definition at line 559 of file phy_n.h.

#define B43_NPHY_TXFRAMEDELAY B43_PHY_N(0x0B5) /* TX frame delay */

Definition at line 299 of file phy_n.h.

#define B43_NPHY_TXMACDELAY B43_PHY_N(0x0B4) /* TX MAC delay */

Definition at line 298 of file phy_n.h.

#define B43_NPHY_TXMACIF_HOLDOFF B43_PHY_N(0x077) /* TX MAC IF Hold off */

Definition at line 176 of file phy_n.h.

#define B43_NPHY_TXPCTL_BIDX B43_PHY_N(0x1EB) /* TX power control base index */

Definition at line 643 of file phy_n.h.

#define B43_NPHY_TXPCTL_BIDX_0 0x007F /* uC base index 0 */

Definition at line 644 of file phy_n.h.

#define B43_NPHY_TXPCTL_BIDX_0_SHIFT 0

Definition at line 645 of file phy_n.h.

#define B43_NPHY_TXPCTL_BIDX_1 0x7F00 /* uC base index 1 */

Definition at line 646 of file phy_n.h.

#define B43_NPHY_TXPCTL_BIDX_1_SHIFT 8

Definition at line 647 of file phy_n.h.

#define B43_NPHY_TXPCTL_BIDX_LOAD 0x8000 /* Load base index */

Definition at line 648 of file phy_n.h.

#define B43_NPHY_TXPCTL_CMD B43_PHY_N(0x1E7) /* TX power control command */

Definition at line 621 of file phy_n.h.

#define B43_NPHY_TXPCTL_CMD_COEFF 0x2000 /* Power control coefficients */

Definition at line 624 of file phy_n.h.

#define B43_NPHY_TXPCTL_CMD_HWPCTLEN 0x4000 /* Hardware TX power control enable */

Definition at line 625 of file phy_n.h.

#define B43_NPHY_TXPCTL_CMD_INIT 0x007F /* Init */

Definition at line 622 of file phy_n.h.

#define B43_NPHY_TXPCTL_CMD_INIT_SHIFT 0

Definition at line 623 of file phy_n.h.

#define B43_NPHY_TXPCTL_CMD_PCTLEN 0x8000 /* TX power control enable */

Definition at line 626 of file phy_n.h.

#define B43_NPHY_TXPCTL_INIT B43_PHY_N(0x222) /* TX power control init */

Definition at line 706 of file phy_n.h.

#define B43_NPHY_TXPCTL_INIT_PIDXI1 0x00FF /* Power index init 1 */

Definition at line 707 of file phy_n.h.

#define B43_NPHY_TXPCTL_INIT_PIDXI1_SHIFT 0

Definition at line 708 of file phy_n.h.

#define B43_NPHY_TXPCTL_ITSSI B43_PHY_N(0x1E9) /* TX power control idle TSSI */

Definition at line 632 of file phy_n.h.

#define B43_NPHY_TXPCTL_ITSSI_0 0x003F /* Idle TSSI 0 */

Definition at line 633 of file phy_n.h.

#define B43_NPHY_TXPCTL_ITSSI_0_SHIFT 0

Definition at line 634 of file phy_n.h.

#define B43_NPHY_TXPCTL_ITSSI_1 0x3F00 /* Idle TSSI 1 */

Definition at line 635 of file phy_n.h.

#define B43_NPHY_TXPCTL_ITSSI_1_SHIFT 8

Definition at line 636 of file phy_n.h.

#define B43_NPHY_TXPCTL_ITSSI_BINF 0x8000 /* Raw TSSI offset bin format */

Definition at line 637 of file phy_n.h.

#define B43_NPHY_TXPCTL_N B43_PHY_N(0x1E8) /* TX power control N num */

Definition at line 627 of file phy_n.h.

#define B43_NPHY_TXPCTL_N_NPTIL2 0x0700 /* N PT integer log2 */

Definition at line 630 of file phy_n.h.

#define B43_NPHY_TXPCTL_N_NPTIL2_SHIFT 8

Definition at line 631 of file phy_n.h.

#define B43_NPHY_TXPCTL_N_TSSID 0x00FF /* N TSSI delay */

Definition at line 628 of file phy_n.h.

#define B43_NPHY_TXPCTL_N_TSSID_SHIFT 0

Definition at line 629 of file phy_n.h.

#define B43_NPHY_TXPCTL_PIDX B43_PHY_N(0x1EC) /* TX power control power index */

Definition at line 649 of file phy_n.h.

#define B43_NPHY_TXPCTL_PIDX_0 0x007F /* uC power index 0 */

Definition at line 650 of file phy_n.h.

#define B43_NPHY_TXPCTL_PIDX_0_SHIFT 0

Definition at line 651 of file phy_n.h.

#define B43_NPHY_TXPCTL_PIDX_1 0x7F00 /* uC power index 1 */

Definition at line 652 of file phy_n.h.

#define B43_NPHY_TXPCTL_PIDX_1_SHIFT 8

Definition at line 653 of file phy_n.h.

#define B43_NPHY_TXPCTL_STAT_BIDX 0x7F00 /* Base index */

Definition at line 658 of file phy_n.h.

#define B43_NPHY_TXPCTL_STAT_BIDX_SHIFT 8

Definition at line 659 of file phy_n.h.

#define B43_NPHY_TXPCTL_STAT_EST 0x00FF /* Estimated power */

Definition at line 656 of file phy_n.h.

#define B43_NPHY_TXPCTL_STAT_EST_SHIFT 0

Definition at line 657 of file phy_n.h.

#define B43_NPHY_TXPCTL_STAT_ESTVALID 0x8000 /* Estimated power valid */

Definition at line 660 of file phy_n.h.

#define B43_NPHY_TXPCTL_TPWR B43_PHY_N(0x1EA) /* TX power control target power */

Definition at line 638 of file phy_n.h.

#define B43_NPHY_TXPCTL_TPWR_0 0x00FF /* Power 0 */

Definition at line 639 of file phy_n.h.

#define B43_NPHY_TXPCTL_TPWR_0_SHIFT 0

Definition at line 640 of file phy_n.h.

#define B43_NPHY_TXPCTL_TPWR_1 0xFF00 /* Power 1 */

Definition at line 641 of file phy_n.h.

#define B43_NPHY_TXPCTL_TPWR_1_SHIFT 8

Definition at line 642 of file phy_n.h.

#define B43_NPHY_TXREALFD B43_PHY_N(0x20D) /* TX real frame delay */

Definition at line 691 of file phy_n.h.

#define B43_NPHY_TXRIFS_FRDEL B43_PHY_N(0x1FF) /* TX RIFS frame delay */

Definition at line 677 of file phy_n.h.

#define B43_NPHY_TXSERFLD B43_PHY_N(0x0D6) /* TX service field */

Definition at line 338 of file phy_n.h.

#define B43_NPHY_TXTAILCNT B43_PHY_N(0x0BD) /* TX tail count value */

Definition at line 307 of file phy_n.h.

#define B43_NPHY_VLD_DTDAT B43_PHY_N(0x15A) /* VLD data tones data */

Definition at line 490 of file phy_n.h.

#define B43_NPHY_VLD_DTSIG B43_PHY_N(0x159) /* VLD data tones sig */

Definition at line 489 of file phy_n.h.

#define B43_NPHY_W1CLIP1_DWELL_LEN B43_PHY_N(0x06D) /* W1 clip1 dwell length */

Definition at line 166 of file phy_n.h.

#define B43_NPHY_W1CLIP2_DWELL_LEN B43_PHY_N(0x06E) /* W1 clip2 dwell length */

Definition at line 167 of file phy_n.h.

#define B43_NPHY_W2CLIP1_DWELL_LEN B43_PHY_N(0x06F) /* W2 clip1 dwell length */

Definition at line 168 of file phy_n.h.

#define B43_NPHY_WWISE_20NCYCDAT B43_PHY_N(0x0B8) /* WWiSE 20 N cyc data */

Definition at line 302 of file phy_n.h.

#define B43_NPHY_WWISE_40NCYCDAT B43_PHY_N(0x0B9) /* WWiSE 40 N cyc data */

Definition at line 303 of file phy_n.h.

#define B43_NPHY_WWISE_CRCM0 B43_PHY_N(0x175) /* WWiSE CRC mask 0 */

Definition at line 513 of file phy_n.h.

#define B43_NPHY_WWISE_CRCM1 B43_PHY_N(0x176) /* WWiSE CRC mask 1 */

Definition at line 514 of file phy_n.h.

#define B43_NPHY_WWISE_CRCM2 B43_PHY_N(0x177) /* WWiSE CRC mask 2 */

Definition at line 515 of file phy_n.h.

#define B43_NPHY_WWISE_CRCM3 B43_PHY_N(0x178) /* WWiSE CRC mask 3 */

Definition at line 516 of file phy_n.h.

#define B43_NPHY_WWISE_CRCM4 B43_PHY_N(0x179) /* WWiSE CRC mask 4 */

Definition at line 517 of file phy_n.h.

#define B43_NPHY_WWISE_LENIDX B43_PHY_N(0x075) /* WWiSE length index */

Definition at line 174 of file phy_n.h.

#define B43_PHY_B_BBCFG B43_PHY_N_BMODE(0x001) /* BB config */

Definition at line 714 of file phy_n.h.

#define B43_PHY_B_TEST B43_PHY_N_BMODE(0x00A)

Definition at line 715 of file phy_n.h.

Enumeration Type Documentation

enum b43_nphy_spur_avoid

Enumerator:

B43_SPUR_AVOID_DISABLE
B43_SPUR_AVOID_AUTO
B43_SPUR_AVOID_FORCE

Definition at line 719 of file phy_n.h.

Variable Documentation

struct b43_phy_operations b43_phyops_n

Definition at line 5554 of file phy_n.c.

Data Structures

Macros

Enumerations

Variables

Macro Definition Documentation

Enumeration Type Documentation

Variable Documentation