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Enumerations | Functions
pinctrl-imx51.c File Reference
#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/pinctrl.h>
#include "pinctrl-imx.h"

Go to the source code of this file.

Enumerations

enum  imx51_pads {
  MX51_PAD_EIM_D16 = 0, MX51_PAD_EIM_D17 = 1, MX51_PAD_EIM_D18 = 2, MX51_PAD_EIM_D19 = 3,
  MX51_PAD_EIM_D20 = 4, MX51_PAD_EIM_D21 = 5, MX51_PAD_EIM_D22 = 6, MX51_PAD_EIM_D23 = 7,
  MX51_PAD_EIM_D24 = 8, MX51_PAD_EIM_D25 = 9, MX51_PAD_EIM_D26 = 10, MX51_PAD_EIM_D27 = 11,
  MX51_PAD_EIM_D28 = 12, MX51_PAD_EIM_D29 = 13, MX51_PAD_EIM_D30 = 14, MX51_PAD_EIM_D31 = 15,
  MX51_PAD_EIM_A16 = 16, MX51_PAD_EIM_A17 = 17, MX51_PAD_EIM_A18 = 18, MX51_PAD_EIM_A19 = 19,
  MX51_PAD_EIM_A20 = 20, MX51_PAD_EIM_A21 = 21, MX51_PAD_EIM_A22 = 22, MX51_PAD_EIM_A23 = 23,
  MX51_PAD_EIM_A24 = 24, MX51_PAD_EIM_A25 = 25, MX51_PAD_EIM_A26 = 26, MX51_PAD_EIM_A27 = 27,
  MX51_PAD_EIM_EB0 = 28, MX51_PAD_EIM_EB1 = 29, MX51_PAD_EIM_EB2 = 30, MX51_PAD_EIM_EB3 = 31,
  MX51_PAD_EIM_OE = 32, MX51_PAD_EIM_CS0 = 33, MX51_PAD_EIM_CS1 = 34, MX51_PAD_EIM_CS2 = 35,
  MX51_PAD_EIM_CS3 = 36, MX51_PAD_EIM_CS4 = 37, MX51_PAD_EIM_CS5 = 38, MX51_PAD_EIM_DTACK = 39,
  MX51_PAD_EIM_LBA = 40, MX51_PAD_EIM_CRE = 41, MX51_PAD_DRAM_CS1 = 42, MX51_PAD_NANDF_WE_B = 43,
  MX51_PAD_NANDF_RE_B = 44, MX51_PAD_NANDF_ALE = 45, MX51_PAD_NANDF_CLE = 46, MX51_PAD_NANDF_WP_B = 47,
  MX51_PAD_NANDF_RB0 = 48, MX51_PAD_NANDF_RB1 = 49, MX51_PAD_NANDF_RB2 = 50, MX51_PAD_NANDF_RB3 = 51,
  MX51_PAD_GPIO_NAND = 52, MX51_PAD_NANDF_CS0 = 53, MX51_PAD_NANDF_CS1 = 54, MX51_PAD_NANDF_CS2 = 55,
  MX51_PAD_NANDF_CS3 = 56, MX51_PAD_NANDF_CS4 = 57, MX51_PAD_NANDF_CS5 = 58, MX51_PAD_NANDF_CS6 = 59,
  MX51_PAD_NANDF_CS7 = 60, MX51_PAD_NANDF_RDY_INT = 61, MX51_PAD_NANDF_D15 = 62, MX51_PAD_NANDF_D14 = 63,
  MX51_PAD_NANDF_D13 = 64, MX51_PAD_NANDF_D12 = 65, MX51_PAD_NANDF_D11 = 66, MX51_PAD_NANDF_D10 = 67,
  MX51_PAD_NANDF_D9 = 68, MX51_PAD_NANDF_D8 = 69, MX51_PAD_NANDF_D7 = 70, MX51_PAD_NANDF_D6 = 71,
  MX51_PAD_NANDF_D5 = 72, MX51_PAD_NANDF_D4 = 73, MX51_PAD_NANDF_D3 = 74, MX51_PAD_NANDF_D2 = 75,
  MX51_PAD_NANDF_D1 = 76, MX51_PAD_NANDF_D0 = 77, MX51_PAD_CSI1_D8 = 78, MX51_PAD_CSI1_D9 = 79,
  MX51_PAD_CSI1_D10 = 80, MX51_PAD_CSI1_D11 = 81, MX51_PAD_CSI1_D12 = 82, MX51_PAD_CSI1_D13 = 83,
  MX51_PAD_CSI1_D14 = 84, MX51_PAD_CSI1_D15 = 85, MX51_PAD_CSI1_D16 = 86, MX51_PAD_CSI1_D17 = 87,
  MX51_PAD_CSI1_D18 = 88, MX51_PAD_CSI1_D19 = 89, MX51_PAD_CSI1_VSYNC = 90, MX51_PAD_CSI1_HSYNC = 91,
  MX51_PAD_CSI1_PIXCLK = 92, MX51_PAD_CSI1_MCLK = 93, MX51_PAD_CSI2_D12 = 94, MX51_PAD_CSI2_D13 = 95,
  MX51_PAD_CSI2_D14 = 96, MX51_PAD_CSI2_D15 = 97, MX51_PAD_CSI2_D16 = 98, MX51_PAD_CSI2_D17 = 99,
  MX51_PAD_CSI2_D18 = 100, MX51_PAD_CSI2_D19 = 101, MX51_PAD_CSI2_VSYNC = 102, MX51_PAD_CSI2_HSYNC = 103,
  MX51_PAD_CSI2_PIXCLK = 104, MX51_PAD_I2C1_CLK = 105, MX51_PAD_I2C1_DAT = 106, MX51_PAD_AUD3_BB_TXD = 107,
  MX51_PAD_AUD3_BB_RXD = 108, MX51_PAD_AUD3_BB_CK = 109, MX51_PAD_AUD3_BB_FS = 110, MX51_PAD_CSPI1_MOSI = 111,
  MX51_PAD_CSPI1_MISO = 112, MX51_PAD_CSPI1_SS0 = 113, MX51_PAD_CSPI1_SS1 = 114, MX51_PAD_CSPI1_RDY = 115,
  MX51_PAD_CSPI1_SCLK = 116, MX51_PAD_UART1_RXD = 117, MX51_PAD_UART1_TXD = 118, MX51_PAD_UART1_RTS = 119,
  MX51_PAD_UART1_CTS = 120, MX51_PAD_UART2_RXD = 121, MX51_PAD_UART2_TXD = 122, MX51_PAD_UART3_RXD = 123,
  MX51_PAD_UART3_TXD = 124, MX51_PAD_OWIRE_LINE = 125, MX51_PAD_KEY_ROW0 = 126, MX51_PAD_KEY_ROW1 = 127,
  MX51_PAD_KEY_ROW2 = 128, MX51_PAD_KEY_ROW3 = 129, MX51_PAD_KEY_COL0 = 130, MX51_PAD_KEY_COL1 = 131,
  MX51_PAD_KEY_COL2 = 132, MX51_PAD_KEY_COL3 = 133, MX51_PAD_KEY_COL4 = 134, MX51_PAD_KEY_COL5 = 135,
  MX51_PAD_USBH1_CLK = 136, MX51_PAD_USBH1_DIR = 137, MX51_PAD_USBH1_STP = 138, MX51_PAD_USBH1_NXT = 139,
  MX51_PAD_USBH1_DATA0 = 140, MX51_PAD_USBH1_DATA1 = 141, MX51_PAD_USBH1_DATA2 = 142, MX51_PAD_USBH1_DATA3 = 143,
  MX51_PAD_USBH1_DATA4 = 144, MX51_PAD_USBH1_DATA5 = 145, MX51_PAD_USBH1_DATA6 = 146, MX51_PAD_USBH1_DATA7 = 147,
  MX51_PAD_DI1_PIN11 = 148, MX51_PAD_DI1_PIN12 = 149, MX51_PAD_DI1_PIN13 = 150, MX51_PAD_DI1_D0_CS = 151,
  MX51_PAD_DI1_D1_CS = 152, MX51_PAD_DISPB2_SER_DIN = 153, MX51_PAD_DISPB2_SER_DIO = 154, MX51_PAD_DISPB2_SER_CLK = 155,
  MX51_PAD_DISPB2_SER_RS = 156, MX51_PAD_DISP1_DAT0 = 157, MX51_PAD_DISP1_DAT1 = 158, MX51_PAD_DISP1_DAT2 = 159,
  MX51_PAD_DISP1_DAT3 = 160, MX51_PAD_DISP1_DAT4 = 161, MX51_PAD_DISP1_DAT5 = 162, MX51_PAD_DISP1_DAT6 = 163,
  MX51_PAD_DISP1_DAT7 = 164, MX51_PAD_DISP1_DAT8 = 165, MX51_PAD_DISP1_DAT9 = 166, MX51_PAD_DISP1_DAT10 = 167,
  MX51_PAD_DISP1_DAT11 = 168, MX51_PAD_DISP1_DAT12 = 169, MX51_PAD_DISP1_DAT13 = 170, MX51_PAD_DISP1_DAT14 = 171,
  MX51_PAD_DISP1_DAT15 = 172, MX51_PAD_DISP1_DAT16 = 173, MX51_PAD_DISP1_DAT17 = 174, MX51_PAD_DISP1_DAT18 = 175,
  MX51_PAD_DISP1_DAT19 = 176, MX51_PAD_DISP1_DAT20 = 177, MX51_PAD_DISP1_DAT21 = 178, MX51_PAD_DISP1_DAT22 = 179,
  MX51_PAD_DISP1_DAT23 = 180, MX51_PAD_DI1_PIN3 = 181, MX51_PAD_DI1_PIN2 = 182, MX51_PAD_DI_GP2 = 183,
  MX51_PAD_DI_GP3 = 184, MX51_PAD_DI2_PIN4 = 185, MX51_PAD_DI2_PIN2 = 186, MX51_PAD_DI2_PIN3 = 187,
  MX51_PAD_DI2_DISP_CLK = 188, MX51_PAD_DI_GP4 = 189, MX51_PAD_DISP2_DAT0 = 190, MX51_PAD_DISP2_DAT1 = 191,
  MX51_PAD_DISP2_DAT2 = 192, MX51_PAD_DISP2_DAT3 = 193, MX51_PAD_DISP2_DAT4 = 194, MX51_PAD_DISP2_DAT5 = 195,
  MX51_PAD_DISP2_DAT6 = 196, MX51_PAD_DISP2_DAT7 = 197, MX51_PAD_DISP2_DAT8 = 198, MX51_PAD_DISP2_DAT9 = 199,
  MX51_PAD_DISP2_DAT10 = 200, MX51_PAD_DISP2_DAT11 = 201, MX51_PAD_DISP2_DAT12 = 202, MX51_PAD_DISP2_DAT13 = 203,
  MX51_PAD_DISP2_DAT14 = 204, MX51_PAD_DISP2_DAT15 = 205, MX51_PAD_SD1_CMD = 206, MX51_PAD_SD1_CLK = 207,
  MX51_PAD_SD1_DATA0 = 208, MX51_PAD_EIM_DA0 = 209, MX51_PAD_EIM_DA1 = 210, MX51_PAD_EIM_DA2 = 211,
  MX51_PAD_EIM_DA3 = 212, MX51_PAD_SD1_DATA1 = 213, MX51_PAD_EIM_DA4 = 214, MX51_PAD_EIM_DA5 = 215,
  MX51_PAD_EIM_DA6 = 216, MX51_PAD_EIM_DA7 = 217, MX51_PAD_SD1_DATA2 = 218, MX51_PAD_EIM_DA10 = 219,
  MX51_PAD_EIM_DA11 = 220, MX51_PAD_EIM_DA8 = 221, MX51_PAD_EIM_DA9 = 222, MX51_PAD_SD1_DATA3 = 223,
  MX51_PAD_GPIO1_0 = 224, MX51_PAD_GPIO1_1 = 225, MX51_PAD_EIM_DA12 = 226, MX51_PAD_EIM_DA13 = 227,
  MX51_PAD_EIM_DA14 = 228, MX51_PAD_EIM_DA15 = 229, MX51_PAD_SD2_CMD = 230, MX51_PAD_SD2_CLK = 231,
  MX51_PAD_SD2_DATA0 = 232, MX51_PAD_SD2_DATA1 = 233, MX51_PAD_SD2_DATA2 = 234, MX51_PAD_SD2_DATA3 = 235,
  MX51_PAD_GPIO1_2 = 236, MX51_PAD_GPIO1_3 = 237, MX51_PAD_PMIC_INT_REQ = 238, MX51_PAD_GPIO1_4 = 239,
  MX51_PAD_GPIO1_5 = 240, MX51_PAD_GPIO1_6 = 241, MX51_PAD_GPIO1_7 = 242, MX51_PAD_GPIO1_8 = 243,
  MX51_PAD_GPIO1_9 = 244
}
 

Functions

 arch_initcall (imx51_pinctrl_init)
 
 module_exit (imx51_pinctrl_exit)
 
 MODULE_AUTHOR ("Dong Aisheng <[email protected]>")
 
 MODULE_DESCRIPTION ("Freescale IMX51 pinctrl driver")
 
 MODULE_LICENSE ("GPL v2")
 

Enumeration Type Documentation

enum imx51_pads
Enumerator:
MX51_PAD_EIM_D16 
MX51_PAD_EIM_D17 
MX51_PAD_EIM_D18 
MX51_PAD_EIM_D19 
MX51_PAD_EIM_D20 
MX51_PAD_EIM_D21 
MX51_PAD_EIM_D22 
MX51_PAD_EIM_D23 
MX51_PAD_EIM_D24 
MX51_PAD_EIM_D25 
MX51_PAD_EIM_D26 
MX51_PAD_EIM_D27 
MX51_PAD_EIM_D28 
MX51_PAD_EIM_D29 
MX51_PAD_EIM_D30 
MX51_PAD_EIM_D31 
MX51_PAD_EIM_A16 
MX51_PAD_EIM_A17 
MX51_PAD_EIM_A18 
MX51_PAD_EIM_A19 
MX51_PAD_EIM_A20 
MX51_PAD_EIM_A21 
MX51_PAD_EIM_A22 
MX51_PAD_EIM_A23 
MX51_PAD_EIM_A24 
MX51_PAD_EIM_A25 
MX51_PAD_EIM_A26 
MX51_PAD_EIM_A27 
MX51_PAD_EIM_EB0 
MX51_PAD_EIM_EB1 
MX51_PAD_EIM_EB2 
MX51_PAD_EIM_EB3 
MX51_PAD_EIM_OE 
MX51_PAD_EIM_CS0 
MX51_PAD_EIM_CS1 
MX51_PAD_EIM_CS2 
MX51_PAD_EIM_CS3 
MX51_PAD_EIM_CS4 
MX51_PAD_EIM_CS5 
MX51_PAD_EIM_DTACK 
MX51_PAD_EIM_LBA 
MX51_PAD_EIM_CRE 
MX51_PAD_DRAM_CS1 
MX51_PAD_NANDF_WE_B 
MX51_PAD_NANDF_RE_B 
MX51_PAD_NANDF_ALE 
MX51_PAD_NANDF_CLE 
MX51_PAD_NANDF_WP_B 
MX51_PAD_NANDF_RB0 
MX51_PAD_NANDF_RB1 
MX51_PAD_NANDF_RB2 
MX51_PAD_NANDF_RB3 
MX51_PAD_GPIO_NAND 
MX51_PAD_NANDF_CS0 
MX51_PAD_NANDF_CS1 
MX51_PAD_NANDF_CS2 
MX51_PAD_NANDF_CS3 
MX51_PAD_NANDF_CS4 
MX51_PAD_NANDF_CS5 
MX51_PAD_NANDF_CS6 
MX51_PAD_NANDF_CS7 
MX51_PAD_NANDF_RDY_INT 
MX51_PAD_NANDF_D15 
MX51_PAD_NANDF_D14 
MX51_PAD_NANDF_D13 
MX51_PAD_NANDF_D12 
MX51_PAD_NANDF_D11 
MX51_PAD_NANDF_D10 
MX51_PAD_NANDF_D9 
MX51_PAD_NANDF_D8 
MX51_PAD_NANDF_D7 
MX51_PAD_NANDF_D6 
MX51_PAD_NANDF_D5 
MX51_PAD_NANDF_D4 
MX51_PAD_NANDF_D3 
MX51_PAD_NANDF_D2 
MX51_PAD_NANDF_D1 
MX51_PAD_NANDF_D0 
MX51_PAD_CSI1_D8 
MX51_PAD_CSI1_D9 
MX51_PAD_CSI1_D10 
MX51_PAD_CSI1_D11 
MX51_PAD_CSI1_D12 
MX51_PAD_CSI1_D13 
MX51_PAD_CSI1_D14 
MX51_PAD_CSI1_D15 
MX51_PAD_CSI1_D16 
MX51_PAD_CSI1_D17 
MX51_PAD_CSI1_D18 
MX51_PAD_CSI1_D19 
MX51_PAD_CSI1_VSYNC 
MX51_PAD_CSI1_HSYNC 
MX51_PAD_CSI1_PIXCLK 
MX51_PAD_CSI1_MCLK 
MX51_PAD_CSI2_D12 
MX51_PAD_CSI2_D13 
MX51_PAD_CSI2_D14 
MX51_PAD_CSI2_D15 
MX51_PAD_CSI2_D16 
MX51_PAD_CSI2_D17 
MX51_PAD_CSI2_D18 
MX51_PAD_CSI2_D19 
MX51_PAD_CSI2_VSYNC 
MX51_PAD_CSI2_HSYNC 
MX51_PAD_CSI2_PIXCLK 
MX51_PAD_I2C1_CLK 
MX51_PAD_I2C1_DAT 
MX51_PAD_AUD3_BB_TXD 
MX51_PAD_AUD3_BB_RXD 
MX51_PAD_AUD3_BB_CK 
MX51_PAD_AUD3_BB_FS 
MX51_PAD_CSPI1_MOSI 
MX51_PAD_CSPI1_MISO 
MX51_PAD_CSPI1_SS0 
MX51_PAD_CSPI1_SS1 
MX51_PAD_CSPI1_RDY 
MX51_PAD_CSPI1_SCLK 
MX51_PAD_UART1_RXD 
MX51_PAD_UART1_TXD 
MX51_PAD_UART1_RTS 
MX51_PAD_UART1_CTS 
MX51_PAD_UART2_RXD 
MX51_PAD_UART2_TXD 
MX51_PAD_UART3_RXD 
MX51_PAD_UART3_TXD 
MX51_PAD_OWIRE_LINE 
MX51_PAD_KEY_ROW0 
MX51_PAD_KEY_ROW1 
MX51_PAD_KEY_ROW2 
MX51_PAD_KEY_ROW3 
MX51_PAD_KEY_COL0 
MX51_PAD_KEY_COL1 
MX51_PAD_KEY_COL2 
MX51_PAD_KEY_COL3 
MX51_PAD_KEY_COL4 
MX51_PAD_KEY_COL5 
MX51_PAD_USBH1_CLK 
MX51_PAD_USBH1_DIR 
MX51_PAD_USBH1_STP 
MX51_PAD_USBH1_NXT 
MX51_PAD_USBH1_DATA0 
MX51_PAD_USBH1_DATA1 
MX51_PAD_USBH1_DATA2 
MX51_PAD_USBH1_DATA3 
MX51_PAD_USBH1_DATA4 
MX51_PAD_USBH1_DATA5 
MX51_PAD_USBH1_DATA6 
MX51_PAD_USBH1_DATA7 
MX51_PAD_DI1_PIN11 
MX51_PAD_DI1_PIN12 
MX51_PAD_DI1_PIN13 
MX51_PAD_DI1_D0_CS 
MX51_PAD_DI1_D1_CS 
MX51_PAD_DISPB2_SER_DIN 
MX51_PAD_DISPB2_SER_DIO 
MX51_PAD_DISPB2_SER_CLK 
MX51_PAD_DISPB2_SER_RS 
MX51_PAD_DISP1_DAT0 
MX51_PAD_DISP1_DAT1 
MX51_PAD_DISP1_DAT2 
MX51_PAD_DISP1_DAT3 
MX51_PAD_DISP1_DAT4 
MX51_PAD_DISP1_DAT5 
MX51_PAD_DISP1_DAT6 
MX51_PAD_DISP1_DAT7 
MX51_PAD_DISP1_DAT8 
MX51_PAD_DISP1_DAT9 
MX51_PAD_DISP1_DAT10 
MX51_PAD_DISP1_DAT11 
MX51_PAD_DISP1_DAT12 
MX51_PAD_DISP1_DAT13 
MX51_PAD_DISP1_DAT14 
MX51_PAD_DISP1_DAT15 
MX51_PAD_DISP1_DAT16 
MX51_PAD_DISP1_DAT17 
MX51_PAD_DISP1_DAT18 
MX51_PAD_DISP1_DAT19 
MX51_PAD_DISP1_DAT20 
MX51_PAD_DISP1_DAT21 
MX51_PAD_DISP1_DAT22 
MX51_PAD_DISP1_DAT23 
MX51_PAD_DI1_PIN3 
MX51_PAD_DI1_PIN2 
MX51_PAD_DI_GP2 
MX51_PAD_DI_GP3 
MX51_PAD_DI2_PIN4 
MX51_PAD_DI2_PIN2 
MX51_PAD_DI2_PIN3 
MX51_PAD_DI2_DISP_CLK 
MX51_PAD_DI_GP4 
MX51_PAD_DISP2_DAT0 
MX51_PAD_DISP2_DAT1 
MX51_PAD_DISP2_DAT2 
MX51_PAD_DISP2_DAT3 
MX51_PAD_DISP2_DAT4 
MX51_PAD_DISP2_DAT5 
MX51_PAD_DISP2_DAT6 
MX51_PAD_DISP2_DAT7 
MX51_PAD_DISP2_DAT8 
MX51_PAD_DISP2_DAT9 
MX51_PAD_DISP2_DAT10 
MX51_PAD_DISP2_DAT11 
MX51_PAD_DISP2_DAT12 
MX51_PAD_DISP2_DAT13 
MX51_PAD_DISP2_DAT14 
MX51_PAD_DISP2_DAT15 
MX51_PAD_SD1_CMD 
MX51_PAD_SD1_CLK 
MX51_PAD_SD1_DATA0 
MX51_PAD_EIM_DA0 
MX51_PAD_EIM_DA1 
MX51_PAD_EIM_DA2 
MX51_PAD_EIM_DA3 
MX51_PAD_SD1_DATA1 
MX51_PAD_EIM_DA4 
MX51_PAD_EIM_DA5 
MX51_PAD_EIM_DA6 
MX51_PAD_EIM_DA7 
MX51_PAD_SD1_DATA2 
MX51_PAD_EIM_DA10 
MX51_PAD_EIM_DA11 
MX51_PAD_EIM_DA8 
MX51_PAD_EIM_DA9 
MX51_PAD_SD1_DATA3 
MX51_PAD_GPIO1_0 
MX51_PAD_GPIO1_1 
MX51_PAD_EIM_DA12 
MX51_PAD_EIM_DA13 
MX51_PAD_EIM_DA14 
MX51_PAD_EIM_DA15 
MX51_PAD_SD2_CMD 
MX51_PAD_SD2_CLK 
MX51_PAD_SD2_DATA0 
MX51_PAD_SD2_DATA1 
MX51_PAD_SD2_DATA2 
MX51_PAD_SD2_DATA3 
MX51_PAD_GPIO1_2 
MX51_PAD_GPIO1_3 
MX51_PAD_PMIC_INT_REQ 
MX51_PAD_GPIO1_4 
MX51_PAD_GPIO1_5 
MX51_PAD_GPIO1_6 
MX51_PAD_GPIO1_7 
MX51_PAD_GPIO1_8 
MX51_PAD_GPIO1_9 

Definition at line 25 of file pinctrl-imx51.c.

Function Documentation

arch_initcall ( imx51_pinctrl_init  )
MODULE_AUTHOR ( "Dong Aisheng <[email protected]>"  )
MODULE_DESCRIPTION ( "Freescale IMX51 pinctrl driver )
module_exit ( imx51_pinctrl_exit  )
MODULE_LICENSE ( "GPL v2 )