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pinctrl-nomadik-db8500.c
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1 #include <linux/kernel.h>
2 #include <linux/pinctrl/pinctrl.h>
3 #include "pinctrl-nomadik.h"
4 
5 /* All the pins that can be used for GPIO and some other functions */
6 #define _GPIO(offset) (offset)
7 
8 #define DB8500_PIN_AJ5 _GPIO(0)
9 #define DB8500_PIN_AJ3 _GPIO(1)
10 #define DB8500_PIN_AH4 _GPIO(2)
11 #define DB8500_PIN_AH3 _GPIO(3)
12 #define DB8500_PIN_AH6 _GPIO(4)
13 #define DB8500_PIN_AG6 _GPIO(5)
14 #define DB8500_PIN_AF6 _GPIO(6)
15 #define DB8500_PIN_AG5 _GPIO(7)
16 #define DB8500_PIN_AD5 _GPIO(8)
17 #define DB8500_PIN_AE4 _GPIO(9)
18 #define DB8500_PIN_AF5 _GPIO(10)
19 #define DB8500_PIN_AG4 _GPIO(11)
20 #define DB8500_PIN_AC4 _GPIO(12)
21 #define DB8500_PIN_AF3 _GPIO(13)
22 #define DB8500_PIN_AE3 _GPIO(14)
23 #define DB8500_PIN_AC3 _GPIO(15)
24 #define DB8500_PIN_AD3 _GPIO(16)
25 #define DB8500_PIN_AD4 _GPIO(17)
26 #define DB8500_PIN_AC2 _GPIO(18)
27 #define DB8500_PIN_AC1 _GPIO(19)
28 #define DB8500_PIN_AB4 _GPIO(20)
29 #define DB8500_PIN_AB3 _GPIO(21)
30 #define DB8500_PIN_AA3 _GPIO(22)
31 #define DB8500_PIN_AA4 _GPIO(23)
32 #define DB8500_PIN_AB2 _GPIO(24)
33 #define DB8500_PIN_Y4 _GPIO(25)
34 #define DB8500_PIN_Y2 _GPIO(26)
35 #define DB8500_PIN_AA2 _GPIO(27)
36 #define DB8500_PIN_AA1 _GPIO(28)
37 #define DB8500_PIN_W2 _GPIO(29)
38 #define DB8500_PIN_W3 _GPIO(30)
39 #define DB8500_PIN_V3 _GPIO(31)
40 #define DB8500_PIN_V2 _GPIO(32)
41 #define DB8500_PIN_AF2 _GPIO(33)
42 #define DB8500_PIN_AE1 _GPIO(34)
43 #define DB8500_PIN_AE2 _GPIO(35)
44 #define DB8500_PIN_AG2 _GPIO(36)
45 /* Hole */
46 #define DB8500_PIN_F3 _GPIO(64)
47 #define DB8500_PIN_F1 _GPIO(65)
48 #define DB8500_PIN_G3 _GPIO(66)
49 #define DB8500_PIN_G2 _GPIO(67)
50 #define DB8500_PIN_E1 _GPIO(68)
51 #define DB8500_PIN_E2 _GPIO(69)
52 #define DB8500_PIN_G5 _GPIO(70)
53 #define DB8500_PIN_G4 _GPIO(71)
54 #define DB8500_PIN_H4 _GPIO(72)
55 #define DB8500_PIN_H3 _GPIO(73)
56 #define DB8500_PIN_J3 _GPIO(74)
57 #define DB8500_PIN_H2 _GPIO(75)
58 #define DB8500_PIN_J2 _GPIO(76)
59 #define DB8500_PIN_H1 _GPIO(77)
60 #define DB8500_PIN_F4 _GPIO(78)
61 #define DB8500_PIN_E3 _GPIO(79)
62 #define DB8500_PIN_E4 _GPIO(80)
63 #define DB8500_PIN_D2 _GPIO(81)
64 #define DB8500_PIN_C1 _GPIO(82)
65 #define DB8500_PIN_D3 _GPIO(83)
66 #define DB8500_PIN_C2 _GPIO(84)
67 #define DB8500_PIN_D5 _GPIO(85)
68 #define DB8500_PIN_C6 _GPIO(86)
69 #define DB8500_PIN_B3 _GPIO(87)
70 #define DB8500_PIN_C4 _GPIO(88)
71 #define DB8500_PIN_E6 _GPIO(89)
72 #define DB8500_PIN_A3 _GPIO(90)
73 #define DB8500_PIN_B6 _GPIO(91)
74 #define DB8500_PIN_D6 _GPIO(92)
75 #define DB8500_PIN_B7 _GPIO(93)
76 #define DB8500_PIN_D7 _GPIO(94)
77 #define DB8500_PIN_E8 _GPIO(95)
78 #define DB8500_PIN_D8 _GPIO(96)
79 #define DB8500_PIN_D9 _GPIO(97)
80 /* Hole */
81 #define DB8500_PIN_A5 _GPIO(128)
82 #define DB8500_PIN_B4 _GPIO(129)
83 #define DB8500_PIN_C8 _GPIO(130)
84 #define DB8500_PIN_A12 _GPIO(131)
85 #define DB8500_PIN_C10 _GPIO(132)
86 #define DB8500_PIN_B10 _GPIO(133)
87 #define DB8500_PIN_B9 _GPIO(134)
88 #define DB8500_PIN_A9 _GPIO(135)
89 #define DB8500_PIN_C7 _GPIO(136)
90 #define DB8500_PIN_A7 _GPIO(137)
91 #define DB8500_PIN_C5 _GPIO(138)
92 #define DB8500_PIN_C9 _GPIO(139)
93 #define DB8500_PIN_B11 _GPIO(140)
94 #define DB8500_PIN_C12 _GPIO(141)
95 #define DB8500_PIN_C11 _GPIO(142)
96 #define DB8500_PIN_D12 _GPIO(143)
97 #define DB8500_PIN_B13 _GPIO(144)
98 #define DB8500_PIN_C13 _GPIO(145)
99 #define DB8500_PIN_D13 _GPIO(146)
100 #define DB8500_PIN_C15 _GPIO(147)
101 #define DB8500_PIN_B16 _GPIO(148)
102 #define DB8500_PIN_B14 _GPIO(149)
103 #define DB8500_PIN_C14 _GPIO(150)
104 #define DB8500_PIN_D17 _GPIO(151)
105 #define DB8500_PIN_D16 _GPIO(152)
106 #define DB8500_PIN_B17 _GPIO(153)
107 #define DB8500_PIN_C16 _GPIO(154)
108 #define DB8500_PIN_C19 _GPIO(155)
109 #define DB8500_PIN_C17 _GPIO(156)
110 #define DB8500_PIN_A18 _GPIO(157)
111 #define DB8500_PIN_C18 _GPIO(158)
112 #define DB8500_PIN_B19 _GPIO(159)
113 #define DB8500_PIN_B20 _GPIO(160)
114 #define DB8500_PIN_D21 _GPIO(161)
115 #define DB8500_PIN_D20 _GPIO(162)
116 #define DB8500_PIN_C20 _GPIO(163)
117 #define DB8500_PIN_B21 _GPIO(164)
118 #define DB8500_PIN_C21 _GPIO(165)
119 #define DB8500_PIN_A22 _GPIO(166)
120 #define DB8500_PIN_B24 _GPIO(167)
121 #define DB8500_PIN_C22 _GPIO(168)
122 #define DB8500_PIN_D22 _GPIO(169)
123 #define DB8500_PIN_C23 _GPIO(170)
124 #define DB8500_PIN_D23 _GPIO(171)
125 /* Hole */
126 #define DB8500_PIN_AJ27 _GPIO(192)
127 #define DB8500_PIN_AH27 _GPIO(193)
128 #define DB8500_PIN_AF27 _GPIO(194)
129 #define DB8500_PIN_AG28 _GPIO(195)
130 #define DB8500_PIN_AG26 _GPIO(196)
131 #define DB8500_PIN_AH24 _GPIO(197)
132 #define DB8500_PIN_AG25 _GPIO(198)
133 #define DB8500_PIN_AH23 _GPIO(199)
134 #define DB8500_PIN_AH26 _GPIO(200)
135 #define DB8500_PIN_AF24 _GPIO(201)
136 #define DB8500_PIN_AF25 _GPIO(202)
137 #define DB8500_PIN_AE23 _GPIO(203)
138 #define DB8500_PIN_AF23 _GPIO(204)
139 #define DB8500_PIN_AG23 _GPIO(205)
140 #define DB8500_PIN_AG24 _GPIO(206)
141 #define DB8500_PIN_AJ23 _GPIO(207)
142 #define DB8500_PIN_AH16 _GPIO(208)
143 #define DB8500_PIN_AG15 _GPIO(209)
144 #define DB8500_PIN_AJ15 _GPIO(210)
145 #define DB8500_PIN_AG14 _GPIO(211)
146 #define DB8500_PIN_AF13 _GPIO(212)
147 #define DB8500_PIN_AG13 _GPIO(213)
148 #define DB8500_PIN_AH15 _GPIO(214)
149 #define DB8500_PIN_AH13 _GPIO(215)
150 #define DB8500_PIN_AG12 _GPIO(216)
151 #define DB8500_PIN_AH12 _GPIO(217)
152 #define DB8500_PIN_AH11 _GPIO(218)
153 #define DB8500_PIN_AG10 _GPIO(219)
154 #define DB8500_PIN_AH10 _GPIO(220)
155 #define DB8500_PIN_AJ11 _GPIO(221)
156 #define DB8500_PIN_AJ9 _GPIO(222)
157 #define DB8500_PIN_AH9 _GPIO(223)
158 #define DB8500_PIN_AG9 _GPIO(224)
159 #define DB8500_PIN_AG8 _GPIO(225)
160 #define DB8500_PIN_AF8 _GPIO(226)
161 #define DB8500_PIN_AH7 _GPIO(227)
162 #define DB8500_PIN_AJ6 _GPIO(228)
163 #define DB8500_PIN_AG7 _GPIO(229)
164 #define DB8500_PIN_AF7 _GPIO(230)
165 /* Hole */
166 #define DB8500_PIN_AF28 _GPIO(256)
167 #define DB8500_PIN_AE29 _GPIO(257)
168 #define DB8500_PIN_AD29 _GPIO(258)
169 #define DB8500_PIN_AC29 _GPIO(259)
170 #define DB8500_PIN_AD28 _GPIO(260)
171 #define DB8500_PIN_AD26 _GPIO(261)
172 #define DB8500_PIN_AE26 _GPIO(262)
173 #define DB8500_PIN_AG29 _GPIO(263)
174 #define DB8500_PIN_AE27 _GPIO(264)
175 #define DB8500_PIN_AD27 _GPIO(265)
176 #define DB8500_PIN_AC28 _GPIO(266)
177 #define DB8500_PIN_AC27 _GPIO(267)
178 
179 /*
180  * The names of the pins are denoted by GPIO number and ball name, even
181  * though they can be used for other things than GPIO, this is the first
182  * column in the table of the data sheet and often used on schematics and
183  * such.
184  */
185 static const struct pinctrl_pin_desc nmk_db8500_pins[] = {
186  PINCTRL_PIN(DB8500_PIN_AJ5, "GPIO0_AJ5"),
187  PINCTRL_PIN(DB8500_PIN_AJ3, "GPIO1_AJ3"),
188  PINCTRL_PIN(DB8500_PIN_AH4, "GPIO2_AH4"),
189  PINCTRL_PIN(DB8500_PIN_AH3, "GPIO3_AH3"),
190  PINCTRL_PIN(DB8500_PIN_AH6, "GPIO4_AH6"),
191  PINCTRL_PIN(DB8500_PIN_AG6, "GPIO5_AG6"),
192  PINCTRL_PIN(DB8500_PIN_AF6, "GPIO6_AF6"),
193  PINCTRL_PIN(DB8500_PIN_AG5, "GPIO7_AG5"),
194  PINCTRL_PIN(DB8500_PIN_AD5, "GPIO8_AD5"),
195  PINCTRL_PIN(DB8500_PIN_AE4, "GPIO9_AE4"),
196  PINCTRL_PIN(DB8500_PIN_AF5, "GPIO10_AF5"),
197  PINCTRL_PIN(DB8500_PIN_AG4, "GPIO11_AG4"),
198  PINCTRL_PIN(DB8500_PIN_AC4, "GPIO12_AC4"),
199  PINCTRL_PIN(DB8500_PIN_AF3, "GPIO13_AF3"),
200  PINCTRL_PIN(DB8500_PIN_AE3, "GPIO14_AE3"),
201  PINCTRL_PIN(DB8500_PIN_AC3, "GPIO15_AC3"),
202  PINCTRL_PIN(DB8500_PIN_AD3, "GPIO16_AD3"),
203  PINCTRL_PIN(DB8500_PIN_AD4, "GPIO17_AD4"),
204  PINCTRL_PIN(DB8500_PIN_AC2, "GPIO18_AC2"),
205  PINCTRL_PIN(DB8500_PIN_AC1, "GPIO19_AC1"),
206  PINCTRL_PIN(DB8500_PIN_AB4, "GPIO20_AB4"),
207  PINCTRL_PIN(DB8500_PIN_AB3, "GPIO21_AB3"),
208  PINCTRL_PIN(DB8500_PIN_AA3, "GPIO22_AA3"),
209  PINCTRL_PIN(DB8500_PIN_AA4, "GPIO23_AA4"),
210  PINCTRL_PIN(DB8500_PIN_AB2, "GPIO24_AB2"),
211  PINCTRL_PIN(DB8500_PIN_Y4, "GPIO25_Y4"),
212  PINCTRL_PIN(DB8500_PIN_Y2, "GPIO26_Y2"),
213  PINCTRL_PIN(DB8500_PIN_AA2, "GPIO27_AA2"),
214  PINCTRL_PIN(DB8500_PIN_AA1, "GPIO28_AA1"),
215  PINCTRL_PIN(DB8500_PIN_W2, "GPIO29_W2"),
216  PINCTRL_PIN(DB8500_PIN_W3, "GPIO30_W3"),
217  PINCTRL_PIN(DB8500_PIN_V3, "GPIO31_V3"),
218  PINCTRL_PIN(DB8500_PIN_V2, "GPIO32_V2"),
219  PINCTRL_PIN(DB8500_PIN_AF2, "GPIO33_AF2"),
220  PINCTRL_PIN(DB8500_PIN_AE1, "GPIO34_AE1"),
221  PINCTRL_PIN(DB8500_PIN_AE2, "GPIO35_AE2"),
222  PINCTRL_PIN(DB8500_PIN_AG2, "GPIO36_AG2"),
223  /* Hole */
224  PINCTRL_PIN(DB8500_PIN_F3, "GPIO64_F3"),
225  PINCTRL_PIN(DB8500_PIN_F1, "GPIO65_F1"),
226  PINCTRL_PIN(DB8500_PIN_G3, "GPIO66_G3"),
227  PINCTRL_PIN(DB8500_PIN_G2, "GPIO67_G2"),
228  PINCTRL_PIN(DB8500_PIN_E1, "GPIO68_E1"),
229  PINCTRL_PIN(DB8500_PIN_E2, "GPIO69_E2"),
230  PINCTRL_PIN(DB8500_PIN_G5, "GPIO70_G5"),
231  PINCTRL_PIN(DB8500_PIN_G4, "GPIO71_G4"),
232  PINCTRL_PIN(DB8500_PIN_H4, "GPIO72_H4"),
233  PINCTRL_PIN(DB8500_PIN_H3, "GPIO73_H3"),
234  PINCTRL_PIN(DB8500_PIN_J3, "GPIO74_J3"),
235  PINCTRL_PIN(DB8500_PIN_H2, "GPIO75_H2"),
236  PINCTRL_PIN(DB8500_PIN_J2, "GPIO76_J2"),
237  PINCTRL_PIN(DB8500_PIN_H1, "GPIO77_H1"),
238  PINCTRL_PIN(DB8500_PIN_F4, "GPIO78_F4"),
239  PINCTRL_PIN(DB8500_PIN_E3, "GPIO79_E3"),
240  PINCTRL_PIN(DB8500_PIN_E4, "GPIO80_E4"),
241  PINCTRL_PIN(DB8500_PIN_D2, "GPIO81_D2"),
242  PINCTRL_PIN(DB8500_PIN_C1, "GPIO82_C1"),
243  PINCTRL_PIN(DB8500_PIN_D3, "GPIO83_D3"),
244  PINCTRL_PIN(DB8500_PIN_C2, "GPIO84_C2"),
245  PINCTRL_PIN(DB8500_PIN_D5, "GPIO85_D5"),
246  PINCTRL_PIN(DB8500_PIN_C6, "GPIO86_C6"),
247  PINCTRL_PIN(DB8500_PIN_B3, "GPIO87_B3"),
248  PINCTRL_PIN(DB8500_PIN_C4, "GPIO88_C4"),
249  PINCTRL_PIN(DB8500_PIN_E6, "GPIO89_E6"),
250  PINCTRL_PIN(DB8500_PIN_A3, "GPIO90_A3"),
251  PINCTRL_PIN(DB8500_PIN_B6, "GPIO91_B6"),
252  PINCTRL_PIN(DB8500_PIN_D6, "GPIO92_D6"),
253  PINCTRL_PIN(DB8500_PIN_B7, "GPIO93_B7"),
254  PINCTRL_PIN(DB8500_PIN_D7, "GPIO94_D7"),
255  PINCTRL_PIN(DB8500_PIN_E8, "GPIO95_E8"),
256  PINCTRL_PIN(DB8500_PIN_D8, "GPIO96_D8"),
257  PINCTRL_PIN(DB8500_PIN_D9, "GPIO97_D9"),
258  /* Hole */
259  PINCTRL_PIN(DB8500_PIN_A5, "GPIO128_A5"),
260  PINCTRL_PIN(DB8500_PIN_B4, "GPIO129_B4"),
261  PINCTRL_PIN(DB8500_PIN_C8, "GPIO130_C8"),
262  PINCTRL_PIN(DB8500_PIN_A12, "GPIO131_A12"),
263  PINCTRL_PIN(DB8500_PIN_C10, "GPIO132_C10"),
264  PINCTRL_PIN(DB8500_PIN_B10, "GPIO133_B10"),
265  PINCTRL_PIN(DB8500_PIN_B9, "GPIO134_B9"),
266  PINCTRL_PIN(DB8500_PIN_A9, "GPIO135_A9"),
267  PINCTRL_PIN(DB8500_PIN_C7, "GPIO136_C7"),
268  PINCTRL_PIN(DB8500_PIN_A7, "GPIO137_A7"),
269  PINCTRL_PIN(DB8500_PIN_C5, "GPIO138_C5"),
270  PINCTRL_PIN(DB8500_PIN_C9, "GPIO139_C9"),
271  PINCTRL_PIN(DB8500_PIN_B11, "GPIO140_B11"),
272  PINCTRL_PIN(DB8500_PIN_C12, "GPIO141_C12"),
273  PINCTRL_PIN(DB8500_PIN_C11, "GPIO142_C11"),
274  PINCTRL_PIN(DB8500_PIN_D12, "GPIO143_D12"),
275  PINCTRL_PIN(DB8500_PIN_B13, "GPIO144_B13"),
276  PINCTRL_PIN(DB8500_PIN_C13, "GPIO145_C13"),
277  PINCTRL_PIN(DB8500_PIN_D13, "GPIO146_D13"),
278  PINCTRL_PIN(DB8500_PIN_C15, "GPIO147_C15"),
279  PINCTRL_PIN(DB8500_PIN_B16, "GPIO148_B16"),
280  PINCTRL_PIN(DB8500_PIN_B14, "GPIO149_B14"),
281  PINCTRL_PIN(DB8500_PIN_C14, "GPIO150_C14"),
282  PINCTRL_PIN(DB8500_PIN_D17, "GPIO151_D17"),
283  PINCTRL_PIN(DB8500_PIN_D16, "GPIO152_D16"),
284  PINCTRL_PIN(DB8500_PIN_B17, "GPIO153_B17"),
285  PINCTRL_PIN(DB8500_PIN_C16, "GPIO154_C16"),
286  PINCTRL_PIN(DB8500_PIN_C19, "GPIO155_C19"),
287  PINCTRL_PIN(DB8500_PIN_C17, "GPIO156_C17"),
288  PINCTRL_PIN(DB8500_PIN_A18, "GPIO157_A18"),
289  PINCTRL_PIN(DB8500_PIN_C18, "GPIO158_C18"),
290  PINCTRL_PIN(DB8500_PIN_B19, "GPIO159_B19"),
291  PINCTRL_PIN(DB8500_PIN_B20, "GPIO160_B20"),
292  PINCTRL_PIN(DB8500_PIN_D21, "GPIO161_D21"),
293  PINCTRL_PIN(DB8500_PIN_D20, "GPIO162_D20"),
294  PINCTRL_PIN(DB8500_PIN_C20, "GPIO163_C20"),
295  PINCTRL_PIN(DB8500_PIN_B21, "GPIO164_B21"),
296  PINCTRL_PIN(DB8500_PIN_C21, "GPIO165_C21"),
297  PINCTRL_PIN(DB8500_PIN_A22, "GPIO166_A22"),
298  PINCTRL_PIN(DB8500_PIN_B24, "GPIO167_B24"),
299  PINCTRL_PIN(DB8500_PIN_C22, "GPIO168_C22"),
300  PINCTRL_PIN(DB8500_PIN_D22, "GPIO169_D22"),
301  PINCTRL_PIN(DB8500_PIN_C23, "GPIO170_C23"),
302  PINCTRL_PIN(DB8500_PIN_D23, "GPIO171_D23"),
303  /* Hole */
304  PINCTRL_PIN(DB8500_PIN_AJ27, "GPIO192_AJ27"),
305  PINCTRL_PIN(DB8500_PIN_AH27, "GPIO193_AH27"),
306  PINCTRL_PIN(DB8500_PIN_AF27, "GPIO194_AF27"),
307  PINCTRL_PIN(DB8500_PIN_AG28, "GPIO195_AG28"),
308  PINCTRL_PIN(DB8500_PIN_AG26, "GPIO196_AG26"),
309  PINCTRL_PIN(DB8500_PIN_AH24, "GPIO197_AH24"),
310  PINCTRL_PIN(DB8500_PIN_AG25, "GPIO198_AG25"),
311  PINCTRL_PIN(DB8500_PIN_AH23, "GPIO199_AH23"),
312  PINCTRL_PIN(DB8500_PIN_AH26, "GPIO200_AH26"),
313  PINCTRL_PIN(DB8500_PIN_AF24, "GPIO201_AF24"),
314  PINCTRL_PIN(DB8500_PIN_AF25, "GPIO202_AF25"),
315  PINCTRL_PIN(DB8500_PIN_AE23, "GPIO203_AE23"),
316  PINCTRL_PIN(DB8500_PIN_AF23, "GPIO204_AF23"),
317  PINCTRL_PIN(DB8500_PIN_AG23, "GPIO205_AG23"),
318  PINCTRL_PIN(DB8500_PIN_AG24, "GPIO206_AG24"),
319  PINCTRL_PIN(DB8500_PIN_AJ23, "GPIO207_AJ23"),
320  PINCTRL_PIN(DB8500_PIN_AH16, "GPIO208_AH16"),
321  PINCTRL_PIN(DB8500_PIN_AG15, "GPIO209_AG15"),
322  PINCTRL_PIN(DB8500_PIN_AJ15, "GPIO210_AJ15"),
323  PINCTRL_PIN(DB8500_PIN_AG14, "GPIO211_AG14"),
324  PINCTRL_PIN(DB8500_PIN_AF13, "GPIO212_AF13"),
325  PINCTRL_PIN(DB8500_PIN_AG13, "GPIO213_AG13"),
326  PINCTRL_PIN(DB8500_PIN_AH15, "GPIO214_AH15"),
327  PINCTRL_PIN(DB8500_PIN_AH13, "GPIO215_AH13"),
328  PINCTRL_PIN(DB8500_PIN_AG12, "GPIO216_AG12"),
329  PINCTRL_PIN(DB8500_PIN_AH12, "GPIO217_AH12"),
330  PINCTRL_PIN(DB8500_PIN_AH11, "GPIO218_AH11"),
331  PINCTRL_PIN(DB8500_PIN_AG10, "GPIO219_AG10"),
332  PINCTRL_PIN(DB8500_PIN_AH10, "GPIO220_AH10"),
333  PINCTRL_PIN(DB8500_PIN_AJ11, "GPIO221_AJ11"),
334  PINCTRL_PIN(DB8500_PIN_AJ9, "GPIO222_AJ9"),
335  PINCTRL_PIN(DB8500_PIN_AH9, "GPIO223_AH9"),
336  PINCTRL_PIN(DB8500_PIN_AG9, "GPIO224_AG9"),
337  PINCTRL_PIN(DB8500_PIN_AG8, "GPIO225_AG8"),
338  PINCTRL_PIN(DB8500_PIN_AF8, "GPIO226_AF8"),
339  PINCTRL_PIN(DB8500_PIN_AH7, "GPIO227_AH7"),
340  PINCTRL_PIN(DB8500_PIN_AJ6, "GPIO228_AJ6"),
341  PINCTRL_PIN(DB8500_PIN_AG7, "GPIO229_AG7"),
342  PINCTRL_PIN(DB8500_PIN_AF7, "GPIO230_AF7"),
343  /* Hole */
344  PINCTRL_PIN(DB8500_PIN_AF28, "GPIO256_AF28"),
345  PINCTRL_PIN(DB8500_PIN_AE29, "GPIO257_AE29"),
346  PINCTRL_PIN(DB8500_PIN_AD29, "GPIO258_AD29"),
347  PINCTRL_PIN(DB8500_PIN_AC29, "GPIO259_AC29"),
348  PINCTRL_PIN(DB8500_PIN_AD28, "GPIO260_AD28"),
349  PINCTRL_PIN(DB8500_PIN_AD26, "GPIO261_AD26"),
350  PINCTRL_PIN(DB8500_PIN_AE26, "GPIO262_AE26"),
351  PINCTRL_PIN(DB8500_PIN_AG29, "GPIO263_AG29"),
352  PINCTRL_PIN(DB8500_PIN_AE27, "GPIO264_AE27"),
353  PINCTRL_PIN(DB8500_PIN_AD27, "GPIO265_AD27"),
354  PINCTRL_PIN(DB8500_PIN_AC28, "GPIO266_AC28"),
355  PINCTRL_PIN(DB8500_PIN_AC27, "GPIO267_AC27"),
356 };
357 
358 #define DB8500_GPIO_RANGE(a, b, c) { .name = "DB8500", .id = a, .base = b, \
359  .pin_base = b, .npins = c }
360 
361 /*
362  * This matches the 32-pin gpio chips registered by the GPIO portion. This
363  * cannot be const since we assign the struct gpio_chip * pointer at runtime.
364  */
365 static struct pinctrl_gpio_range nmk_db8500_ranges[] = {
366  DB8500_GPIO_RANGE(0, 0, 32),
367  DB8500_GPIO_RANGE(1, 32, 5),
368  DB8500_GPIO_RANGE(2, 64, 32),
369  DB8500_GPIO_RANGE(3, 96, 2),
370  DB8500_GPIO_RANGE(4, 128, 32),
371  DB8500_GPIO_RANGE(5, 160, 12),
372  DB8500_GPIO_RANGE(6, 192, 32),
373  DB8500_GPIO_RANGE(7, 224, 7),
374  DB8500_GPIO_RANGE(8, 256, 12),
375 };
376 
377 /*
378  * Read the pin group names like this:
379  * u0_a_1 = first groups of pins for uart0 on alt function a
380  * i2c2_b_2 = second group of pins for i2c2 on alt function b
381  *
382  * The groups are arranged as sets per altfunction column, so we can
383  * mux in one group at a time by selecting the same altfunction for them
384  * all. When functions require pins on different altfunctions, you need
385  * to combine several groups.
386  */
387 
388 /* Altfunction A column */
389 static const unsigned u0_a_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
390  DB8500_PIN_AH4, DB8500_PIN_AH3 };
391 static const unsigned u1rxtx_a_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
392 static const unsigned u1ctsrts_a_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
393 /* Image processor I2C line, this is driven by image processor firmware */
394 static const unsigned ipi2c_a_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
395 static const unsigned ipi2c_a_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
396 /* MSP0 can only be on these pins, but TXD and RXD can be flipped */
397 static const unsigned msp0txrx_a_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
398 static const unsigned msp0tfstck_a_1_pins[] = { DB8500_PIN_AF3, DB8500_PIN_AE3 };
399 static const unsigned msp0rfsrck_a_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
400 /* Basic pins of the MMC/SD card 0 interface */
401 static const unsigned mc0_a_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
402  DB8500_PIN_AB4, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
403  DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
404 /* Often only 4 bits are used, then these are not needed (only used for MMC) */
405 static const unsigned mc0_dat47_a_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
406  DB8500_PIN_V3, DB8500_PIN_V2};
407 static const unsigned mc0dat31dir_a_1_pins[] = { DB8500_PIN_AB3 };
408 /* MSP1 can only be on these pins, but TXD and RXD can be flipped */
409 static const unsigned msp1txrx_a_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
410 static const unsigned msp1_a_1_pins[] = { DB8500_PIN_AE1, DB8500_PIN_AE2 };
411 /* LCD interface */
412 static const unsigned lcdb_a_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
413  DB8500_PIN_G3, DB8500_PIN_G2 };
414 static const unsigned lcdvsi0_a_1_pins[] = { DB8500_PIN_E1 };
415 static const unsigned lcdvsi1_a_1_pins[] = { DB8500_PIN_E2 };
416 static const unsigned lcd_d0_d7_a_1_pins[] = {
417  DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
418  DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1 };
419 /* D8 thru D11 often used as TVOUT lines */
420 static const unsigned lcd_d8_d11_a_1_pins[] = { DB8500_PIN_F4,
421  DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2 };
422 static const unsigned lcd_d12_d23_a_1_pins[] = {
423  DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5,
424  DB8500_PIN_C6, DB8500_PIN_B3, DB8500_PIN_C4, DB8500_PIN_E6,
425  DB8500_PIN_A3, DB8500_PIN_B6, DB8500_PIN_D6, DB8500_PIN_B7 };
426 static const unsigned kp_a_1_pins[] = { DB8500_PIN_D7, DB8500_PIN_E8,
427  DB8500_PIN_D8, DB8500_PIN_D9 };
428 static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 };
429 static const unsigned kp_a_2_pins[] = {
430  DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
431  DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
432  DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
433  DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
434 /* MC2 has 8 data lines and no direction control, so only for (e)MMC */
435 static const unsigned mc2_a_1_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,
436  DB8500_PIN_C8, DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10,
437  DB8500_PIN_B9, DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7,
438  DB8500_PIN_C5 };
439 static const unsigned ssp1_a_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
440  DB8500_PIN_C12, DB8500_PIN_C11 };
441 static const unsigned ssp0_a_1_pins[] = { DB8500_PIN_D12, DB8500_PIN_B13,
442  DB8500_PIN_C13, DB8500_PIN_D13 };
443 static const unsigned i2c0_a_1_pins[] = { DB8500_PIN_C15, DB8500_PIN_B16 };
444 /*
445  * Image processor GPIO pins are named "ipgpio" and have their own
446  * numberspace
447  */
448 static const unsigned ipgpio0_a_1_pins[] = { DB8500_PIN_B14 };
449 static const unsigned ipgpio1_a_1_pins[] = { DB8500_PIN_C14 };
450 /* Three modem pins named RF_PURn, MODEM_STATE and MODEM_PWREN */
451 static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23,
452  DB8500_PIN_D23 };
453 /*
454  * This MSP cannot switch RX and TX, SCK in a separate group since this
455  * seems to be optional.
456  */
457 static const unsigned msp2sck_a_1_pins[] = { DB8500_PIN_AJ27 };
458 static const unsigned msp2_a_1_pins[] = { DB8500_PIN_AH27, DB8500_PIN_AF27,
459  DB8500_PIN_AG28, DB8500_PIN_AG26 };
460 static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25,
461  DB8500_PIN_AH23, DB8500_PIN_AH26, DB8500_PIN_AF24, DB8500_PIN_AF25,
462  DB8500_PIN_AE23, DB8500_PIN_AF23, DB8500_PIN_AG23, DB8500_PIN_AG24,
463  DB8500_PIN_AJ23 };
464 /* MC1 has only 4 data pins, designed for SD or SDIO exclusively */
465 static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,
466  DB8500_PIN_AJ15, DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,
467  DB8500_PIN_AH15 };
468 static const unsigned mc1_a_2_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AJ15,
469  DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,DB8500_PIN_AH15 };
470 static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
471  DB8500_PIN_AH12, DB8500_PIN_AH11 };
472 static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10,
473  DB8500_PIN_AJ11 };
474 static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
475  DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 };
476 static const unsigned hsit_a_2_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
477  DB8500_PIN_AG9, DB8500_PIN_AG8 };
478 static const unsigned clkout_a_1_pins[] = { DB8500_PIN_AH7, DB8500_PIN_AJ6 };
479 static const unsigned clkout_a_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };
480 static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29,
481  DB8500_PIN_AD29, DB8500_PIN_AC29, DB8500_PIN_AD28, DB8500_PIN_AD26,
482  DB8500_PIN_AE26, DB8500_PIN_AG29, DB8500_PIN_AE27, DB8500_PIN_AD27,
483  DB8500_PIN_AC28, DB8500_PIN_AC27 };
484 
485 /* Altfunction B column */
486 static const unsigned trig_b_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3 };
487 static const unsigned i2c4_b_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
488 static const unsigned i2c1_b_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
489 static const unsigned i2c2_b_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
490 static const unsigned i2c2_b_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
491 static const unsigned msp0txrx_b_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
492 static const unsigned i2c1_b_2_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
493 /* Just RX and TX for UART2 */
494 static const unsigned u2rxtx_b_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1 };
495 static const unsigned uartmodtx_b_1_pins[] = { DB8500_PIN_AB4 };
496 static const unsigned msp0sck_b_1_pins[] = { DB8500_PIN_AB3 };
497 static const unsigned uartmodrx_b_1_pins[] = { DB8500_PIN_AA3 };
498 static const unsigned stmmod_b_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
499  DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
500 static const unsigned uartmodrx_b_2_pins[] = { DB8500_PIN_AB2 };
501 static const unsigned spi3_b_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
502  DB8500_PIN_V3, DB8500_PIN_V2 };
503 static const unsigned msp1txrx_b_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
504 static const unsigned kp_b_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
505  DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_E1, DB8500_PIN_E2,
506  DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
507  DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1,
508  DB8500_PIN_F4, DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2,
509  DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 };
510 static const unsigned kp_b_2_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
511  DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_F4, DB8500_PIN_E3};
512 static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
513  DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
514  DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
515  DB8500_PIN_D9, DB8500_PIN_A5, DB8500_PIN_B4, DB8500_PIN_C8,
516  DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,
517  DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5,
518  DB8500_PIN_C9 };
519 /* This chip select pin can be "ps0" in alt C so have it separately */
520 static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 };
521 /* This chip select pin can be "ps1" in alt C so have it separately */
522 static const unsigned smcs1_b_1_pins[] = { DB8500_PIN_B14 };
523 static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 };
524 static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 };
525 static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 };
526 static const unsigned lcdaclk_b_1_pins[] = { DB8500_PIN_C14 };
527 static const unsigned lcda_b_1_pins[] = { DB8500_PIN_D22,
528  DB8500_PIN_C23, DB8500_PIN_D23 };
529 static const unsigned lcd_b_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
530  DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
531  DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
532  DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
533  DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
534 static const unsigned ddrtrig_b_1_pins[] = { DB8500_PIN_AJ27 };
535 static const unsigned pwl_b_1_pins[] = { DB8500_PIN_AF25 };
536 static const unsigned spi1_b_1_pins[] = { DB8500_PIN_AG15, DB8500_PIN_AF13,
537  DB8500_PIN_AG13, DB8500_PIN_AH15 };
538 static const unsigned mc3_b_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
539  DB8500_PIN_AH12, DB8500_PIN_AH11, DB8500_PIN_AG10, DB8500_PIN_AH10,
540  DB8500_PIN_AJ11, DB8500_PIN_AJ9, DB8500_PIN_AH9, DB8500_PIN_AG9,
541  DB8500_PIN_AG8 };
542 static const unsigned pwl_b_2_pins[] = { DB8500_PIN_AF8 };
543 static const unsigned pwl_b_3_pins[] = { DB8500_PIN_AG7 };
544 static const unsigned pwl_b_4_pins[] = { DB8500_PIN_AF7 };
545 
546 /* Altfunction C column */
547 static const unsigned ipjtag_c_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
548  DB8500_PIN_AH4, DB8500_PIN_AH3, DB8500_PIN_AH6 };
549 static const unsigned ipgpio6_c_1_pins[] = { DB8500_PIN_AG6 };
550 static const unsigned ipgpio0_c_1_pins[] = { DB8500_PIN_AF6 };
551 static const unsigned ipgpio1_c_1_pins[] = { DB8500_PIN_AG5 };
552 static const unsigned ipgpio3_c_1_pins[] = { DB8500_PIN_AF5 };
553 static const unsigned ipgpio2_c_1_pins[] = { DB8500_PIN_AG4 };
554 static const unsigned slim0_c_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
555 /* Optional 4-bit Memory Stick interface */
556 static const unsigned ms_c_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
557  DB8500_PIN_AB3, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
558  DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
559 static const unsigned iptrigout_c_1_pins[] = { DB8500_PIN_AB4 };
560 static const unsigned u2rxtx_c_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3 };
561 static const unsigned u2ctsrts_c_1_pins[] = { DB8500_PIN_V3, DB8500_PIN_V2 };
562 static const unsigned u0_c_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AE1,
563  DB8500_PIN_AE2, DB8500_PIN_AG2 };
564 static const unsigned ipgpio4_c_1_pins[] = { DB8500_PIN_F3 };
565 static const unsigned ipgpio5_c_1_pins[] = { DB8500_PIN_F1 };
566 static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };
567 static const unsigned ipgpio7_c_1_pins[] = { DB8500_PIN_G2 };
568 static const unsigned smcleale_c_1_pins[] = { DB8500_PIN_E1, DB8500_PIN_E2 };
569 static const unsigned stmape_c_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
570  DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
571 static const unsigned u2rxtx_c_2_pins[] = { DB8500_PIN_H2, DB8500_PIN_J2 };
572 static const unsigned ipgpio2_c_2_pins[] = { DB8500_PIN_F4 };
573 static const unsigned ipgpio3_c_2_pins[] = { DB8500_PIN_E3 };
574 static const unsigned ipgpio4_c_2_pins[] = { DB8500_PIN_E4 };
575 static const unsigned ipgpio5_c_2_pins[] = { DB8500_PIN_D2 };
576 static const unsigned mc5_c_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
577  DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
578  DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
579  DB8500_PIN_D9 };
580 static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 };
581 static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
582  DB8500_PIN_C12, DB8500_PIN_C11, DB8500_PIN_D17, DB8500_PIN_D16,
583  DB8500_PIN_C23, DB8500_PIN_D23 };
584 static const unsigned smps0_c_1_pins[] = { DB8500_PIN_E8 };
585 static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 };
586 static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 };
587 static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
588  DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
589 static const unsigned uartmodrx_c_1_pins[] = { DB8500_PIN_D21 };
590 static const unsigned uartmodtx_c_1_pins[] = { DB8500_PIN_D20 };
591 static const unsigned stmmod_c_1_pins[] = { DB8500_PIN_C20, DB8500_PIN_B21,
592  DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24 };
593 static const unsigned usbsim_c_1_pins[] = { DB8500_PIN_D22 };
594 static const unsigned mc4rstn_c_1_pins[] = { DB8500_PIN_AF25 };
595 static const unsigned clkout_c_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12 };
596 static const unsigned i2c3_c_1_pins[] = { DB8500_PIN_AG12, DB8500_PIN_AH11 };
597 static const unsigned spi0_c_1_pins[] = { DB8500_PIN_AH10, DB8500_PIN_AH9,
598  DB8500_PIN_AG9, DB8500_PIN_AG8 };
599 static const unsigned usbsim_c_2_pins[] = { DB8500_PIN_AF8 };
600 static const unsigned i2c3_c_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };
601 
602 /* Other C1 column */
603 static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
604  DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
605  DB8500_PIN_D6, DB8500_PIN_B7 };
606 static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
607  DB8500_PIN_AH12, DB8500_PIN_AH11 };
608 static const unsigned spi2_oc1_2_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12,
609  DB8500_PIN_AH11 };
610 
611 #define DB8500_PIN_GROUP(a,b) { .name = #a, .pins = a##_pins, \
612  .npins = ARRAY_SIZE(a##_pins), .altsetting = b }
613 
614 static const struct nmk_pingroup nmk_db8500_groups[] = {
615  /* Altfunction A column */
616  DB8500_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),
617  DB8500_PIN_GROUP(u1rxtx_a_1, NMK_GPIO_ALT_A),
618  DB8500_PIN_GROUP(u1ctsrts_a_1, NMK_GPIO_ALT_A),
619  DB8500_PIN_GROUP(ipi2c_a_1, NMK_GPIO_ALT_A),
620  DB8500_PIN_GROUP(ipi2c_a_2, NMK_GPIO_ALT_A),
621  DB8500_PIN_GROUP(msp0txrx_a_1, NMK_GPIO_ALT_A),
622  DB8500_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A),
623  DB8500_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A),
624  DB8500_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A),
625  DB8500_PIN_GROUP(mc0_dat47_a_1, NMK_GPIO_ALT_A),
626  DB8500_PIN_GROUP(mc0dat31dir_a_1, NMK_GPIO_ALT_A),
627  DB8500_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A),
628  DB8500_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A),
629  DB8500_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A),
630  DB8500_PIN_GROUP(lcdvsi0_a_1, NMK_GPIO_ALT_A),
631  DB8500_PIN_GROUP(lcdvsi1_a_1, NMK_GPIO_ALT_A),
632  DB8500_PIN_GROUP(lcd_d0_d7_a_1, NMK_GPIO_ALT_A),
633  DB8500_PIN_GROUP(lcd_d8_d11_a_1, NMK_GPIO_ALT_A),
634  DB8500_PIN_GROUP(lcd_d12_d23_a_1, NMK_GPIO_ALT_A),
635  DB8500_PIN_GROUP(kp_a_1, NMK_GPIO_ALT_A),
636  DB8500_PIN_GROUP(mc2_a_1, NMK_GPIO_ALT_A),
637  DB8500_PIN_GROUP(ssp1_a_1, NMK_GPIO_ALT_A),
638  DB8500_PIN_GROUP(ssp0_a_1, NMK_GPIO_ALT_A),
639  DB8500_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),
640  DB8500_PIN_GROUP(ipgpio0_a_1, NMK_GPIO_ALT_A),
641  DB8500_PIN_GROUP(ipgpio1_a_1, NMK_GPIO_ALT_A),
642  DB8500_PIN_GROUP(msp2sck_a_1, NMK_GPIO_ALT_A),
643  DB8500_PIN_GROUP(msp2_a_1, NMK_GPIO_ALT_A),
644  DB8500_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A),
645  DB8500_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),
646  DB8500_PIN_GROUP(mc1_a_2, NMK_GPIO_ALT_A),
647  DB8500_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),
648  DB8500_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),
649  DB8500_PIN_GROUP(hsit_a_2, NMK_GPIO_ALT_A),
650  DB8500_PIN_GROUP(clkout_a_1, NMK_GPIO_ALT_A),
651  DB8500_PIN_GROUP(clkout_a_2, NMK_GPIO_ALT_A),
652  DB8500_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A),
653  /* Altfunction B column */
654  DB8500_PIN_GROUP(trig_b_1, NMK_GPIO_ALT_B),
655  DB8500_PIN_GROUP(i2c4_b_1, NMK_GPIO_ALT_B),
656  DB8500_PIN_GROUP(i2c1_b_1, NMK_GPIO_ALT_B),
657  DB8500_PIN_GROUP(i2c2_b_1, NMK_GPIO_ALT_B),
658  DB8500_PIN_GROUP(i2c2_b_2, NMK_GPIO_ALT_B),
659  DB8500_PIN_GROUP(msp0txrx_b_1, NMK_GPIO_ALT_B),
660  DB8500_PIN_GROUP(i2c1_b_2, NMK_GPIO_ALT_B),
661  DB8500_PIN_GROUP(u2rxtx_b_1, NMK_GPIO_ALT_B),
662  DB8500_PIN_GROUP(uartmodtx_b_1, NMK_GPIO_ALT_B),
663  DB8500_PIN_GROUP(msp0sck_b_1, NMK_GPIO_ALT_B),
664  DB8500_PIN_GROUP(uartmodrx_b_1, NMK_GPIO_ALT_B),
665  DB8500_PIN_GROUP(stmmod_b_1, NMK_GPIO_ALT_B),
666  DB8500_PIN_GROUP(uartmodrx_b_2, NMK_GPIO_ALT_B),
667  DB8500_PIN_GROUP(spi3_b_1, NMK_GPIO_ALT_B),
668  DB8500_PIN_GROUP(msp1txrx_b_1, NMK_GPIO_ALT_B),
669  DB8500_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B),
670  DB8500_PIN_GROUP(kp_b_2, NMK_GPIO_ALT_B),
671  DB8500_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B),
672  DB8500_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B),
673  DB8500_PIN_GROUP(smcs1_b_1, NMK_GPIO_ALT_B),
674  DB8500_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B),
675  DB8500_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B),
676  DB8500_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B),
677  DB8500_PIN_GROUP(lcdaclk_b_1, NMK_GPIO_ALT_B),
678  DB8500_PIN_GROUP(lcda_b_1, NMK_GPIO_ALT_B),
679  DB8500_PIN_GROUP(lcd_b_1, NMK_GPIO_ALT_B),
680  DB8500_PIN_GROUP(ddrtrig_b_1, NMK_GPIO_ALT_B),
681  DB8500_PIN_GROUP(pwl_b_1, NMK_GPIO_ALT_B),
682  DB8500_PIN_GROUP(spi1_b_1, NMK_GPIO_ALT_B),
683  DB8500_PIN_GROUP(mc3_b_1, NMK_GPIO_ALT_B),
684  DB8500_PIN_GROUP(pwl_b_2, NMK_GPIO_ALT_B),
685  DB8500_PIN_GROUP(pwl_b_3, NMK_GPIO_ALT_B),
686  DB8500_PIN_GROUP(pwl_b_4, NMK_GPIO_ALT_B),
687  /* Altfunction C column */
688  DB8500_PIN_GROUP(ipjtag_c_1, NMK_GPIO_ALT_C),
689  DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
690  DB8500_PIN_GROUP(ipgpio0_c_1, NMK_GPIO_ALT_C),
691  DB8500_PIN_GROUP(ipgpio1_c_1, NMK_GPIO_ALT_C),
692  DB8500_PIN_GROUP(ipgpio3_c_1, NMK_GPIO_ALT_C),
693  DB8500_PIN_GROUP(ipgpio2_c_1, NMK_GPIO_ALT_C),
694  DB8500_PIN_GROUP(slim0_c_1, NMK_GPIO_ALT_C),
695  DB8500_PIN_GROUP(ms_c_1, NMK_GPIO_ALT_C),
696  DB8500_PIN_GROUP(iptrigout_c_1, NMK_GPIO_ALT_C),
697  DB8500_PIN_GROUP(u2rxtx_c_1, NMK_GPIO_ALT_C),
698  DB8500_PIN_GROUP(u2ctsrts_c_1, NMK_GPIO_ALT_C),
699  DB8500_PIN_GROUP(u0_c_1, NMK_GPIO_ALT_C),
700  DB8500_PIN_GROUP(ipgpio4_c_1, NMK_GPIO_ALT_C),
701  DB8500_PIN_GROUP(ipgpio5_c_1, NMK_GPIO_ALT_C),
702  DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
703  DB8500_PIN_GROUP(ipgpio7_c_1, NMK_GPIO_ALT_C),
704  DB8500_PIN_GROUP(smcleale_c_1, NMK_GPIO_ALT_C),
705  DB8500_PIN_GROUP(stmape_c_1, NMK_GPIO_ALT_C),
706  DB8500_PIN_GROUP(u2rxtx_c_2, NMK_GPIO_ALT_C),
707  DB8500_PIN_GROUP(ipgpio2_c_2, NMK_GPIO_ALT_C),
708  DB8500_PIN_GROUP(ipgpio3_c_2, NMK_GPIO_ALT_C),
709  DB8500_PIN_GROUP(ipgpio4_c_2, NMK_GPIO_ALT_C),
710  DB8500_PIN_GROUP(ipgpio5_c_2, NMK_GPIO_ALT_C),
711  DB8500_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C),
712  DB8500_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C),
713  DB8500_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C),
714  DB8500_PIN_GROUP(smps0_c_1, NMK_GPIO_ALT_C),
715  DB8500_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C),
716  DB8500_PIN_GROUP(u2rxtx_c_3, NMK_GPIO_ALT_C),
717  DB8500_PIN_GROUP(stmape_c_2, NMK_GPIO_ALT_C),
718  DB8500_PIN_GROUP(uartmodrx_c_1, NMK_GPIO_ALT_C),
719  DB8500_PIN_GROUP(uartmodtx_c_1, NMK_GPIO_ALT_C),
720  DB8500_PIN_GROUP(stmmod_c_1, NMK_GPIO_ALT_C),
721  DB8500_PIN_GROUP(usbsim_c_1, NMK_GPIO_ALT_C),
722  DB8500_PIN_GROUP(mc4rstn_c_1, NMK_GPIO_ALT_C),
723  DB8500_PIN_GROUP(clkout_c_1, NMK_GPIO_ALT_C),
724  DB8500_PIN_GROUP(i2c3_c_1, NMK_GPIO_ALT_C),
725  DB8500_PIN_GROUP(spi0_c_1, NMK_GPIO_ALT_C),
726  DB8500_PIN_GROUP(usbsim_c_2, NMK_GPIO_ALT_C),
727  DB8500_PIN_GROUP(i2c3_c_2, NMK_GPIO_ALT_C),
728  /* Other alt C1 column */
729  DB8500_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C1),
730  DB8500_PIN_GROUP(spi2_oc1_1, NMK_GPIO_ALT_C1),
731  DB8500_PIN_GROUP(spi2_oc1_2, NMK_GPIO_ALT_C1),
732 };
733 
734 /* We use this macro to define the groups applicable to a function */
735 #define DB8500_FUNC_GROUPS(a, b...) \
736 static const char * const a##_groups[] = { b };
737 
738 DB8500_FUNC_GROUPS(u0, "u0_a_1", "u0_c_1");
739 DB8500_FUNC_GROUPS(u1, "u1rxtx_a_1", "u1ctsrts_a_1");
740 /*
741  * UART2 can be muxed out with just RX/TX in four places, CTS+RTS is however
742  * only available on two pins in alternative function C
743  */
744 DB8500_FUNC_GROUPS(u2, "u2rxtx_b_1", "u2rxtx_c_1", "u2ctsrts_c_1",
745  "u2rxtx_c_2", "u2rxtx_c_3");
746 DB8500_FUNC_GROUPS(ipi2c, "ipi2c_a_1", "ipi2c_a_2");
747 /*
748  * MSP0 can only be on a certain set of pins, but the TX/RX pins can be
749  * switched around by selecting the altfunction A or B. The SCK pin is
750  * only available on the altfunction B.
751  */
752 DB8500_FUNC_GROUPS(msp0, "msp0txrx_a_1", "msp0tfstck_a_1", "msp0rfstck_a_1",
753  "msp0txrx_b_1", "msp0sck_b_1");
754 DB8500_FUNC_GROUPS(mc0, "mc0_a_1", "mc0_dat47_a_1", "mc0dat31dir_a_1");
755 /* MSP0 can swap RX/TX like MSP0 but has no SCK pin available */
756 DB8500_FUNC_GROUPS(msp1, "msp1txrx_a_1", "msp1_a_1", "msp1txrx_b_1");
757 DB8500_FUNC_GROUPS(lcdb, "lcdb_a_1");
758 DB8500_FUNC_GROUPS(lcd, "lcdvsi0_a_1", "lcdvsi1_a_1", "lcd_d0_d7_a_1",
759  "lcd_d8_d11_a_1", "lcd_d12_d23_a_1", "lcd_b_1");
760 DB8500_FUNC_GROUPS(kp, "kp_a_1", "kp_b_1", "kp_b_2", "kp_c_1", "kp_oc1_1");
761 DB8500_FUNC_GROUPS(mc2, "mc2_a_1", "mc2rstn_c_1");
762 DB8500_FUNC_GROUPS(ssp1, "ssp1_a_1");
763 DB8500_FUNC_GROUPS(ssp0, "ssp0_a_1");
764 DB8500_FUNC_GROUPS(i2c0, "i2c0_a_1");
765 /* The image processor has 8 GPIO pins that can be muxed out */
766 DB8500_FUNC_GROUPS(ipgpio, "ipgpio0_a_1", "ipgpio1_a_1", "ipgpio7_b_1",
767  "ipgpio2_b_1", "ipgpio3_b_1", "ipgpio6_c_1", "ipgpio0_c_1",
768  "ipgpio1_c_1", "ipgpio3_c_1", "ipgpio2_c_1", "ipgpio4_c_1",
769  "ipgpio5_c_1", "ipgpio6_c_2", "ipgpio7_c_1", "ipgpio2_c_2",
770  "ipgpio3_c_2", "ipgpio4_c_2", "ipgpio5_c_2");
771 /* MSP2 can not invert the RX/TX pins but has the optional SCK pin */
772 DB8500_FUNC_GROUPS(msp2, "msp2sck_a_1", "msp2_a_1");
773 DB8500_FUNC_GROUPS(mc4, "mc4_a_1", "mc4rstn_c_1");
774 DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1_a_2", "mc1dir_a_1");
775 DB8500_FUNC_GROUPS(hsi, "hsir_a_1", "hsit_a_1", "hsit_a_2");
776 DB8500_FUNC_GROUPS(clkout, "clkout_a_1", "clkout_a_2", "clkout_c_1");
777 DB8500_FUNC_GROUPS(usb, "usb_a_1");
778 DB8500_FUNC_GROUPS(trig, "trig_b_1");
779 DB8500_FUNC_GROUPS(i2c4, "i2c4_b_1");
780 DB8500_FUNC_GROUPS(i2c1, "i2c1_b_1", "i2c1_b_2");
781 DB8500_FUNC_GROUPS(i2c2, "i2c2_b_1", "i2c2_b_2");
782 /*
783  * The modem UART can output its RX and TX pins in some different places,
784  * so select one of each.
785  */
786 DB8500_FUNC_GROUPS(uartmod, "uartmodtx_b_1", "uartmodrx_b_1", "uartmodrx_b_2",
787  "uartmodrx_c_1", "uartmod_tx_c_1");
788 DB8500_FUNC_GROUPS(stmmod, "stmmod_b_1", "stmmod_c_1");
789 DB8500_FUNC_GROUPS(spi3, "spi3_b_1");
790 /* Select between CS0 on alt B or PS1 on alt C */
791 DB8500_FUNC_GROUPS(sm, "sm_b_1", "smcs0_b_1", "smcs1_b_1", "smcleale_c_1",
792  "smps0_c_1", "smps1_c_1");
793 DB8500_FUNC_GROUPS(lcda, "lcdaclk_b_1", "lcda_b_1");
794 DB8500_FUNC_GROUPS(ddrtrig, "ddrtrig_b_1");
795 DB8500_FUNC_GROUPS(pwl, "pwl_b_1", "pwl_b_2", "pwl_b_3", "pwl_b_4");
796 DB8500_FUNC_GROUPS(spi1, "spi1_b_1");
797 DB8500_FUNC_GROUPS(mc3, "mc3_b_1");
798 DB8500_FUNC_GROUPS(ipjtag, "ipjtag_c_1");
799 DB8500_FUNC_GROUPS(slim0, "slim0_c_1");
800 DB8500_FUNC_GROUPS(ms, "ms_c_1");
801 DB8500_FUNC_GROUPS(iptrigout, "iptrigout_c_1");
802 DB8500_FUNC_GROUPS(stmape, "stmape_c_1", "stmape_c_2");
803 DB8500_FUNC_GROUPS(mc5, "mc5_c_1");
804 DB8500_FUNC_GROUPS(usbsim, "usbsim_c_1", "usbsim_c_2");
805 DB8500_FUNC_GROUPS(i2c3, "i2c3_c_1", "i2c3_c_2");
806 DB8500_FUNC_GROUPS(spi0, "spi0_c_1");
807 DB8500_FUNC_GROUPS(spi2, "spi2_oc1_1", "spi2_oc1_2");
808 
809 #define FUNCTION(fname) \
810  { \
811  .name = #fname, \
812  .groups = fname##_groups, \
813  .ngroups = ARRAY_SIZE(fname##_groups), \
814  }
815 
816 static const struct nmk_function nmk_db8500_functions[] = {
817  FUNCTION(u0),
818  FUNCTION(u1),
819  FUNCTION(u2),
820  FUNCTION(ipi2c),
821  FUNCTION(msp0),
822  FUNCTION(mc0),
823  FUNCTION(msp1),
824  FUNCTION(lcdb),
825  FUNCTION(lcd),
826  FUNCTION(kp),
827  FUNCTION(mc2),
828  FUNCTION(ssp1),
829  FUNCTION(ssp0),
830  FUNCTION(i2c0),
831  FUNCTION(ipgpio),
832  FUNCTION(msp2),
833  FUNCTION(mc4),
834  FUNCTION(mc1),
835  FUNCTION(hsi),
836  FUNCTION(clkout),
837  FUNCTION(usb),
838  FUNCTION(trig),
839  FUNCTION(i2c4),
840  FUNCTION(i2c1),
841  FUNCTION(i2c2),
842  FUNCTION(uartmod),
843  FUNCTION(stmmod),
844  FUNCTION(spi3),
845  FUNCTION(sm),
846  FUNCTION(lcda),
847  FUNCTION(ddrtrig),
848  FUNCTION(pwl),
849  FUNCTION(spi1),
850  FUNCTION(mc3),
851  FUNCTION(ipjtag),
852  FUNCTION(slim0),
853  FUNCTION(ms),
854  FUNCTION(iptrigout),
855  FUNCTION(stmape),
856  FUNCTION(mc5),
857  FUNCTION(usbsim),
858  FUNCTION(i2c3),
859  FUNCTION(spi0),
860  FUNCTION(spi2),
861 };
862 
863 static const struct prcm_gpiocr_altcx_pin_desc db8500_altcx_pins[] = {
864  PRCM_GPIOCR_ALTCX(23, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_CLK_a */
865  true, PRCM_IDX_GPIOCR1, 7, /* SBAG_CLK_a */
866  false, 0, 0,
867  false, 0, 0
868  ),
869  PRCM_GPIOCR_ALTCX(24, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE or U2_RXD ??? */
870  true, PRCM_IDX_GPIOCR1, 7, /* SBAG_VAL_a */
871  true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
872  false, 0, 0
873  ),
874  PRCM_GPIOCR_ALTCX(25, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[0] */
875  true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[0] */
876  false, 0, 0,
877  false, 0, 0
878  ),
879  PRCM_GPIOCR_ALTCX(26, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[1] */
880  true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[1] */
881  false, 0, 0,
882  false, 0, 0
883  ),
884  PRCM_GPIOCR_ALTCX(27, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[2] */
885  true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[2] */
886  false, 0, 0,
887  false, 0, 0
888  ),
889  PRCM_GPIOCR_ALTCX(28, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[3] */
890  true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[3] */
891  false, 0, 0,
892  false, 0, 0
893  ),
894  PRCM_GPIOCR_ALTCX(29, false, 0, 0,
895  false, 0, 0,
896  true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
897  false, 0, 0
898  ),
899  PRCM_GPIOCR_ALTCX(30, false, 0, 0,
900  false, 0, 0,
901  true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
902  false, 0, 0
903  ),
904  PRCM_GPIOCR_ALTCX(31, false, 0, 0,
905  false, 0, 0,
906  true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
907  false, 0, 0
908  ),
909  PRCM_GPIOCR_ALTCX(32, false, 0, 0,
910  false, 0, 0,
911  true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
912  false, 0, 0
913  ),
914  PRCM_GPIOCR_ALTCX(68, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
915  false, 0, 0,
916  false, 0, 0,
917  false, 0, 0
918  ),
919  PRCM_GPIOCR_ALTCX(69, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
920  false, 0, 0,
921  false, 0, 0,
922  false, 0, 0
923  ),
924  PRCM_GPIOCR_ALTCX(70, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D23 */
925  true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
926  true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
927  true, PRCM_IDX_GPIOCR1, 8 /* SBAG_CLK */
928  ),
929  PRCM_GPIOCR_ALTCX(71, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D22 */
930  true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
931  true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
932  true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D3 */
933  ),
934  PRCM_GPIOCR_ALTCX(72, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D21 */
935  true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
936  true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
937  true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D2 */
938  ),
939  PRCM_GPIOCR_ALTCX(73, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D20 */
940  true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
941  true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
942  true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D1 */
943  ),
944  PRCM_GPIOCR_ALTCX(74, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D19 */
945  true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
946  true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
947  true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D0 */
948  ),
949  PRCM_GPIOCR_ALTCX(75, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D18 */
950  true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
951  true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
952  false, 0, 0
953  ),
954  PRCM_GPIOCR_ALTCX(76, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D17 */
955  true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
956  true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
957  false, 0, 0
958  ),
959  PRCM_GPIOCR_ALTCX(77, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D16 */
960  true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
961  false, 0, 0,
962  true, PRCM_IDX_GPIOCR1, 8 /* SBAG_VAL */
963  ),
964  PRCM_GPIOCR_ALTCX(86, true, PRCM_IDX_GPIOCR1, 12, /* KP_O3 */
965  false, 0, 0,
966  false, 0, 0,
967  false, 0, 0
968  ),
969  PRCM_GPIOCR_ALTCX(87, true, PRCM_IDX_GPIOCR1, 12, /* KP_O2 */
970  false, 0, 0,
971  false, 0, 0,
972  false, 0, 0
973  ),
974  PRCM_GPIOCR_ALTCX(88, true, PRCM_IDX_GPIOCR1, 12, /* KP_I3 */
975  false, 0, 0,
976  false, 0, 0,
977  false, 0, 0
978  ),
979  PRCM_GPIOCR_ALTCX(89, true, PRCM_IDX_GPIOCR1, 12, /* KP_I2 */
980  false, 0, 0,
981  false, 0, 0,
982  false, 0, 0
983  ),
984  PRCM_GPIOCR_ALTCX(90, true, PRCM_IDX_GPIOCR1, 12, /* KP_O1 */
985  false, 0, 0,
986  false, 0, 0,
987  false, 0, 0
988  ),
989  PRCM_GPIOCR_ALTCX(91, true, PRCM_IDX_GPIOCR1, 12, /* KP_O0 */
990  false, 0, 0,
991  false, 0, 0,
992  false, 0, 0
993  ),
994  PRCM_GPIOCR_ALTCX(92, true, PRCM_IDX_GPIOCR1, 12, /* KP_I1 */
995  false, 0, 0,
996  false, 0, 0,
997  false, 0, 0
998  ),
999  PRCM_GPIOCR_ALTCX(93, true, PRCM_IDX_GPIOCR1, 12, /* KP_I0 */
1000  false, 0, 0,
1001  false, 0, 0,
1002  false, 0, 0
1003  ),
1004  PRCM_GPIOCR_ALTCX(96, true, PRCM_IDX_GPIOCR2, 3, /* RF_INT */
1005  false, 0, 0,
1006  false, 0, 0,
1007  false, 0, 0
1008  ),
1009  PRCM_GPIOCR_ALTCX(97, true, PRCM_IDX_GPIOCR2, 1, /* RF_CTRL */
1010  false, 0, 0,
1011  false, 0, 0,
1012  false, 0, 0
1013  ),
1014  PRCM_GPIOCR_ALTCX(151, false, 0, 0,
1015  true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CTL */
1016  true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1017  true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS17 */
1018  ),
1019  PRCM_GPIOCR_ALTCX(152, true, PRCM_IDX_GPIOCR1, 4, /* Hx_CLK */
1020  true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CLK */
1021  true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1022  true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS16 */
1023  ),
1024  PRCM_GPIOCR_ALTCX(153, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
1025  true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D15 */
1026  true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1027  true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS15 */
1028  ),
1029  PRCM_GPIOCR_ALTCX(154, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
1030  true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D14 */
1031  true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1032  true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS14 */
1033  ),
1034  PRCM_GPIOCR_ALTCX(155, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1035  true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D13 */
1036  true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1037  true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS13 */
1038  ),
1039  PRCM_GPIOCR_ALTCX(156, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1040  true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D12 */
1041  true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1042  true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS12 */
1043  ),
1044  PRCM_GPIOCR_ALTCX(157, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1045  true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D11 */
1046  true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1047  true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS11 */
1048  ),
1049  PRCM_GPIOCR_ALTCX(158, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1050  true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D10 */
1051  true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1052  true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS10 */
1053  ),
1054  PRCM_GPIOCR_ALTCX(159, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1055  true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D9 */
1056  true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1057  true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS9 */
1058  ),
1059  PRCM_GPIOCR_ALTCX(160, false, 0, 0,
1060  true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D8 */
1061  true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1062  true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS8 */
1063  ),
1064  PRCM_GPIOCR_ALTCX(161, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO7 */
1065  true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D7 */
1066  true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1067  true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS7 */
1068  ),
1069  PRCM_GPIOCR_ALTCX(162, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO6 */
1070  true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D6 */
1071  true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1072  true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS6 */
1073  ),
1074  PRCM_GPIOCR_ALTCX(163, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO5 */
1075  true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D5 */
1076  true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1077  true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS5 */
1078  ),
1079  PRCM_GPIOCR_ALTCX(164, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO4 */
1080  true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D4 */
1081  true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1082  true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS4 */
1083  ),
1084  PRCM_GPIOCR_ALTCX(165, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO3 */
1085  true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D3 */
1086  true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1087  true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS3 */
1088  ),
1089  PRCM_GPIOCR_ALTCX(166, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO2 */
1090  true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D2 */
1091  true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1092  true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS2 */
1093  ),
1094  PRCM_GPIOCR_ALTCX(167, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO1 */
1095  true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D1 */
1096  true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1097  true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS1 */
1098  ),
1099  PRCM_GPIOCR_ALTCX(168, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO0 */
1100  true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D0 */
1101  true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1102  true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS0 */
1103  ),
1104  PRCM_GPIOCR_ALTCX(170, true, PRCM_IDX_GPIOCR2, 2, /* RF_INT */
1105  false, 0, 0,
1106  false, 0, 0,
1107  false, 0, 0
1108  ),
1109  PRCM_GPIOCR_ALTCX(171, true, PRCM_IDX_GPIOCR2, 0, /* RF_CTRL */
1110  false, 0, 0,
1111  false, 0, 0,
1112  false, 0, 0
1113  ),
1114  PRCM_GPIOCR_ALTCX(215, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_TXD */
1115  false, 0, 0,
1116  false, 0, 0,
1117  false, 0, 0
1118  ),
1119  PRCM_GPIOCR_ALTCX(216, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_FRM */
1120  false, 0, 0,
1121  false, 0, 0,
1122  false, 0, 0
1123  ),
1124  PRCM_GPIOCR_ALTCX(217, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_CLK */
1125  false, 0, 0,
1126  false, 0, 0,
1127  false, 0, 0
1128  ),
1129  PRCM_GPIOCR_ALTCX(218, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_RXD */
1130  false, 0, 0,
1131  false, 0, 0,
1132  false, 0, 0
1133  ),
1134 };
1135 
1136 static const u16 db8500_prcm_gpiocr_regs[] = {
1137  [PRCM_IDX_GPIOCR1] = 0x138,
1138  [PRCM_IDX_GPIOCR2] = 0x574,
1139 };
1140 
1141 static const struct nmk_pinctrl_soc_data nmk_db8500_soc = {
1142  .gpio_ranges = nmk_db8500_ranges,
1143  .gpio_num_ranges = ARRAY_SIZE(nmk_db8500_ranges),
1144  .pins = nmk_db8500_pins,
1145  .npins = ARRAY_SIZE(nmk_db8500_pins),
1146  .functions = nmk_db8500_functions,
1147  .nfunctions = ARRAY_SIZE(nmk_db8500_functions),
1148  .groups = nmk_db8500_groups,
1149  .ngroups = ARRAY_SIZE(nmk_db8500_groups),
1150  .altcx_pins = db8500_altcx_pins,
1151  .npins_altcx = ARRAY_SIZE(db8500_altcx_pins),
1152  .prcm_gpiocr_registers = db8500_prcm_gpiocr_regs,
1153 };
1154 
1155 void __devinit
1156 nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
1157 {
1158  *soc = &nmk_db8500_soc;
1159 }
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