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pinmux-sh7264.c
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1 /*
2  * SH7264 Pinmux
3  *
4  * Copyright (C) 2012 Renesas Electronics Europe Ltd
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License. See the file "COPYING" in the main directory of this archive
8  * for more details.
9  */
10 
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/gpio.h>
14 #include <cpu/sh7264.h>
15 
16 enum {
18 
20  /* Port A */
22  /* Port B */
29  /* Port C */
33  /* Port D */
38  /* Port E */
41  /* Port F */
46  /* Port G */
54  /* Port H */
55  /* NOTE - Port H does not have a Data Register, but PH Data is
56  connected to PH Port Register */
59  /* Port I - not on device */
60  /* Port J */
65  /* Port K */
71 
74  /* Port A */
76  /* Port B */
83  /* Port C */
87  /* Port D */
92  /* Port E */
95  /* Port F */
100  /* Port G */
108  /* Port H - Port H does not have a Data Register */
109  /* Port I - not on device */
110  /* Port J */
115  /* Port K */
121 
124  /* Port A */
126  /* Port B */
133  /* Port C */
137  /* Port D */
142  /* Port E */
145  /* Port F */
150  /* Port G */
158  /* Port H - Port H does not have a Data Register */
159  /* Port I - not on device */
160  /* Port J */
165  /* Port K */
171 
173  /* Port A */
178 
179  /* Port B */
184 
207 
208  /* Port C */
224 
236 
237  /* Port D */
254 
271 
272  /* Port E */
279 
287 
288  /* Port F */
302 
328 
329  /* Port G */
355 
395 
396  /* Port H */
405 
406  /* Port I - not on device */
407 
408  /* Port J */
421 
437 
438  /* Port K */
451 
465 
467  /* Port A */
468 
469  /* Port B */
470 
471  /* Port C */
472 
473  /* Port D */
474 
475  /* Port E */
476 
477  /* Port F */
478 
479  /* Port G */
480 
481  /* Port H */
484 
485  /* Port I - not on device */
486 
487  /* Port J */
488 
489  /* Port K */
490 
494 
497 
502 
510 
512 
513  /* DMAC */
516 
517  /* ADC */
519 
520  /* BSC */
543 
544  /* TMU */
551 
552  /* SCIF */
560 
561  /* RSPI */
566 
567  /* IIC3 */
570 
571  /* SSI */
580 
581  /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
583 
584  /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
586 
587  /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
590 
591  /* VDC3 */
604 };
605 
606 static pinmux_enum_t pinmux_data[] = {
607 
608  /* Port A */
613 
614  /* Port B */
618 
641 
642  /* Port C */
673 
674  /* Port D */
691 
692  /* Port E */
696 
700 
704 
708 
715 
720 
721  /* Port F */
727 
734 
741 
748 
753 
759 
765 
771 
777 
783 
790 
797 
804 
805  /* Port G */
809 
813 
817 
821 
826 
832 
838 
844 
850 
856 
861 
866 
871 
878 
885 
891 
897 
902 
907 
912 
917 
922 
927 
932 
938 
939  /* Port H */
942 
945 
948 
951 
954 
957 
960 
963 
964  /* Port I - not on device */
965 
966  /* Port J */
970 
974 
978 
982 
986 
990 
994 
998 
1003 
1010 
1016 
1023 
1024  /* Port K */
1028 
1032 
1036 
1040 
1044 
1048 
1052 
1056 
1060 
1064 
1068 
1072 };
1073 
1074 static struct pinmux_gpio pinmux_gpios[] = {
1075 
1076  /* Port A */
1081 
1082  /* Port B */
1105 
1106  /* Port C */
1118 
1119  /* Port D */
1136 
1137  /* Port E */
1144 
1145  /* Port F */
1159 
1160  /* Port G */
1186 
1187  /* Port H - Port H does not have a Data Register */
1188 
1189  /* Port I - not on device */
1190 
1191  /* Port J */
1204 
1205  /* Port K */
1218 
1219  /* INTC */
1227 
1240 
1241  /* WDT */
1243 
1244  /* CAN */
1250 
1251  /* DMAC */
1258 
1259  /* ADC */
1261 
1262  /* BSCh */
1289 
1306 
1330 
1331  /* TMU */
1352 
1353  /* SCIF */
1378 
1379  /* RSPI */
1389 
1390  /* IIC3 */
1397 
1398  /* SSI */
1413 
1414  /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
1419 
1420  /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
1423 
1424  /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
1427 
1428  /* VDC3 */
1432 
1441 
1447 
1464 
1466 };
1467 
1468 static struct pinmux_cfg_reg pinmux_config_regs[] = {
1469  { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) {
1470  0, 0, 0, 0, 0, 0, 0, 0,
1471  0, 0, 0, 0, 0, 0, 0, 0,
1472  0, 0, 0, 0, 0, 0, 0, 0,
1473  PA3_IN, PA3_OUT,
1474  PA2_IN, PA2_OUT,
1475  PA1_IN, PA1_OUT,
1476  PA0_IN, PA0_OUT }
1477  },
1478 
1479  { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4) {
1480  0, 0, 0, 0, 0, 0, 0, 0,
1481  0, 0, 0, 0, 0, 0, 0, 0,
1482  PB22MD_00, PB22MD_01, PB22MD_10, 0, 0, 0, 0, 0,
1483  0, 0, 0, 0, 0, 0, 0, 0,
1484  PB21MD_0, PB21MD_1, 0, 0, 0, 0, 0, 0,
1485  0, 0, 0, 0, 0, 0, 0, 0,
1486  0, PB20MD_1, 0, 0, 0, 0, 0, 0,
1487  0, 0, 0, 0, 0, 0, 0, 0 }
1488 
1489  },
1490  { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4) {
1491  0, PB19MD_01, 0, 0, 0, 0, 0, 0,
1492  0, 0, 0, 0, 0, 0, 0, 0,
1493  0, PB18MD_01, 0, 0, 0, 0, 0, 0,
1494  0, 0, 0, 0, 0, 0, 0, 0,
1495  0, PB17MD_01, 0, 0, 0, 0, 0, 0,
1496  0, 0, 0, 0, 0, 0, 0, 0,
1497  0, PB16MD_01, 0, 0, 0, 0, 0, 0,
1498  0, 0, 0, 0, 0, 0, 0, 0 }
1499  },
1500  { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4) {
1501  0, PB15MD_01, 0, 0, 0, 0, 0, 0,
1502  0, 0, 0, 0, 0, 0, 0, 0,
1503  0, PB14MD_01, 0, 0, 0, 0, 0, 0,
1504  0, 0, 0, 0, 0, 0, 0, 0,
1505  0, PB13MD_01, 0, 0, 0, 0, 0, 0,
1506  0, 0, 0, 0, 0, 0, 0, 0,
1507  0, PB12MD_01, 0, 0, 0, 0, 0, 0,
1508  0, 0, 0, 0, 0, 0, 0, 0 }
1509  },
1510  { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4) {
1511  0, PB11MD_01, 0, 0, 0, 0, 0, 0,
1512  0, 0, 0, 0, 0, 0, 0, 0,
1513  0, PB10MD_01, 0, 0, 0, 0, 0, 0,
1514  0, 0, 0, 0, 0, 0, 0, 0,
1515  0, PB9MD_01, 0, 0, 0, 0, 0, 0,
1516  0, 0, 0, 0, 0, 0, 0, 0,
1517  0, PB8MD_01, 0, 0, 0, 0, 0, 0,
1518  0, 0, 0, 0, 0, 0, 0, 0 }
1519  },
1520  { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4) {
1521  0, PB7MD_01, 0, 0, 0, 0, 0, 0,
1522  0, 0, 0, 0, 0, 0, 0, 0,
1523  0, PB6MD_01, 0, 0, 0, 0, 0, 0,
1524  0, 0, 0, 0, 0, 0, 0, 0,
1525  0, PB5MD_01, 0, 0, 0, 0, 0, 0,
1526  0, 0, 0, 0, 0, 0, 0, 0,
1527  0, PB4MD_01, 0, 0, 0, 0, 0, 0,
1528  0, 0, 0, 0, 0, 0, 0, 0 }
1529  },
1530  { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4) {
1531  0, PB3MD_1, 0, 0, 0, 0, 0, 0,
1532  0, 0, 0, 0, 0, 0, 0, 0,
1533  0, PB2MD_1, 0, 0, 0, 0, 0, 0,
1534  0, 0, 0, 0, 0, 0, 0, 0,
1535  0, PB1MD_1, 0, 0, 0, 0, 0, 0,
1536  0, 0, 0, 0, 0, 0, 0, 0,
1537  0, 0, 0, 0, 0, 0, 0, 0,
1538  0, 0, 0, 0, 0, 0, 0, 0 }
1539  },
1540 
1541  { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1) {
1542  0, 0, 0, 0, 0, 0, 0, 0,
1543  0, 0, 0, 0, 0, 0, 0, 0,
1544  0, 0,
1545  PB22_IN, PB22_OUT,
1546  PB21_IN, PB21_OUT,
1547  PB20_IN, PB20_OUT,
1548  PB19_IN, PB19_OUT,
1549  PB18_IN, PB18_OUT,
1550  PB17_IN, PB17_OUT,
1551  PB16_IN, PB16_OUT }
1552  },
1553 
1554  { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1) {
1555  PB15_IN, PB15_OUT,
1556  PB14_IN, PB14_OUT,
1557  PB13_IN, PB13_OUT,
1558  PB12_IN, PB12_OUT,
1559  PB11_IN, PB11_OUT,
1560  PB10_IN, PB10_OUT,
1561  PB9_IN, PB9_OUT,
1562  PB8_IN, PB8_OUT,
1563  PB7_IN, PB7_OUT,
1564  PB6_IN, PB6_OUT,
1565  PB5_IN, PB5_OUT,
1566  PB4_IN, PB4_OUT,
1567  PB3_IN, PB3_OUT,
1568  PB2_IN, PB2_OUT,
1569  PB1_IN, PB1_OUT,
1570  0, 0 }
1571  },
1572 
1573  { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4) {
1574  0, 0, 0, 0, 0, 0, 0, 0,
1575  0, 0, 0, 0, 0, 0, 0, 0,
1576  PC10MD_0, PC10MD_1, 0, 0, 0, 0, 0, 0,
1577  0, 0, 0, 0, 0, 0, 0, 0,
1578  PC9MD_0, PC9MD_1, 0, 0, 0, 0, 0, 0,
1579  0, 0, 0, 0, 0, 0, 0, 0,
1580  PC8MD_00, PC8MD_01, PC8MD_10, PC8MD_11, 0, 0, 0, 0,
1581  0, 0, 0, 0, 0, 0, 0, 0 }
1582  },
1583  { PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4) {
1584  PC7MD_00, PC7MD_01, PC7MD_10, PC7MD_11, 0, 0, 0, 0,
1585  0, 0, 0, 0, 0, 0, 0, 0,
1586  PC6MD_00, PC6MD_01, PC6MD_10, PC6MD_11, 0, 0, 0, 0,
1587  0, 0, 0, 0, 0, 0, 0, 0,
1588  PC5MD_00, PC5MD_01, PC5MD_10, PC5MD_11, 0, 0, 0, 0,
1589  0, 0, 0, 0, 0, 0, 0, 0,
1590  PC4MD_0, PC4MD_1, 0, 0, 0, 0, 0, 0,
1591  0, 0, 0, 0, 0, 0, 0, 0 }
1592  },
1593  { PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4) {
1594  PC3MD_0, PC3MD_1, 0, 0, 0, 0, 0, 0,
1595  0, 0, 0, 0, 0, 0, 0, 0,
1596  PC2MD_0, PC2MD_1, 0, 0, 0, 0, 0, 0,
1597  0, 0, 0, 0, 0, 0, 0, 0,
1598  PC1MD_0, PC1MD_1, 0, 0, 0, 0, 0, 0,
1599  0, 0, 0, 0, 0, 0, 0, 0,
1600  PC0MD_0, PC0MD_1, 0, 0, 0, 0, 0, 0,
1601  0, 0, 0, 0, 0, 0, 0, 0 }
1602  },
1603 
1604  { PINMUX_CFG_REG("PCIOR0", 0xfffe3852, 16, 1) {
1605  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1606  PC10_IN, PC10_OUT,
1607  PC9_IN, PC9_OUT,
1608  PC8_IN, PC8_OUT,
1609  PC7_IN, PC7_OUT,
1610  PC6_IN, PC6_OUT,
1611  PC5_IN, PC5_OUT,
1612  PC4_IN, PC4_OUT,
1613  PC3_IN, PC3_OUT,
1614  PC2_IN, PC2_OUT,
1615  PC1_IN, PC1_OUT,
1616  PC0_IN, PC0_OUT
1617  }
1618  },
1619 
1620  { PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4) {
1621  0, PD15MD_01, 0, 0, 0, 0, 0, 0,
1622  0, 0, 0, 0, 0, 0, 0, 0,
1623  0, PD14MD_01, 0, 0, 0, 0, 0, 0,
1624  0, 0, 0, 0, 0, 0, 0, 0,
1625  0, PD13MD_01, 0, 0, 0, 0, 0, 0,
1626  0, 0, 0, 0, 0, 0, 0, 0,
1627  0, PD12MD_01, 0, 0, 0, 0, 0, 0,
1628  0, 0, 0, 0, 0, 0, 0, 0 }
1629  },
1630  { PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4) {
1631  0, PD11MD_01, 0, 0, 0, 0, 0, 0,
1632  0, 0, 0, 0, 0, 0, 0, 0,
1633  0, PD10MD_01, 0, 0, 0, 0, 0, 0,
1634  0, 0, 0, 0, 0, 0, 0, 0,
1635  0, PD9MD_01, 0, 0, 0, 0, 0, 0,
1636  0, 0, 0, 0, 0, 0, 0, 0,
1637  0, PD8MD_01, 0, 0, 0, 0, 0, 0,
1638  0, 0, 0, 0, 0, 0, 0, 0 }
1639  },
1640  { PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4) {
1641  0, PD7MD_01, 0, 0, 0, 0, 0, 0,
1642  0, 0, 0, 0, 0, 0, 0, 0,
1643  0, PD6MD_01, 0, 0, 0, 0, 0, 0,
1644  0, 0, 0, 0, 0, 0, 0, 0,
1645  0, PD5MD_01, 0, 0, 0, 0, 0, 0,
1646  0, 0, 0, 0, 0, 0, 0, 0,
1647  0, PD4MD_01, 0, 0, 0, 0, 0, 0,
1648  0, 0, 0, 0, 0, 0, 0, 0 }
1649  },
1650  { PINMUX_CFG_REG("PDCR0", 0xfffe386e, 16, 4) {
1651  0, PD3MD_01, 0, 0, 0, 0, 0, 0,
1652  0, 0, 0, 0, 0, 0, 0, 0,
1653  0, PD2MD_01, 0, 0, 0, 0, 0, 0,
1654  0, 0, 0, 0, 0, 0, 0, 0,
1655  0, PD1MD_01, 0, 0, 0, 0, 0, 0,
1656  0, 0, 0, 0, 0, 0, 0, 0,
1657  0, PD0MD_01, 0, 0, 0, 0, 0, 0,
1658  0, 0, 0, 0, 0, 0, 0, 0 }
1659  },
1660 
1661  { PINMUX_CFG_REG("PDIOR0", 0xfffe3872, 16, 1) {
1662  PD15_IN, PD15_OUT,
1663  PD14_IN, PD14_OUT,
1664  PD13_IN, PD13_OUT,
1665  PD12_IN, PD12_OUT,
1666  PD11_IN, PD11_OUT,
1667  PD10_IN, PD10_OUT,
1668  PD9_IN, PD9_OUT,
1669  PD8_IN, PD8_OUT,
1670  PD7_IN, PD7_OUT,
1671  PD6_IN, PD6_OUT,
1672  PD5_IN, PD5_OUT,
1673  PD4_IN, PD4_OUT,
1674  PD3_IN, PD3_OUT,
1675  PD2_IN, PD2_OUT,
1676  PD1_IN, PD1_OUT,
1677  PD0_IN, PD0_OUT }
1678  },
1679 
1680  { PINMUX_CFG_REG("PECR1", 0xfffe388c, 16, 4) {
1681  0, 0, 0, 0, 0, 0, 0, 0,
1682  0, 0, 0, 0, 0, 0, 0, 0,
1683  0, 0, 0, 0, 0, 0, 0, 0,
1684  0, 0, 0, 0, 0, 0, 0, 0,
1685  PE5MD_00, PE5MD_01, 0, PE5MD_11, 0, 0, 0, 0,
1686  0, 0, 0, 0, 0, 0, 0, 0,
1687  PE4MD_00, PE4MD_01, 0, PE4MD_11, 0, 0, 0, 0,
1688  0, 0, 0, 0, 0, 0, 0, 0 }
1689  },
1690 
1691  { PINMUX_CFG_REG("PECR0", 0xfffe388e, 16, 4) {
1692  PE3MD_00, PE3MD_01, 0, PE3MD_11, 0, 0, 0, 0,
1693  0, 0, 0, 0, 0, 0, 0, 0,
1694  PE2MD_00, PE2MD_01, 0, PE2MD_11, 0, 0, 0, 0,
1695  0, 0, 0, 0, 0, 0, 0, 0,
1697  PE1MD_100, PE1MD_101, 0, 0,
1698  0, 0, 0, 0, 0, 0, 0, 0,
1699  PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, 0, 0, 0, 0,
1700  0, 0, 0, 0, 0, 0, 0, 0 }
1701  },
1702 
1703  { PINMUX_CFG_REG("PEIOR0", 0xfffe3892, 16, 1) {
1704  0, 0, 0, 0, 0, 0, 0, 0,
1705  0, 0, 0, 0, 0, 0, 0, 0,
1706  0, 0, 0, 0,
1707  PE5_IN, PE5_OUT,
1708  PE4_IN, PE4_OUT,
1709  PE3_IN, PE3_OUT,
1710  PE2_IN, PE2_OUT,
1711  PE1_IN, PE1_OUT,
1712  PE0_IN, PE0_OUT }
1713  },
1714 
1715  { PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) {
1717  PF12MD_100, PF12MD_101, 0, 0,
1718  0, 0, 0, 0, 0, 0, 0, 0 }
1719  },
1720 
1721  { PINMUX_CFG_REG("PFCR2", 0xfffe38aa, 16, 4) {
1723  PF11MD_100, PF11MD_101, 0, 0,
1724  0, 0, 0, 0, 0, 0, 0, 0,
1726  PF10MD_100, PF10MD_101, 0, 0,
1727  0, 0, 0, 0, 0, 0, 0, 0,
1729  PF9MD_100, PF9MD_101, 0, 0,
1730  0, 0, 0, 0, 0, 0, 0, 0,
1731  PF8MD_00, PF8MD_01, PF8MD_10, PF8MD_11, 0, 0, 0, 0,
1732  0, 0, 0, 0, 0, 0, 0, 0 }
1733  },
1734 
1735  { PINMUX_CFG_REG("PFCR1", 0xfffe38ac, 16, 4) {
1737  PF7MD_100, 0, 0, 0,
1738  0, 0, 0, 0, 0, 0, 0, 0,
1740  PF6MD_100, 0, 0, 0,
1741  0, 0, 0, 0, 0, 0, 0, 0,
1743  PF5MD_100, 0, 0, 0,
1744  0, 0, 0, 0, 0, 0, 0, 0,
1746  PF4MD_100, 0, 0, 0,
1747  0, 0, 0, 0, 0, 0, 0, 0 }
1748  },
1749 
1750  { PINMUX_CFG_REG("PFCR0", 0xfffe38ae, 16, 4) {
1752  PF3MD_100, 0, 0, 0,
1753  0, 0, 0, 0, 0, 0, 0, 0,
1755  PF2MD_100, PF2MD_101, 0, 0,
1756  0, 0, 0, 0, 0, 0, 0, 0,
1758  PF1MD_100, PF1MD_101, 0, 0,
1759  0, 0, 0, 0, 0, 0, 0, 0
1760  }
1761  },
1762 
1763  { PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) {
1764  0, 0, 0, 0, 0, 0,
1765  PF12_IN, PF12_OUT,
1766  PF11_IN, PF11_OUT,
1767  PF10_IN, PF10_OUT,
1768  PF9_IN, PF9_OUT,
1769  PF8_IN, PF8_OUT,
1770  PF7_IN, PF7_OUT,
1771  PF6_IN, PF6_OUT,
1772  PF5_IN, PF5_OUT,
1773  PF4_IN, PF4_OUT,
1774  PF3_IN, PF3_OUT,
1775  PF2_IN, PF2_OUT,
1776  PF1_IN, PF1_OUT,
1777  PF0_IN, PF0_OUT }
1778  },
1779 
1780  { PINMUX_CFG_REG("PGCR7", 0xfffe38c0, 16, 4) {
1781  0, 0, 0, 0, 0, 0, 0, 0,
1782  0, 0, 0, 0, 0, 0, 0, 0,
1783  0, 0, 0, 0, 0, 0, 0, 0,
1784  0, 0, 0, 0, 0, 0, 0, 0,
1785  0, 0, 0, 0, 0, 0, 0, 0,
1786  0, 0, 0, 0, 0, 0, 0, 0,
1788  PG0MD_100, 0, 0, 0,
1789  0, 0, 0, 0, 0, 0, 0, 0 }
1790  },
1791 
1792  { PINMUX_CFG_REG("PGCR6", 0xfffe38c2, 16, 4) {
1793  0, 0, 0, 0, 0, 0, 0, 0,
1794  0, 0, 0, 0, 0, 0, 0, 0,
1795  0, 0, 0, 0, 0, 0, 0, 0,
1796  0, 0, 0, 0, 0, 0, 0, 0,
1797  0, 0, 0, 0, 0, 0, 0, 0,
1798  0, 0, 0, 0, 0, 0, 0, 0,
1799  PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, 0, 0, 0, 0,
1800  0, 0, 0, 0, 0, 0, 0, 0 }
1801  },
1802 
1803  { PINMUX_CFG_REG("PGCR5", 0xfffe38c4, 16, 4) {
1804  PG23MD_00, PG23MD_01, PG23MD_10, PG23MD_11, 0, 0, 0, 0,
1805  0, 0, 0, 0, 0, 0, 0, 0,
1806  PG22MD_00, PG22MD_01, PG22MD_10, PG22MD_11, 0, 0, 0, 0,
1807  0, 0, 0, 0, 0, 0, 0, 0,
1808  PG21MD_00, PG21MD_01, PG21MD_10, PG21MD_11, 0, 0, 0, 0,
1809  0, 0, 0, 0, 0, 0, 0, 0,
1811  PG20MD_100, 0, 0, 0,
1812  0, 0, 0, 0, 0, 0, 0, 0 }
1813  },
1814 
1815  { PINMUX_CFG_REG("PGCR4", 0xfffe38c6, 16, 4) {
1817  PG19MD_100, 0, 0, 0,
1818  0, 0, 0, 0, 0, 0, 0, 0,
1820  PG18MD_100, 0, 0, 0,
1821  0, 0, 0, 0, 0, 0, 0, 0,
1823  PG17MD_100, 0, 0, 0,
1824  0, 0, 0, 0, 0, 0, 0, 0,
1826  PG16MD_100, 0, 0, 0,
1827  0, 0, 0, 0, 0, 0, 0, 0 }
1828  },
1829 
1830  { PINMUX_CFG_REG("PGCR3", 0xfffe38c8, 16, 4) {
1832  PG15MD_100, 0, 0, 0,
1833  0, 0, 0, 0, 0, 0, 0, 0,
1835  PG14MD_100, 0, 0, 0,
1836  0, 0, 0, 0, 0, 0, 0, 0,
1838  PG13MD_100, 0, 0, 0,
1839  0, 0, 0, 0, 0, 0, 0, 0,
1841  PG12MD_100, 0, 0, 0,
1842  0, 0, 0, 0, 0, 0, 0, 0 }
1843  },
1844  { PINMUX_CFG_REG("PGCR2", 0xfffe38ca, 16, 4) {
1846  PG11MD_100, PG11MD_101, 0, 0,
1847  0, 0, 0, 0, 0, 0, 0, 0,
1849  PG10MD_100, PG10MD_101, 0, 0,
1850  0, 0, 0, 0, 0, 0, 0, 0,
1852  PG9MD_100, PG9MD_101, 0, 0,
1853  0, 0, 0, 0, 0, 0, 0, 0,
1855  PG8MD_100, PG8MD_101, 0, 0,
1856  0, 0, 0, 0, 0, 0, 0, 0 }
1857  },
1858 
1859  { PINMUX_CFG_REG("PGCR1", 0xfffe38cc, 16, 4) {
1860  PG7MD_00, PG7MD_01, PG7MD_10, PG7MD_11, 0, 0, 0, 0,
1861  0, 0, 0, 0, 0, 0, 0, 0,
1862  PG6MD_00, PG6MD_01, PG6MD_10, PG6MD_11, 0, 0, 0, 0,
1863  0, 0, 0, 0, 0, 0, 0, 0,
1864  PG5MD_00, PG5MD_01, PG5MD_10, PG5MD_11, 0, 0, 0, 0,
1865  0, 0, 0, 0, 0, 0, 0, 0,
1866  PG4MD_00, PG4MD_01, PG4MD_10, PG4MD_11, 0, 0, 0, 0,
1867  0, 0, 0, 0, 0, 0, 0, 0 }
1868  },
1869  { PINMUX_CFG_REG("PGCR0", 0xfffe38ce, 16, 4) {
1870  PG3MD_00, PG3MD_01, PG3MD_10, PG3MD_11, 0, 0, 0, 0,
1871  0, 0, 0, 0, 0, 0, 0, 0,
1872  PG2MD_00, PG2MD_01, PG2MD_10, PG2MD_11, 0, 0, 0, 0,
1873  0, 0, 0, 0, 0, 0, 0, 0,
1874  PG1MD_00, PG1MD_01, PG1MD_10, PG1MD_11, 0, 0, 0, 0,
1875  0, 0, 0, 0, 0, 0, 0, 0,
1876  0, 0, 0, 0, 0, 0, 0, 0,
1877  0, 0, 0, 0, 0, 0, 0, 0 }
1878  },
1879  { PINMUX_CFG_REG("PGIOR1", 0xfffe38d0, 16, 1) {
1880  0, 0, 0, 0, 0, 0, 0, 0,
1881  0, 0, 0, 0, 0, 0,
1882  PG24_IN, PG24_OUT,
1883  PG23_IN, PG23_OUT,
1884  PG22_IN, PG22_OUT,
1885  PG21_IN, PG21_OUT,
1886  PG20_IN, PG20_OUT,
1887  PG19_IN, PG19_OUT,
1888  PG18_IN, PG18_OUT,
1889  PG17_IN, PG17_OUT,
1890  PG16_IN, PG16_OUT }
1891  },
1892 
1893  { PINMUX_CFG_REG("PGIOR0", 0xfffe38d2, 16, 1) {
1894  PG15_IN, PG15_OUT,
1895  PG14_IN, PG14_OUT,
1896  PG13_IN, PG13_OUT,
1897  PG12_IN, PG12_OUT,
1898  PG11_IN, PG11_OUT,
1899  PG10_IN, PG10_OUT,
1900  PG9_IN, PG9_OUT,
1901  PG8_IN, PG8_OUT,
1902  PG7_IN, PG7_OUT,
1903  PG6_IN, PG6_OUT,
1904  PG5_IN, PG5_OUT,
1905  PG4_IN, PG4_OUT,
1906  PG3_IN, PG3_OUT,
1907  PG2_IN, PG2_OUT,
1908  PG1_IN, PG1_OUT,
1909  PG0_IN, PG0_OUT
1910  }
1911  },
1912 
1913  { PINMUX_CFG_REG("PHCR1", 0xfffe38ec, 16, 4) {
1914  PH7MD_0, PH7MD_1, 0, 0, 0, 0, 0, 0,
1915  0, 0, 0, 0, 0, 0, 0, 0,
1916  PH6MD_0, PH6MD_1, 0, 0, 0, 0, 0, 0,
1917  0, 0, 0, 0, 0, 0, 0, 0,
1918  PH5MD_0, PH5MD_1, 0, 0, 0, 0, 0, 0,
1919  0, 0, 0, 0, 0, 0, 0, 0,
1920  PH4MD_0, PH4MD_1, 0, 0, 0, 0, 0, 0,
1921  0, 0, 0, 0, 0, 0, 0, 0 }
1922  },
1923 
1924  { PINMUX_CFG_REG("PHCR0", 0xfffe38ee, 16, 4) {
1925  PH3MD_0, PH3MD_1, 0, 0, 0, 0, 0, 0,
1926  0, 0, 0, 0, 0, 0, 0, 0,
1927  PH2MD_0, PH2MD_1, 0, 0, 0, 0, 0, 0,
1928  0, 0, 0, 0, 0, 0, 0, 0,
1929  PH1MD_0, PH1MD_1, 0, 0, 0, 0, 0, 0,
1930  0, 0, 0, 0, 0, 0, 0, 0,
1931  PH0MD_0, PH0MD_1, 0, 0, 0, 0, 0, 0,
1932  0, 0, 0, 0, 0, 0, 0, 0 }
1933  },
1934 
1935  { PINMUX_CFG_REG("PJCR2", 0xfffe390a, 16, 4) {
1936  PJ11MD_00, PJ11MD_01, PJ11MD_10, 0, 0, 0, 0, 0,
1937  0, 0, 0, 0, 0, 0, 0, 0,
1938  PJ10MD_00, PJ10MD_01, PJ10MD_10, 0, 0, 0, 0, 0,
1939  0, 0, 0, 0, 0, 0, 0, 0,
1940  PJ9MD_00, PJ9MD_01, PJ9MD_10, 0, 0, 0, 0, 0,
1941  0, 0, 0, 0, 0, 0, 0, 0,
1942  PJ8MD_00, PJ8MD_01, PJ8MD_10, 0, 0, 0, 0, 0,
1943  0, 0, 0, 0, 0, 0, 0, 0 }
1944  },
1945  { PINMUX_CFG_REG("PJCR1", 0xfffe390c, 16, 4) {
1946  PJ7MD_00, PJ7MD_01, PJ7MD_10, 0, 0, 0, 0, 0,
1947  0, 0, 0, 0, 0, 0, 0, 0,
1948  PJ6MD_00, PJ6MD_01, PJ6MD_10, 0, 0, 0, 0, 0,
1949  0, 0, 0, 0, 0, 0, 0, 0,
1950  PJ5MD_00, PJ5MD_01, PJ5MD_10, 0, 0, 0, 0, 0,
1951  0, 0, 0, 0, 0, 0, 0, 0,
1952  PJ4MD_00, PJ4MD_01, PJ4MD_10, 0, 0, 0, 0, 0,
1953  0, 0, 0, 0, 0, 0, 0, 0 }
1954  },
1955  { PINMUX_CFG_REG("PJCR0", 0xfffe390e, 16, 4) {
1956  PJ3MD_00, PJ3MD_01, PJ3MD_10, PJ3MD_11, 0, 0, 0, 0,
1957  0, 0, 0, 0, 0, 0, 0, 0,
1959  PJ2MD_100, PJ2MD_101, 0, 0,
1960  0, 0, 0, 0, 0, 0, 0, 0,
1962  PJ1MD_100, 0, 0, 0,
1963  0, 0, 0, 0, 0, 0, 0, 0,
1965  PJ0MD_100, PJ0MD_101, 0, 0,
1966  0, 0, 0, 0, 0, 0, 0, 0, }
1967  },
1968  { PINMUX_CFG_REG("PJIOR0", 0xfffe3912, 16, 1) {
1969  0, 0, 0, 0, 0, 0, 0, 0,
1970  PJ11_IN, PJ11_OUT,
1971  PJ10_IN, PJ10_OUT,
1972  PJ9_IN, PJ9_OUT,
1973  PJ8_IN, PJ8_OUT,
1974  PJ7_IN, PJ7_OUT,
1975  PJ6_IN, PJ6_OUT,
1976  PJ5_IN, PJ5_OUT,
1977  PJ4_IN, PJ4_OUT,
1978  PJ3_IN, PJ3_OUT,
1979  PJ2_IN, PJ2_OUT,
1980  PJ1_IN, PJ1_OUT,
1981  PJ0_IN, PJ0_OUT }
1982  },
1983 
1984  { PINMUX_CFG_REG("PKCR2", 0xfffe392a, 16, 4) {
1985  PK11MD_00, PK11MD_01, PK11MD_10, 0, 0, 0, 0, 0,
1986  0, 0, 0, 0, 0, 0, 0, 0,
1987  PK10MD_00, PK10MD_01, PK10MD_10, 0, 0, 0, 0, 0,
1988  0, 0, 0, 0, 0, 0, 0, 0,
1989  PK9MD_00, PK9MD_01, PK9MD_10, 0, 0, 0, 0, 0,
1990  0, 0, 0, 0, 0, 0, 0, 0,
1991  PK8MD_00, PK8MD_01, PK8MD_10, 0, 0, 0, 0, 0,
1992  0, 0, 0, 0, 0, 0, 0, 0 }
1993  },
1994 
1995  { PINMUX_CFG_REG("PKCR1", 0xfffe392c, 16, 4) {
1996  PK7MD_00, PK7MD_01, PK7MD_10, 0, 0, 0, 0, 0,
1997  0, 0, 0, 0, 0, 0, 0, 0,
1998  PK6MD_00, PK6MD_01, PK6MD_10, 0, 0, 0, 0, 0,
1999  0, 0, 0, 0, 0, 0, 0, 0,
2000  PK5MD_00, PK5MD_01, PK5MD_10, 0, 0, 0, 0, 0,
2001  0, 0, 0, 0, 0, 0, 0, 0,
2002  PK4MD_00, PK4MD_01, PK4MD_10, 0, 0, 0, 0, 0,
2003  0, 0, 0, 0, 0, 0, 0, 0 }
2004  },
2005  { PINMUX_CFG_REG("PKCR0", 0xfffe392e, 16, 4) {
2006  PK3MD_00, PK3MD_01, PK3MD_10, 0, 0, 0, 0, 0,
2007  0, 0, 0, 0, 0, 0, 0, 0,
2008  PK2MD_00, PK2MD_01, PK2MD_10, 0, 0, 0, 0, 0,
2009  0, 0, 0, 0, 0, 0, 0, 0,
2010  PK1MD_00, PK1MD_01, PK1MD_10, 0, 0, 0, 0, 0,
2011  0, 0, 0, 0, 0, 0, 0, 0,
2012  PK0MD_00, PK0MD_01, PK0MD_10, 0, 0, 0, 0, 0,
2013  0, 0, 0, 0, 0, 0, 0, 0 }
2014  },
2015 
2016  { PINMUX_CFG_REG("PKIOR0", 0xfffe3932, 16, 1) {
2017  0, 0, 0, 0, 0, 0, 0, 0,
2018  PJ11_IN, PJ11_OUT,
2019  PJ10_IN, PJ10_OUT,
2020  PJ9_IN, PJ9_OUT,
2021  PJ8_IN, PJ8_OUT,
2022  PJ7_IN, PJ7_OUT,
2023  PJ6_IN, PJ6_OUT,
2024  PJ5_IN, PJ5_OUT,
2025  PJ4_IN, PJ4_OUT,
2026  PJ3_IN, PJ3_OUT,
2027  PJ2_IN, PJ2_OUT,
2028  PJ1_IN, PJ1_OUT,
2029  PJ0_IN, PJ0_OUT }
2030  },
2031  {}
2032 };
2033 
2034 static struct pinmux_data_reg pinmux_data_regs[] = {
2035  { PINMUX_DATA_REG("PADR1", 0xfffe3814, 16) {
2036  0, 0, 0, 0, 0, 0, 0, PA3_DATA,
2037  0, 0, 0, 0, 0, 0, 0, PA2_DATA }
2038  },
2039 
2040  { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) {
2041  0, 0, 0, 0, 0, 0, 0, PA1_DATA,
2042  0, 0, 0, 0, 0, 0, 0, PA0_DATA }
2043  },
2044 
2045  { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) {
2046  0, 0, 0, 0, 0, 0, 0, 0,
2049  },
2050 
2051  { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) {
2055  PB3_DATA, PB2_DATA, PB1_DATA, 0 }
2056  },
2057 
2058  { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) {
2059  0, 0, 0, 0,
2063  },
2064 
2065  { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) {
2070  },
2071 
2072  { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) {
2073  0, 0, 0, 0, 0, 0, 0, 0,
2074  0, 0, PE5_DATA, PE4_DATA,
2076  },
2077 
2078  { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) {
2079  0, 0, 0, PF12_DATA,
2083  },
2084 
2085  { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) {
2086  0, 0, 0, 0, 0, 0, 0, PG24_DATA,
2089  },
2090 
2091  { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) {
2096  },
2097  { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) {
2098  0, 0, 0, PJ12_DATA,
2102  },
2103  { PINMUX_DATA_REG("PKDR0", 0xfffe3936, 16) {
2104  0, 0, 0, PK12_DATA,
2108  },
2109  { }
2110 };
2111 
2112 static struct pinmux_info sh7264_pinmux_info = {
2113  .name = "sh7264_pfc",
2114  .reserved_id = PINMUX_RESERVED,
2115  .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
2118  .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2119  .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2120 
2121  .first_gpio = GPIO_PA3,
2122  .last_gpio = GPIO_FN_LCD_M_DISP,
2123 
2124  .gpios = pinmux_gpios,
2125  .cfg_regs = pinmux_config_regs,
2126  .data_regs = pinmux_data_regs,
2127 
2128  .gpio_data = pinmux_data,
2129  .gpio_data_size = ARRAY_SIZE(pinmux_data),
2130 };
2131 
2132 static int __init plat_pinmux_setup(void)
2133 {
2134  return register_pinmux(&sh7264_pinmux_info);
2135 }
2136 arch_initcall(plat_pinmux_setup);