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pinmux-sh7269.c
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1 /*
2  * SH7269 Pinmux
3  *
4  * Copyright (C) 2012 Renesas Electronics Europe Ltd
5  * Copyright (C) 2012 Phil Edworthy
6  *
7  * This file is subject to the terms and conditions of the GNU General Public
8  * License. See the file "COPYING" in the main directory of this archive
9  * for more details.
10  */
11 
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/gpio.h>
15 #include <cpu/sh7269.h>
16 
17 enum {
19 
21  /* Port A */
23  /* Port B */
30  /* Port C */
34  /* Port D */
39  /* Port E */
42  /* Port F */
49  /* Port G */
57  /* Port H */
58  /* NOTE - Port H does not have a Data Register, but PH Data is
59  connected to PH Port Register */
62  /* Port I - not on device */
63  /* Port J */
73 
76  /* Port A */
78  /* Port B */
85  /* Port C */
89  /* Port D */
94  /* Port E */
97  /* Port F */
104  /* Port G */
112  /* Port H - Port H does not have a Data Register */
113  /* Port I - not on device */
114  /* Port J */
124 
127  /* Port A */
129  /* Port B */
136  /* Port C */
140  /* Port D */
145  /* Port E */
148  /* Port F */
155  /* Port G */
163  /* Port H - Port H does not have a Data Register */
164  /* Port I - not on device */
165  /* Port J */
175 
177  /* Port A */
180 
181  /* Port B */
189 
198 
207 
228 
233 
238 
242 
243  /* Port C */
253 
263 
268 
269  /* Port D */
286 
291 
296 
301 
306 
307  /* Port E */
316 
321 
329 
330  /* Port F */
355 
364 
373 
382 
391 
400 
409 
410  /* Port G */
439 
444 
453 
460 
465 
474 
483 
492 
493  /* Port H */
498 
503 
504  /* Port I - not on device */
505 
506  /* Port J */
539 
547 
556 
565 
574 
583 
592 
601 
610 
612 
614  /* Port H */
617 
618  /* IRQs */
624 
631 
632  /* SD */
635 
636  /* MMC */
640 
641  /* PWM */
646 
647  /* IEBus */
649 
650  /* WDT */
652 
653  /* DMAC */
656 
657  /* ADC */
659 
660  /* BSC */
687 
688  /* TMU */
695 
696  /* SCIF */
705 
706  /* RSPI */
710 
711  /* IIC3 */
716 
717  /* SSI */
726 
727  /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
729 
730  /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
733 
734  /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
737 
738  /* CAN */
749 
750  /* VDC */
781 };
782 
783 static pinmux_enum_t pinmux_data[] = {
784 
785  /* Port A */
788 
789  /* Port B */
795 
800 
821 
822  /* Port C */
827 
834 
839 
845 
849 
853 
857 
860 
863 
864  /* Port D */
867 
871 
875 
888 
889  /* Port E */
893 
897 
902 
906 
912 
918 
924 
929 
930  /* Port F */
935 
940 
945 
950 
956 
962 
967 
973 
979 
984 
989 
995 
1001 
1008 
1015 
1019 
1024 
1028 
1031 
1035 
1040 
1046 
1052 
1058 
1059  /* Port G */
1064 
1068 
1072 
1075 
1080 
1085 
1091 
1097 
1103 
1109 
1110 // TODO hardware manual has PG17 3 bits wide in reg picture and 2 bits in description
1111 // we're going with 2 bits
1115 
1116 // TODO hardware manual has PG16 3 bits wide in reg picture and 2 bits in description
1117 // we're going with 2 bits
1121 
1126 
1131 
1136 
1141 
1147 
1153 
1159 
1165 
1171 
1177 
1183 
1189 
1195 
1201 
1207 
1213 
1214  /* Port H */
1218 
1222 
1227 
1231 
1235 
1239 
1243 
1247 
1248  /* Port I - not on device */
1249 
1250  /* Port J */
1253 
1258 
1263 
1268 
1272 
1277 
1283 
1289 
1296 
1304 
1311 
1319 
1327 
1334 
1341 
1348 
1355 
1362 
1369 
1376 
1383 
1390 
1397 
1404 
1410 
1416 
1422 
1428 
1434 
1440 
1446 
1452 };
1453 
1454 static struct pinmux_gpio pinmux_gpios[] = {
1455  /* Port A */
1458 
1459  /* Port B */
1482 
1483  /* Port C */
1493 
1494  /* Port D */
1511 
1512  /* Port E */
1521 
1522  /* Port F */
1547 
1548  /* Port G */
1577 
1578  /* Port H - Port H does not have a Data Register */
1579 
1580  /* Port I - not on device */
1581 
1582  /* Port J */
1615 
1616  /* INTC */
1635 
1660 
1661  /* WDT */
1663 
1664  /* CAN */
1671 
1672  /* DMAC */
1679 
1680  /* ADC */
1682 
1683  /* BSCh */
1710 
1727 
1750 
1751  /* TMU */
1772 
1773  /* SCIF */
1804 
1805  /* RSPI */
1818 
1819  /* IIC3 */
1826 
1827  /* SSI */
1843 
1844  /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
1849 
1850  /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
1853 
1854  /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
1857 
1858  /* VDC3 */
1862 
1887 
1893 
1918 
1943 
1945 };
1946 
1947 static struct pinmux_cfg_reg pinmux_config_regs[] = {
1948  /* "name" addr register_size Field_Width */
1949 
1950  /* where Field_Width is 1 for single mode registers or 4 for upto 16
1951  mode registers and modes are described in assending order [0..16] */
1952 
1953  { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) {
1954  0, 0, 0, 0, 0, 0, 0, 0,
1955  0, 0, 0, 0, 0, 0, PA1_IN, PA1_OUT,
1956  0, 0, 0, 0, 0, 0, 0, 0,
1957  0, 0, 0, 0, 0, 0, PA0_IN, PA0_OUT }
1958  },
1959  { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4) {
1960  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1961 
1964  0, 0, 0, 0, 0, 0, 0, 0,
1965 
1966  PB21MD_00, PB21MD_01, PB21MD_10, PB21MD_11, 0, 0, 0, 0,
1967  0, 0, 0, 0, 0, 0, 0, 0,
1968 
1971  0, 0, 0, 0, 0, 0, 0, 0 }
1972  },
1973  { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4) {
1976  0, 0, 0, 0, 0, 0, 0, 0,
1977 
1980  0, 0, 0, 0, 0, 0, 0, 0,
1981 
1984  0, 0, 0, 0, 0, 0, 0, 0,
1985 
1988  0, 0, 0, 0, 0, 0, 0, 0 }
1989  },
1990  { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4) {
1993  0, 0, 0, 0, 0, 0, 0, 0,
1994 
1997  0, 0, 0, 0, 0, 0, 0, 0,
1998 
2001  0, 0, 0, 0, 0, 0, 0, 0,
2002 
2003  PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11, 0, 0, 0, 0,
2004  0, 0, 0, 0, 0, 0, 0, 0 }
2005  },
2006  { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4) {
2007  PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11, 0, 0, 0, 0,
2008  0, 0, 0, 0, 0, 0, 0, 0,
2009 
2010  PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11, 0, 0, 0, 0,
2011  0, 0, 0, 0, 0, 0, 0, 0,
2012 
2013  PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11, 0, 0, 0, 0,
2014  0, 0, 0, 0, 0, 0, 0, 0,
2015 
2016  PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11, 0, 0, 0, 0,
2017  0, 0, 0, 0, 0, 0, 0, 0 }
2018  },
2019  { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4) {
2020  PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11, 0, 0, 0, 0,
2021  0, 0, 0, 0, 0, 0, 0, 0,
2022 
2023  PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11, 0, 0, 0, 0,
2024  0, 0, 0, 0, 0, 0, 0, 0,
2025 
2026  PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11, 0, 0, 0, 0,
2027  0, 0, 0, 0, 0, 0, 0, 0,
2028 
2029  PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11, 0, 0, 0, 0,
2030  0, 0, 0, 0, 0, 0, 0, 0 }
2031  },
2032  { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4) {
2033  PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11, 0, 0, 0, 0,
2034  0, 0, 0, 0, 0, 0, 0, 0,
2035 
2036  PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11, 0, 0, 0, 0,
2037  0, 0, 0, 0, 0, 0, 0, 0,
2038 
2039  PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11, 0, 0, 0, 0,
2040  0, 0, 0, 0, 0, 0, 0, 0,
2041 
2042  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
2043  },
2044 
2045  { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1) {
2046  0, 0, 0, 0, 0, 0, 0, 0,
2047  0, 0, 0, 0, 0, 0, 0, 0,
2048  0, 0,
2049  PB22_IN, PB22_OUT,
2050  PB21_IN, PB21_OUT,
2051  PB20_IN, PB20_OUT,
2052  PB19_IN, PB19_OUT,
2053  PB18_IN, PB18_OUT,
2054  PB17_IN, PB17_OUT,
2055  PB16_IN, PB16_OUT }
2056  },
2057  { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1) {
2058  PB15_IN, PB15_OUT,
2059  PB14_IN, PB14_OUT,
2060  PB13_IN, PB13_OUT,
2061  PB12_IN, PB12_OUT,
2062  PB11_IN, PB11_OUT,
2063  PB10_IN, PB10_OUT,
2064  PB9_IN, PB9_OUT,
2065  PB8_IN, PB8_OUT,
2066  PB7_IN, PB7_OUT,
2067  PB6_IN, PB6_OUT,
2068  PB5_IN, PB5_OUT,
2069  PB4_IN, PB4_OUT,
2070  PB3_IN, PB3_OUT,
2071  PB2_IN, PB2_OUT,
2072  PB1_IN, PB1_OUT,
2073  0, 0 }
2074  },
2075 
2076  { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4) {
2077  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2078 
2079  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2080 
2081  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2082 
2085  0, 0, 0, 0, 0, 0, 0, 0 }
2086  },
2087  { PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4) {
2090  0, 0, 0, 0, 0, 0, 0, 0,
2091 
2094  0, 0, 0, 0, 0, 0, 0, 0,
2095 
2098  0, 0, 0, 0, 0, 0, 0, 0,
2099 
2100  PC4MD_00, PC4MD_01, PC4MD_10, PC4MD_11, 0, 0, 0, 0,
2101  0, 0, 0, 0, 0, 0, 0, 0 }
2102  },
2103  { PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4) {
2104  PC3MD_00, PC3MD_01, PC3MD_10, PC3MD_11, 0, 0, 0, 0,
2105  0, 0, 0, 0, 0, 0, 0, 0,
2106 
2107  PC2MD_00, PC2MD_01, PC2MD_10, PC2MD_11, 0, 0, 0, 0,
2108  0, 0, 0, 0, 0, 0, 0, 0,
2109 
2110  PC1MD_0, PC1MD_1, 0, 0, 0, 0, 0, 0,
2111  0, 0, 0, 0, 0, 0, 0, 0,
2112 
2113  PC0MD_0, PC0MD_1, 0, 0, 0, 0, 0, 0,
2114  0, 0, 0, 0, 0, 0, 0, 0 }
2115  },
2116 
2117  { PINMUX_CFG_REG("PCIOR0", 0xfffe3852, 16, 1) {
2118  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2119  PC8_IN, PC8_OUT,
2120  PC7_IN, PC7_OUT,
2121  PC6_IN, PC6_OUT,
2122  PC5_IN, PC5_OUT,
2123  PC4_IN, PC4_OUT,
2124  PC3_IN, PC3_OUT,
2125  PC2_IN, PC2_OUT,
2126  PC1_IN, PC1_OUT,
2127  PC0_IN, PC0_OUT }
2128  },
2129 
2130  { PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4) {
2131  PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11, 0, 0, 0, 0,
2132  0, 0, 0, 0, 0, 0, 0, 0,
2133 
2134  PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11, 0, 0, 0, 0,
2135  0, 0, 0, 0, 0, 0, 0, 0,
2136 
2137  PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11, 0, 0, 0, 0,
2138  0, 0, 0, 0, 0, 0, 0, 0,
2139 
2140  PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11, 0, 0, 0, 0,
2141  0, 0, 0, 0, 0, 0, 0, 0 }
2142  },
2143  { PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4) {
2144  PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11, 0, 0, 0, 0,
2145  0, 0, 0, 0, 0, 0, 0, 0,
2146 
2147  PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11, 0, 0, 0, 0,
2148  0, 0, 0, 0, 0, 0, 0, 0,
2149 
2150  PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11, 0, 0, 0, 0,
2151  0, 0, 0, 0, 0, 0, 0, 0,
2152 
2153  PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11, 0, 0, 0, 0,
2154  0, 0, 0, 0, 0, 0, 0, 0 }
2155  },
2156  { PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4) {
2157  PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11, 0, 0, 0, 0,
2158  0, 0, 0, 0, 0, 0, 0, 0,
2159 
2160  PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11, 0, 0, 0, 0,
2161  0, 0, 0, 0, 0, 0, 0, 0,
2162 
2163  PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11, 0, 0, 0, 0,
2164  0, 0, 0, 0, 0, 0, 0, 0,
2165 
2166  PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11, 0, 0, 0, 0,
2167  0, 0, 0, 0, 0, 0, 0, 0 }
2168  },
2169  { PINMUX_CFG_REG("PDCR0", 0xfffe386e, 16, 4) {
2170  PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11, 0, 0, 0, 0,
2171  0, 0, 0, 0, 0, 0, 0, 0,
2172 
2173  PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11, 0, 0, 0, 0,
2174  0, 0, 0, 0, 0, 0, 0, 0,
2175 
2176  PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11, 0, 0, 0, 0,
2177  0, 0, 0, 0, 0, 0, 0, 0,
2178 
2179  PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11, 0, 0, 0, 0,
2180  0, 0, 0, 0, 0, 0, 0, 0 }
2181  },
2182 
2183  { PINMUX_CFG_REG("PDIOR0", 0xfffe3872, 16, 1) {
2184  PD15_IN, PD15_OUT,
2185  PD14_IN, PD14_OUT,
2186  PD13_IN, PD13_OUT,
2187  PD12_IN, PD12_OUT,
2188  PD11_IN, PD11_OUT,
2189  PD10_IN, PD10_OUT,
2190  PD9_IN, PD9_OUT,
2191  PD8_IN, PD8_OUT,
2192  PD7_IN, PD7_OUT,
2193  PD6_IN, PD6_OUT,
2194  PD5_IN, PD5_OUT,
2195  PD4_IN, PD4_OUT,
2196  PD3_IN, PD3_OUT,
2197  PD2_IN, PD2_OUT,
2198  PD1_IN, PD1_OUT,
2199  PD0_IN, PD0_OUT }
2200  },
2201 
2202  { PINMUX_CFG_REG("PECR1", 0xfffe388c, 16, 4) {
2203  PE7MD_00, PE7MD_01, PE7MD_10, PE7MD_11, 0, 0, 0, 0,
2204  0, 0, 0, 0, 0, 0, 0, 0,
2205 
2206  PE6MD_00, PE6MD_01, PE6MD_10, PE6MD_11, 0, 0, 0, 0,
2207  0, 0, 0, 0, 0, 0, 0, 0,
2208 
2209  PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11, 0, 0, 0, 0,
2210  0, 0, 0, 0, 0, 0, 0, 0,
2211 
2212  PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11, 0, 0, 0, 0,
2213  0, 0, 0, 0, 0, 0, 0, 0 }
2214  },
2215  { PINMUX_CFG_REG("PECR0", 0xfffe388e, 16, 4) {
2218  0, 0, 0, 0, 0, 0, 0, 0,
2219 
2222  0, 0, 0, 0, 0, 0, 0, 0,
2223 
2226  0, 0, 0, 0, 0, 0, 0, 0,
2227 
2228  PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, 0, 0, 0, 0,
2229  0, 0, 0, 0, 0, 0, 0, 0 }
2230  },
2231  { PINMUX_CFG_REG("PEIOR0", 0xfffe3892, 16, 1) {
2232  0, 0, 0, 0, 0, 0, 0, 0,
2233  0, 0, 0, 0, 0, 0, 0, 0,
2234  PE7_IN, PE7_OUT,
2235  PE6_IN, PE6_OUT,
2236  PE5_IN, PE5_OUT,
2237  PE4_IN, PE4_OUT,
2238  PE3_IN, PE3_OUT,
2239  PE2_IN, PE2_OUT,
2240  PE1_IN, PE1_OUT,
2241  PE0_IN, PE0_OUT }
2242  },
2243 
2244  { PINMUX_CFG_REG("PFCR6", 0xfffe38a2, 16, 4) {
2247  0, 0, 0, 0, 0, 0, 0, 0,
2248 
2251  0, 0, 0, 0, 0, 0, 0, 0,
2252 
2255  0, 0, 0, 0, 0, 0, 0, 0,
2256 
2259  0, 0, 0, 0, 0, 0, 0, 0 }
2260  },
2261  { PINMUX_CFG_REG("PFCR5", 0xfffe38a4, 16, 4) {
2264  0, 0, 0, 0, 0, 0, 0, 0,
2265 
2268  0, 0, 0, 0, 0, 0, 0, 0,
2269 
2272  0, 0, 0, 0, 0, 0, 0, 0,
2273 
2276  0, 0, 0, 0, 0, 0, 0, 0 }
2277  },
2278  { PINMUX_CFG_REG("PFCR4", 0xfffe38a6, 16, 4) {
2279  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2280 
2281  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2282 
2283  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2284 
2287  0, 0, 0, 0, 0, 0, 0, 0 }
2288  },
2289  { PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) {
2290  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2291 
2294  0, 0, 0, 0, 0, 0, 0, 0,
2295 
2298  0, 0, 0, 0, 0, 0, 0, 0,
2299 
2302  0, 0, 0, 0, 0, 0, 0, 0 }
2303  },
2304  { PINMUX_CFG_REG("PFCR2", 0xfffe38aa, 16, 4) {
2307  0, 0, 0, 0, 0, 0, 0, 0,
2308 
2311  0, 0, 0, 0, 0, 0, 0, 0,
2312 
2315  0, 0, 0, 0, 0, 0, 0, 0,
2316 
2319  0, 0, 0, 0, 0, 0, 0, 0 }
2320  },
2321  { PINMUX_CFG_REG("PFCR1", 0xfffe38ac, 16, 4) {
2324  0, 0, 0, 0, 0, 0, 0, 0,
2325 
2328  0, 0, 0, 0, 0, 0, 0, 0,
2329 
2332  0, 0, 0, 0, 0, 0, 0, 0,
2333 
2336  0, 0, 0, 0, 0, 0, 0, 0 }
2337  },
2338  { PINMUX_CFG_REG("PFCR0", 0xfffe38ae, 16, 4) {
2341  0, 0, 0, 0, 0, 0, 0, 0,
2342 
2345  0, 0, 0, 0, 0, 0, 0, 0,
2346 
2349  0, 0, 0, 0, 0, 0, 0, 0,
2350 
2353  0, 0, 0, 0, 0, 0, 0, 0 }
2354  },
2355 
2356  { PINMUX_CFG_REG("PFIOR1", 0xfffe38b0, 16, 1) {
2357  0, 0, 0, 0, 0, 0, 0, 0,
2358  0, 0, 0, 0, 0, 0, 0, 0,
2359  PF23_IN, PF23_OUT,
2360  PF22_IN, PF22_OUT,
2361  PF21_IN, PF21_OUT,
2362  PF20_IN, PF20_OUT,
2363  PF19_IN, PF19_OUT,
2364  PF18_IN, PF18_OUT,
2365  PF17_IN, PF17_OUT,
2366  PF16_IN, PF16_OUT }
2367  },
2368  { PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) {
2369  PF15_IN, PF15_OUT,
2370  PF14_IN, PF14_OUT,
2371  PF13_IN, PF13_OUT,
2372  PF12_IN, PF12_OUT,
2373  PF11_IN, PF11_OUT,
2374  PF10_IN, PF10_OUT,
2375  PF9_IN, PF9_OUT,
2376  PF8_IN, PF8_OUT,
2377  PF7_IN, PF7_OUT,
2378  PF6_IN, PF6_OUT,
2379  PF5_IN, PF5_OUT,
2380  PF4_IN, PF4_OUT,
2381  PF3_IN, PF3_OUT,
2382  PF2_IN, PF2_OUT,
2383  PF1_IN, PF1_OUT,
2384  PF0_IN, PF0_OUT }
2385  },
2386 
2387  { PINMUX_CFG_REG("PGCR6", 0xfffe38c2, 16, 4) {
2388  PG27MD_00, PG27MD_01, PG27MD_10, PG27MD_11, 0, 0, 0, 0,
2389  0, 0, 0, 0, 0, 0, 0, 0,
2390 
2391  PG26MD_00, PG26MD_01, PG26MD_10, PG26MD_11, 0, 0, 0, 0,
2392  0, 0, 0, 0, 0, 0, 0, 0,
2393 
2394  PG25MD_00, PG25MD_01, PG25MD_10, PG25MD_11, 0, 0, 0, 0,
2395  0, 0, 0, 0, 0, 0, 0, 0,
2396 
2397  PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, 0, 0, 0, 0,
2398  0, 0, 0, 0, 0, 0, 0, 0 }
2399  },
2400  { PINMUX_CFG_REG("PGCR5", 0xfffe38c4, 16, 4) {
2403  0, 0, 0, 0, 0, 0, 0, 0,
2404 
2407  0, 0, 0, 0, 0, 0, 0, 0,
2408 
2411  0, 0, 0, 0, 0, 0, 0, 0,
2412 
2415  0, 0, 0, 0, 0, 0, 0, 0 }
2416  },
2417  { PINMUX_CFG_REG("PGCR4", 0xfffe38c6, 16, 4) {
2420  0, 0, 0, 0, 0, 0, 0, 0,
2421 
2424  0, 0, 0, 0, 0, 0, 0, 0,
2425 
2426  PG17MD_00, PG17MD_01, PG17MD_10, PG17MD_11, 0, 0, 0, 0,
2427  0, 0, 0, 0, 0, 0, 0, 0,
2428 
2429  PG16MD_00, PG16MD_01, PG16MD_10, PG16MD_11, 0, 0, 0, 0,
2430  0, 0, 0, 0, 0, 0, 0, 0 }
2431  },
2432  { PINMUX_CFG_REG("PGCR3", 0xfffe38c8, 16, 4) {
2433  PG15MD_00, PG15MD_01, PG15MD_10, PG15MD_11, 0, 0, 0, 0,
2434  0, 0, 0, 0, 0, 0, 0, 0,
2435 
2436  PG14MD_00, PG14MD_01, PG14MD_10, PG14MD_11, 0, 0, 0, 0,
2437  0, 0, 0, 0, 0, 0, 0, 0,
2438 
2439  PG13MD_00, PG13MD_01, PG13MD_10, PG13MD_11, 0, 0, 0, 0,
2440  0, 0, 0, 0, 0, 0, 0, 0,
2441 
2442  PG12MD_00, PG12MD_01, PG12MD_10, PG12MD_11, 0, 0, 0, 0,
2443  0, 0, 0, 0, 0, 0, 0, 0 }
2444  },
2445  { PINMUX_CFG_REG("PGCR2", 0xfffe38ca, 16, 4) {
2448  0, 0, 0, 0, 0, 0, 0, 0,
2449 
2452  0, 0, 0, 0, 0, 0, 0, 0,
2453 
2456  0, 0, 0, 0, 0, 0, 0, 0,
2457 
2460  0, 0, 0, 0, 0, 0, 0, 0 }
2461  },
2462 
2463  { PINMUX_CFG_REG("PGCR1", 0xfffe38cc, 16, 4) {
2466  0, 0, 0, 0, 0, 0, 0, 0,
2467 
2470  0, 0, 0, 0, 0, 0, 0, 0,
2471 
2474  0, 0, 0, 0, 0, 0, 0, 0,
2475 
2478  0, 0, 0, 0, 0, 0, 0, 0 }
2479  },
2480  { PINMUX_CFG_REG("PGCR0", 0xfffe38ce, 16, 4) {
2483  0, 0, 0, 0, 0, 0, 0, 0,
2484 
2487  0, 0, 0, 0, 0, 0, 0, 0,
2488 
2491  0, 0, 0, 0, 0, 0, 0, 0,
2492 
2495  0, 0, 0, 0, 0, 0, 0, 0 }
2496  },
2497 
2498  { PINMUX_CFG_REG("PGIOR1", 0xfffe38d0, 16, 1) {
2499  0, 0, 0, 0, 0, 0, 0, 0,
2500  PG27_IN, PG27_OUT,
2501  PG26_IN, PG26_OUT,
2502  PG25_IN, PG25_OUT,
2503  PG24_IN, PG24_OUT,
2504  PG23_IN, PG23_OUT,
2505  PG22_IN, PG22_OUT,
2506  PG21_IN, PG21_OUT,
2507  PG20_IN, PG20_OUT,
2508  PG19_IN, PG19_OUT,
2509  PG18_IN, PG18_OUT,
2510  PG17_IN, PG17_OUT,
2511  PG16_IN, PG16_OUT }
2512  },
2513  { PINMUX_CFG_REG("PGIOR0", 0xfffe38d2, 16, 1) {
2514  PG15_IN, PG15_OUT,
2515  PG14_IN, PG14_OUT,
2516  PG13_IN, PG13_OUT,
2517  PG12_IN, PG12_OUT,
2518  PG11_IN, PG11_OUT,
2519  PG10_IN, PG10_OUT,
2520  PG9_IN, PG9_OUT,
2521  PG8_IN, PG8_OUT,
2522  PG7_IN, PG7_OUT,
2523  PG6_IN, PG6_OUT,
2524  PG5_IN, PG5_OUT,
2525  PG4_IN, PG4_OUT,
2526  PG3_IN, PG3_OUT,
2527  PG2_IN, PG2_OUT,
2528  PG1_IN, PG1_OUT,
2529  PG0_IN, PG0_OUT }
2530  },
2531 
2532  { PINMUX_CFG_REG("PHCR1", 0xfffe38ec, 16, 4) {
2533  PH7MD_00, PH7MD_01, PH7MD_10, PH7MD_11, 0, 0, 0, 0,
2534  0, 0, 0, 0, 0, 0, 0, 0,
2535 
2536  PH6MD_00, PH6MD_01, PH6MD_10, PH6MD_11, 0, 0, 0, 0,
2537  0, 0, 0, 0, 0, 0, 0, 0,
2538 
2539  PH5MD_00, PH5MD_01, PH5MD_10, PH5MD_11, 0, 0, 0, 0,
2540  0, 0, 0, 0, 0, 0, 0, 0,
2541 
2542  PH4MD_00, PH4MD_01, PH4MD_10, PH4MD_11, 0, 0, 0, 0,
2543  0, 0, 0, 0, 0, 0, 0, 0 }
2544  },
2545 
2546  { PINMUX_CFG_REG("PHCR0", 0xfffe38ee, 16, 4) {
2547  PH3MD_00, PH3MD_01, PH3MD_10, PH3MD_11, 0, 0, 0, 0,
2548  0, 0, 0, 0, 0, 0, 0, 0,
2549 
2550  PH2MD_00, PH2MD_01, PH2MD_10, PH2MD_11, 0, 0, 0, 0,
2551  0, 0, 0, 0, 0, 0, 0, 0,
2552 
2553  PH1MD_00, PH1MD_01, PH1MD_10, PH1MD_11, 0, 0, 0, 0,
2554  0, 0, 0, 0, 0, 0, 0, 0,
2555 
2556  PH0MD_00, PH0MD_01, PH0MD_10, PH0MD_11, 0, 0, 0, 0,
2557  0, 0, 0, 0, 0, 0, 0, 0 }
2558  },
2559 
2560  { PINMUX_CFG_REG("PJCR7", 0xfffe3900, 16, 4) {
2561  PJ31MD_0, PJ31MD_1, 0, 0, 0, 0, 0, 0,
2562  0, 0, 0, 0, 0, 0, 0, 0,
2563 
2566  0, 0, 0, 0, 0, 0, 0, 0,
2567 
2570  0, 0, 0, 0, 0, 0, 0, 0,
2571 
2574  0, 0, 0, 0, 0, 0, 0, 0 }
2575  },
2576  { PINMUX_CFG_REG("PJCR6", 0xfffe3902, 16, 4) {
2579  0, 0, 0, 0, 0, 0, 0, 0,
2580 
2583  0, 0, 0, 0, 0, 0, 0, 0,
2584 
2587  0, 0, 0, 0, 0, 0, 0, 0,
2588 
2591  0, 0, 0, 0, 0, 0, 0, 0 }
2592  },
2593  { PINMUX_CFG_REG("PJCR5", 0xfffe3904, 16, 4) {
2596  0, 0, 0, 0, 0, 0, 0, 0,
2597 
2600  0, 0, 0, 0, 0, 0, 0, 0,
2601 
2604  0, 0, 0, 0, 0, 0, 0, 0,
2605 
2608  0, 0, 0, 0, 0, 0, 0, 0 }
2609  },
2610  { PINMUX_CFG_REG("PJCR4", 0xfffe3906, 16, 4) {
2613  0, 0, 0, 0, 0, 0, 0, 0,
2614 
2617  0, 0, 0, 0, 0, 0, 0, 0,
2618 
2621  0, 0, 0, 0, 0, 0, 0, 0,
2622 
2625  0, 0, 0, 0, 0, 0, 0, 0 }
2626  },
2627  { PINMUX_CFG_REG("PJCR3", 0xfffe3908, 16, 4) {
2630  0, 0, 0, 0, 0, 0, 0, 0,
2631 
2634  0, 0, 0, 0, 0, 0, 0, 0,
2635 
2638  0, 0, 0, 0, 0, 0, 0, 0,
2639 
2642  0, 0, 0, 0, 0, 0, 0, 0 }
2643  },
2644  { PINMUX_CFG_REG("PJCR2", 0xfffe390a, 16, 4) {
2647  0, 0, 0, 0, 0, 0, 0, 0,
2648 
2651  0, 0, 0, 0, 0, 0, 0, 0,
2652 
2655  0, 0, 0, 0, 0, 0, 0, 0,
2656 
2659  0, 0, 0, 0, 0, 0, 0, 0 }
2660  },
2661  { PINMUX_CFG_REG("PJCR1", 0xfffe390c, 16, 4) {
2664  0, 0, 0, 0, 0, 0, 0, 0,
2665 
2668  0, 0, 0, 0, 0, 0, 0, 0,
2669 
2672  0, 0, 0, 0, 0, 0, 0, 0,
2673 
2676  0, 0, 0, 0, 0, 0, 0, 0 }
2677  },
2678  { PINMUX_CFG_REG("PJCR0", 0xfffe390e, 16, 4) {
2681  0, 0, 0, 0, 0, 0, 0, 0,
2682 
2685  0, 0, 0, 0, 0, 0, 0, 0,
2686 
2689  0, 0, 0, 0, 0, 0, 0, 0,
2690 
2693  0, 0, 0, 0, 0, 0, 0, 0 }
2694  },
2695 
2696  { PINMUX_CFG_REG("PJIOR1", 0xfffe3910, 16, 1) {
2697  PJ31_IN, PJ31_OUT,
2698  PJ30_IN, PJ30_OUT,
2699  PJ29_IN, PJ29_OUT,
2700  PJ28_IN, PJ28_OUT,
2701  PJ27_IN, PJ27_OUT,
2702  PJ26_IN, PJ26_OUT,
2703  PJ25_IN, PJ25_OUT,
2704  PJ24_IN, PJ24_OUT,
2705  PJ23_IN, PJ23_OUT,
2706  PJ22_IN, PJ22_OUT,
2707  PJ21_IN, PJ21_OUT,
2708  PJ20_IN, PJ20_OUT,
2709  PJ19_IN, PJ19_OUT,
2710  PJ18_IN, PJ18_OUT,
2711  PJ17_IN, PJ17_OUT,
2712  PJ16_IN, PJ16_OUT }
2713  },
2714  { PINMUX_CFG_REG("PJIOR0", 0xfffe3912, 16, 1) {
2715  PJ15_IN, PJ15_OUT,
2716  PJ14_IN, PJ14_OUT,
2717  PJ13_IN, PJ13_OUT,
2718  PJ12_IN, PJ12_OUT,
2719  PJ11_IN, PJ11_OUT,
2720  PJ10_IN, PJ10_OUT,
2721  PJ9_IN, PJ9_OUT,
2722  PJ8_IN, PJ8_OUT,
2723  PJ7_IN, PJ7_OUT,
2724  PJ6_IN, PJ6_OUT,
2725  PJ5_IN, PJ5_OUT,
2726  PJ4_IN, PJ4_OUT,
2727  PJ3_IN, PJ3_OUT,
2728  PJ2_IN, PJ2_OUT,
2729  PJ1_IN, PJ1_OUT,
2730  PJ0_IN, PJ0_OUT }
2731  },
2732 
2733  {}
2734 };
2735 
2736 static struct pinmux_data_reg pinmux_data_regs[] = {
2737  { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) {
2738  0, 0, 0, 0, 0, 0, 0, PA1_DATA,
2739  0, 0, 0, 0, 0, 0, 0, PA0_DATA }
2740  },
2741 
2742  { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) {
2743  0, 0, 0, 0, 0, 0, 0, 0,
2746  },
2747  { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) {
2751  PB3_DATA, PB2_DATA, PB1_DATA, 0 }
2752  },
2753 
2754  { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) {
2755  0, 0, 0, 0,
2756  0, 0, 0, PC8_DATA,
2759  },
2760 
2761  { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) {
2766  },
2767 
2768  { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) {
2769  0, 0, 0, 0, 0, 0, 0, 0,
2772  },
2773 
2774  { PINMUX_DATA_REG("PFDR1", 0xfffe38b4, 16) {
2775  0, 0, 0, 0, 0, 0, 0, 0,
2778  },
2779  { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) {
2784  },
2785 
2786  { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) {
2787  0, 0, 0, 0,
2791  },
2792  { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) {
2797  },
2798 
2799  { PINMUX_DATA_REG("PJDR1", 0xfffe3914, 16) {
2804  },
2805  { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) {
2810  },
2811 
2812  { }
2813 };
2814 
2815 static struct pinmux_info sh7269_pinmux_info = {
2816  .name = "sh7269_pfc",
2817  .reserved_id = PINMUX_RESERVED,
2818  .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
2821  .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2822  .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2823 
2824  .first_gpio = GPIO_PA1,
2825  .last_gpio = GPIO_FN_LCD_M_DISP,
2826 
2827  .gpios = pinmux_gpios,
2828  .cfg_regs = pinmux_config_regs,
2829  .data_regs = pinmux_data_regs,
2830 
2831  .gpio_data = pinmux_data,
2832  .gpio_data_size = ARRAY_SIZE(pinmux_data),
2833 };
2834 
2835 static int __init plat_pinmux_setup(void)
2836 {
2837  return register_pinmux(&sh7269_pinmux_info);
2838 }
2839 arch_initcall(plat_pinmux_setup);